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1. 发明申请

US20110147733A1 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件结构及其制造方法
公开(公告)号：US20110147733A1
公开(公告)日：2011-06-23
申请号：US12776484
申请日：2010-05-10
申请人： Yih-Chyun KAO , Chun-Nan Lin , Li-Kai Chen , Wen-Ching Tsai
发明人： Yih-Chyun KAO , Chun-Nan Lin , Li-Kai Chen , Wen-Ching Tsai
IPC分类号： H01L29/786 , H01L29/12 , H01L21/34
CPC分类号： H01L29/7869
摘要： A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode. The passivation layer has a groove formed therein, and the groove surrounds the oxide semiconductor layer.
摘要翻译：提供了一种基板上的半导体器件结构及其制造方法。半导体器件结构包括氧化物半导体晶体管和含有游离氢的钝化层。半导体器件结构通过以下步骤形成。在基板上形成栅电极。栅介质层覆盖栅电极。源极电极形成在栅极电介质层上。在栅极电介质层上形成漏电极，与源电极分离，形成通道距离。在栅极电介质层，源电极和漏电极以及源电极和漏电极之间形成氧化物半导体层。氧化物半导体层进一步与源电极和漏电极电连接。钝化层覆盖氧化物半导体层，源电极和漏电极。钝化层在其中形成有凹槽，并且沟槽围绕氧化物半导体层。

2. 发明授权

US08395149B2 Semiconductor device structure and method for manufacturing the same 有权
标题翻译：半导体器件结构及其制造方法
公开(公告)号：US08395149B2
公开(公告)日：2013-03-12
申请号：US12776484
申请日：2010-05-10
申请人： Yih-Chyun Kao , Chun-Nan Lin , Li-Kai Chen , Wen-Ching Tsai
发明人： Yih-Chyun Kao , Chun-Nan Lin , Li-Kai Chen , Wen-Ching Tsai
IPC分类号： H01L29/786 , H01L29/12
CPC分类号： H01L29/7869
摘要： A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode. The passivation layer has a groove formed therein, and the groove surrounds the oxide semiconductor layer.
摘要翻译：提供了一种基板上的半导体器件结构及其制造方法。半导体器件结构包括氧化物半导体晶体管和含有游离氢的钝化层。半导体器件结构通过以下步骤形成。在基板上形成栅电极。栅介质层覆盖栅电极。源极电极形成在栅极电介质层上。在栅极电介质层上形成漏电极，与源电极分离，形成通道距离。在栅极电介质层，源电极和漏电极以及源电极和漏电极之间形成氧化物半导体层。氧化物半导体层进一步与源电极和漏电极电连接。钝化层覆盖氧化物半导体层，源电极和漏电极。钝化层在其中形成有凹槽，并且沟槽围绕氧化物半导体层。

3. 发明授权

US08987739B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08987739B2
公开(公告)日：2015-03-24
申请号：US13424382
申请日：2012-03-20
申请人： Chen-Yuan Tu , Yih-Chyun Kao , Shu-Feng Wu , Chun-Nan Lin
发明人： Chen-Yuan Tu , Yih-Chyun Kao , Shu-Feng Wu , Chun-Nan Lin
IPC分类号： H01L31/00 , H01L29/786 , H01L27/12
CPC分类号： H01L29/43 , H01L27/1225 , H01L27/1248 , H01L29/786 , H01L29/7869
摘要： A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.
摘要翻译：提供了一种半导体器件及其制造方法。半导体器件包括栅极，沟道层，栅极绝缘层，源极，漏极和硅 - 氧化铝层。栅极设置在基板上。通道层设置在基板上。沟道层与栅极重叠。栅极绝缘层设置在栅极和沟道层之间。源极和漏极设置在沟道层的两侧。硅 - 氧化铝层设置在基板上并覆盖源极，漏极和沟道层。

4. 发明申请

US20130168682A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130168682A1
公开(公告)日：2013-07-04
申请号：US13424382
申请日：2012-03-20
申请人： Chen-Yuan Tu , Yih-Chyun Kao , Shu-Feng Wu , Chun-Nan Lin
发明人： Chen-Yuan Tu , Yih-Chyun Kao , Shu-Feng Wu , Chun-Nan Lin
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/43 , H01L27/1225 , H01L27/1248 , H01L29/786 , H01L29/7869
摘要： A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.
摘要翻译：提供了一种半导体器件及其制造方法。半导体器件包括栅极，沟道层，栅极绝缘层，源极，漏极和硅 - 氧化铝层。栅极设置在基板上。通道层设置在基板上。沟道层与栅极重叠。栅极绝缘层设置在栅极和沟道层之间。源极和漏极设置在沟道层的两侧。硅 - 氧化铝层设置在基板上并覆盖源极，漏极和沟道层。

5. 发明申请

US20100038645A1 Display Element and Method of Manufacturing the Same 有权
标题翻译：显示元件及其制造方法
公开(公告)号：US20100038645A1
公开(公告)日：2010-02-18
申请号：US12582964
申请日：2009-10-21
申请人： Po-Lin Chen , Wen-Ching Tsai , Chun-Nan Lin , Kuo-Yuan Tu
发明人： Po-Lin Chen , Wen-Ching Tsai , Chun-Nan Lin , Kuo-Yuan Tu
IPC分类号： H01L33/00
CPC分类号： H01L29/458 , H01L27/124 , H01L29/41733
摘要： A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.
摘要翻译：提供了一种显示元件及其制造方法。该方法包括以下步骤：在衬底上形成具有栅极的第一图案化导电层和其上的电介质层; 在所述电介质层上形成图案化的半导体层，其中所述图案化半导体层具有沟道区，源极和漏极，并且其中所述源极和漏极位于所述沟道区的相对侧上; 选择性地沉积仅包裹图案化半导体层的阻挡层; 在阻挡层上和源极和漏极之上形成第二图案化导电层。在通过该方法制造的显示元件中，阻挡层仅包裹图案化的半导体层。

6. 发明申请

US20110014788A1 Display panel structure and manufacture method thereof 有权
公开(公告)号：US20110014788A1
公开(公告)日：2011-01-20
申请号：US12855837
申请日：2010-08-13
申请人： Chun-Nan Lin , Kuo-Yuan Tu , Shu-Feng Wu , Wen-Ching Tsai
发明人： Chun-Nan Lin , Kuo-Yuan Tu , Shu-Feng Wu , Wen-Ching Tsai
IPC分类号： H01L21/3213
CPC分类号： H01L29/4908 , H01L29/458 , H01L29/66757 , H01L29/66765
摘要： A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

7. 发明授权

US08062917B2 Display panel structure and manufacture method thereof 有权
标题翻译：显示面板结构及其制造方法
公开(公告)号：US08062917B2
公开(公告)日：2011-11-22
申请号：US12855837
申请日：2010-08-13
申请人： Chun-Nan Lin , Kuo-Yuan Tu , Shu-Feng Wu , Wen-Ching Tsai
发明人： Chun-Nan Lin , Kuo-Yuan Tu , Shu-Feng Wu , Wen-Ching Tsai
IPC分类号： H01L21/00
CPC分类号： H01L29/4908 , H01L29/458 , H01L29/66757 , H01L29/66765
摘要： A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.
摘要翻译：提供一种其上设置有电路元件的显示面板结构及其制造方法。显示面板包括基板和设置在基板上的电路元件。电路元件具有第一界面层和第一导电层。第一界面层和第一导电层都具有铜材料。制造第一界面层的材料包括制成第一导电层的反应物或材料的化合物。制造方法包括以下步骤：在基板上形成第一界面层; 在所述第一界面层上形成第一导电层; 并蚀刻第一导电层和界面层以形成图案。第一界面的存在减少了第一导电层在衬底上的穿透，并改善了第一导电层和衬底之间的粘合力。

8. 发明授权

US07625788B2 Display element and method of manufacturing the same 有权
标题翻译：显示元件及其制造方法
公开(公告)号：US07625788B2
公开(公告)日：2009-12-01
申请号：US12115855
申请日：2008-05-06
申请人： Po-Lin Chen , Wen-Ching Tsai , Chun-Nan Lin , Kuo-Yuan Tu
发明人： Po-Lin Chen , Wen-Ching Tsai , Chun-Nan Lin , Kuo-Yuan Tu
IPC分类号： H01L21/00 , H01L21/44
CPC分类号： H01L29/458 , H01L27/124 , H01L29/41733
摘要： A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.
摘要翻译：提供了一种显示元件及其制造方法。该方法包括以下步骤：在衬底上形成具有栅极的第一图案化导电层和其上的电介质层; 在所述电介质层上形成图案化的半导体层，其中所述图案化半导体层具有沟道区，源极和漏极，并且其中所述源极和漏极位于所述沟道区的相对侧上; 选择性地沉积仅包裹图案化半导体层的阻挡层; 在阻挡层上和源极和漏极之上形成第二图案化导电层。在通过该方法制造的显示元件中，阻挡层仅包裹图案化的半导体层。

9. 发明申请

US20090173944A1 THIN FILM TRANSISTOR, ACTIVE DEVICE ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL 审中-公开
标题翻译：薄膜晶体管，有源器件阵列基板和液晶显示面板
公开(公告)号：US20090173944A1
公开(公告)日：2009-07-09
申请号：US12049362
申请日：2008-03-16
申请人： Po-Lin Chen , Ting Hsieh , Chun-Nan Lin , Wen-Ching Tsai
发明人： Po-Lin Chen , Ting Hsieh , Chun-Nan Lin , Wen-Ching Tsai
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L29/4908 , H01L29/41733 , H01L29/42384 , H01L29/458 , H01L29/78669
摘要： A thin film transistor (TFT) includes a substrate, a gate, a gate dielectric layer, a channel layer, a source and a drain. The gate and the gate dielectric layer are disposed on the substrate and the gate dielectric layer covers the gate. The channel layer is disposed on the gate dielectric layer over the gate, and the source and the drain are respectively disposed on a portion of the channel layer at both sides of the gate. At least one of the gate, the source and the drain has a lower conductive layer, an upper conductive layer and an intermediate conductive layer located between the lower conductive layer and the upper conductive layer. The material of the lower conductive layer is different from the material of the intermediate conductive layer, and the thickness of the lower conductive layer is less than or equal to about 150 Å.
摘要翻译：薄膜晶体管（TFT）包括衬底，栅极，栅极电介质层，沟道层，源极和漏极。栅极和栅极介电层设置在基板上，栅极电介质层覆盖栅极。沟道层设置在栅极上的栅极介电层上，源极和漏极分别设置在栅极两侧的沟道层的一部分上。栅极，源极和漏极中的至少一个具有位于下导电层和上导电层之间的下导电层，上导电层和中间导电层。下导电层的材料与中间导电层的材料不同，下导电层的厚度小于或等于约150。

10. 发明申请

US20090153056A1 PIXEL STRUCTURE, DISPLAY PANEL, ELETRO-OPTICAL APPARATUS, AND METHOD THEREROF 有权
标题翻译：像素结构，显示面板，ELETRO-OPTICAL设备及其方法
公开(公告)号：US20090153056A1
公开(公告)日：2009-06-18
申请号：US12060873
申请日：2008-04-02
申请人： Po-Lin Chen , Chun-Nan Lin , Shu-Feng Wu , Wen-Ching Tsai
发明人： Po-Lin Chen , Chun-Nan Lin , Shu-Feng Wu , Wen-Ching Tsai
IPC分类号： H01J7/44 , H01L21/04 , H01J9/00
CPC分类号： H01L29/458 , H01L27/124 , H01L27/1255
摘要： A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.
摘要翻译：提供了一种设置在包括薄膜晶体管（TFT），底部电容器电极，电介质层，上部电容器电极，钝化层和像素电极的基板上的像素结构。具有源极/漏极和底部电容器电极的TFT设置在衬底上。电介质层设置在底部电容器电极上。上部电容器电极具有半导体层，阻挡层和金属层。半导体层设置在底部电容器电极上方的电介质层上。阻挡层设置在半导体层上。其材料包括铜，铜合金或其组合的金属层设置在阻挡层上。钝化层覆盖TFT和上电容器电极，并且具有暴露源极/漏极的第一开口。像素电极通过第一开口与TFT电连接。

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