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1. 发明授权

US08438341B2 Common memory programming 有权
标题翻译：常用内存编程
公开(公告)号：US08438341B2
公开(公告)日：2013-05-07
申请号：US12816588
申请日：2010-06-16
申请人： Ulrich A. Finkler , Steven N. Hirsch , Harold E. Reindel
发明人： Ulrich A. Finkler , Steven N. Hirsch , Harold E. Reindel
IPC分类号： G06F12/00
CPC分类号： G06F9/544
摘要： A method for unidirectional communication between tasks includes providing a first task having access to an amount of virtual memory, blocking a communication channel portion of said first task's virtual memory, such that the first task cannot access said portion, providing a second task, having access to an amount of virtual memory equivalent to the first task's virtual memory, wherein a communication channel portion of the second task's virtual memory corresponding to the blocked portion of the first task's virtual memory is marked as writable, transferring the communication channel memory of the second task to the first task, and unblocking the communication channel memory of the first task.
摘要翻译：一种用于任务之间的单向通信的方法包括提供具有对一定量的虚拟存储器的访问的第一任务，阻止所述第一任务的虚拟存储器的通信信道部分，使得第一任务不能访问所述部分，提供第二任务，涉及与第一任务的虚拟存储器相当的虚拟存储器的量，其中与第一任务的虚拟存储器的被阻止部分相对应的第二任务的虚拟存储器的通信信道部分被标记为可写，传送第二任务的通信信道存储器到第一个任务，并解除第一个任务的通信通道存储器。

2. 发明申请

US20110314238A1 COMMON MEMORY PROGRAMMING 有权
标题翻译：通用记忆编程
公开(公告)号：US20110314238A1
公开(公告)日：2011-12-22
申请号：US12816588
申请日：2010-06-16
申请人： Ulrich A. Finkler , Steven N. Hirsch , Harold E. Reindel
发明人： Ulrich A. Finkler , Steven N. Hirsch , Harold E. Reindel
IPC分类号： G06F12/00 , G06F12/10 , G06F12/14 , G06F12/16
CPC分类号： G06F9/544
摘要： A method for unidirectional communication between tasks includes providing a first task having access to an amount of virtual memory, blocking a communication channel portion of said first task's virtual memory, such that the first task cannot access said portion, providing a second task, having access to an amount of virtual memory equivalent to the first task's virtual memory, wherein a communication channel portion of the second task's virtual memory corresponding to the blocked portion of the first task's virtual memory is marked as writable, transferring the communication channel memory of the second task to the first task, and unblocking the communication channel memory of the first task.
摘要翻译：一种用于任务之间的单向通信的方法包括提供具有对一定量的虚拟存储器的访问的第一任务，阻止所述第一任务的虚拟存储器的通信信道部分，使得第一任务不能访问所述部分，提供第二任务，涉及与第一任务的虚拟存储器相当的虚拟存储器的量，其中与第一任务的虚拟存储器的被阻止部分相对应的第二任务的虚拟存储器的通信信道部分被标记为可写，传送第二任务的通信信道存储器到第一个任务，并解除第一个任务的通信通道存储器。

3. 发明授权

US08423328B2 Method of distributing a random variable using statistically correct spatial interpolation continuously with spatially inhomogeneous statistical correlation versus distance, standard deviation, and mean 失效
标题翻译：使用统计学上正确的空间插值，随空间非均匀统计学相关性与距离，标准偏差和平均值分配随机变量的方法
公开(公告)号：US08423328B2
公开(公告)日：2013-04-16
申请号：US12570195
申请日：2009-09-30
申请人： John M. Cohn , Ulrich A. Finkler , David J. Hathaway , Jeffrey G. Hemmett , Fook-Luen Heng , Jason D Hibbeler , Gie Lee , Wayne H. Woods, Jr. , Cole E. Zemke
发明人： John M. Cohn , Ulrich A. Finkler , David J. Hathaway , Jeffrey G. Hemmett , Fook-Luen Heng , Jason D Hibbeler , Gie Lee , Wayne H. Woods, Jr. , Cole E. Zemke
IPC分类号： G06F17/17
CPC分类号： G06F17/175
摘要： Methods for modeling a random variable with spatially inhomogenous statistical correlation versus distance, standard deviation, and mean by spatial interpolation with statistical corrections. The method includes assigning statistically independent random variable to a set of seed points in a coordinate frame and defining a plurality of test points at respective spatial locations in the coordinate frame. A equation for a random variable is determined for each of the test points by spatial interpolation from one or more of the random variable assigned to the seed points. The method further includes adjusting the equation of the random variable at each of the test point with respective correction factor equations.
摘要翻译：用空间不均匀的统计学相关性与距离，标准偏差和通过统计学校正的空间插值的平均值来建模随机变量的方法。该方法包括将统计独立的随机变量分配给坐标系中的一组种子点并在坐标系中的相应空间位置定义多个测试点。通过从分配给种子点的一个或多个随机变量的空间插值，为每个测试点确定随机变量的等式。该方法还包括利用相应的校正因子方程来调整每个测试点处的随机变量的方程。

4. 发明申请

US20110077916A1 Method of Distributing a Random Variable Using Statistically Correct Spatial Interpolation Continuously With Spatially Inhomogeneous Statistical Correlation Versus Distance, Standard Deviation, and Mean 失效
标题翻译：使用统计学上正确的空间插值分布随机变量的方法与空间不均匀的统计相关性与距离，标准偏差和平均值
公开(公告)号：US20110077916A1
公开(公告)日：2011-03-31
申请号：US12570195
申请日：2009-09-30
申请人： John M Cohn , Ulrich A. Finkler , David J. Hathaway , Jefrey G. Hemmett , Fook-Luen Heng , Jason D. Hibbeler , Gie Lee , Wayne H. Woods, JR. , Cole E. Zemke
发明人： John M Cohn , Ulrich A. Finkler , David J. Hathaway , Jefrey G. Hemmett , Fook-Luen Heng , Jason D. Hibbeler , Gie Lee , Wayne H. Woods, JR. , Cole E. Zemke
IPC分类号： G06F17/10 , G06F17/17 , G06F1/02
CPC分类号： G06F17/175
摘要： Methods for modeling a random variable with spatially inhomogenous statistical correlation versus distance, standard deviation, and mean by spatial interpolation with statistical corrections. The method includes assigning statistically independent random variable to a set of seed points in a coordinate frame and defining a plurality of test points at respective spatial locations in the coordinate frame. A equation for a random variable is determined for each of the test points by spatial interpolation from one or more of the random variable assigned to the seed points. The method further includes adjusting the equation of the random variable at each of the test point with respective correction factor equations.
摘要翻译：用空间不均匀的统计学相关性与距离，标准偏差和通过统计学校正的空间插值的平均值来建模随机变量的方法。该方法包括将统计独立的随机变量分配给坐标系中的一组种子点并在坐标系中的相应空间位置定义多个测试点。通过从分配给种子点的一个或多个随机变量的空间插值，为每个测试点确定随机变量的等式。该方法还包括利用相应的校正因子方程来调整每个测试点处的随机变量的方程。

5. 发明授权

US08473885B2 Physical design system and method 失效
公开(公告)号：US08473885B2
公开(公告)日：2013-06-25
申请号：US13413759
申请日：2012-03-07
申请人： John M. Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woeltgens
发明人： John M. Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woeltgens
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5009 , G06F17/5072
摘要： A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

6. 发明授权

US08006207B2 Parallel intrusion search in hierarchical VLSI designs with substituting scan line 有权
标题翻译：在具有替代扫描线的分层VLSI设计中的并行入侵搜索
公开(公告)号：US08006207B2
公开(公告)日：2011-08-23
申请号：US12198172
申请日：2008-08-26
申请人： Ulrich A. Finkler
发明人： Ulrich A. Finkler
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： Mechanisms are provided for performing intrusion searching of a hierarchical integrated circuit design. These mechanisms may receive the hierarchical integrated circuit design and perform a parallel intrusion search operation, that utilizes a substituting scan line, on the hierarchical integrated circuit design to identify intrusions of geometric objects in the hierarchical integrated circuit design. The mechanisms may further record intrusions of geometric objects in the hierarchical integrated circuit design identified by the parallel intrusion search operation. The parallel intrusion search operation may utilize a plurality of separate intrusion searches executed by the data processing system in parallel on the hierarchical integrated circuit design.
摘要翻译：提供了用于执行分级集成电路设计的入侵搜索的机制。这些机制可以接收分级集成电路设计，并且在分层集成电路设计中执行使用替代扫描线的并行入侵搜索操作来识别分层集成电路设计中的几何对象的入侵。这些机制可以进一步记录通过并行入侵搜索操作识别的分层集成电路设计中的几何对象的入侵。并行入侵搜索操作可以在分层集成电路设计上并行地利用由数据处理系统执行的多个单独的入侵搜索。

7. 发明授权

US07814443B2 Graph-based pattern matching in L3GO designs 有权
标题翻译：基于图形的L3GO设计模式匹配
公开(公告)号：US07814443B2
公开(公告)日：2010-10-12
申请号：US11623541
申请日：2007-01-16
申请人： Ulrich A. Finkler , Mark A. Lavin , Robert T. Sayah
发明人： Ulrich A. Finkler , Mark A. Lavin , Robert T. Sayah
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A system and method for processing glyph-based data associated with generating very large scale integrated circuit (VLSI) designs. A system is provide that includes a system for defining variable patterns using a pattern description language to create a glyph layout; and a graph-based pattern matching system that can identify potential matches amongst variable patterns in the glyph layout.
摘要翻译：一种用于处理与生成超大规模集成电路（VLSI）设计相关联的基于字形的数据的系统和方法。提供一种系统，其包括用于使用模式描述语言定义可变模式以创建字形布局的系统; 以及可以识别字形布局中的可变图案之间的潜在匹配的基于图形的模式匹配系统。

8. 发明授权

US07475198B2 Asynchronous symmetric multiprocessing 有权
标题翻译：异步对称多处理
公开(公告)号：US07475198B2
公开(公告)日：2009-01-06
申请号：US11873464
申请日：2007-10-17
申请人： Ulrich A. Finkler
发明人： Ulrich A. Finkler
IPC分类号： G06F13/14
CPC分类号： G06F9/5016 , G06F12/0815 , G06F12/0828 , G06F2212/1032 , G06F2212/1048
摘要： An apparatus for serializing concurrent requests to multiple processors includes a signal merging tree structure and a traversal mechanism. The tree structure has a root node and leaf nodes for connecting a data consumer to the root. The tree structure serializes concurrent requests in the presence of race conditions, and connects each request producer from among the processors to a respective leaf node. The mechanism enables a producer to transmit a signal from a corresponding leaf node to the consumer at the root node by setting all nodes on a path from the leaf node to the root node to a Boolean true. The mechanism enables the consumer to trace signal submissions of the producers such that submission traversals by the producers and trace traversals by the consumer can be concurrently performed to allow data races between signal submissions by producers and between signal submissions by producers and the consumer.
摘要翻译：用于将并发请求串行化到多个处理器的装置包括信号合并树结构和遍历机制。树结构具有用于将数据消费者连接到根的根节点和叶节点。树状结构在存在竞争条件的情况下对并发请求进行了序列化，并将处理器中的每个请求生产者连接到相应的叶节点。该机制使生产者能够通过将从叶节点到根节点的路径上的所有节点设置为布尔值true，将信号从相应的叶节点传送到根节点处的消费者。该机制使得消费者能够跟踪生产者的信号提交，使得生产者的提交遍历和消费者的跟踪遍历可以同时执行，以允许生产者提供的信号提交和生产者和消费者的信号提交之间的数据竞赛。

9. 发明申请

US20080172645A1 GRAPH-BASED PATTERN MATCHING IN L3GO DESIGNS 有权
标题翻译：在L3GO设计中基于图形的图案匹配
公开(公告)号：US20080172645A1
公开(公告)日：2008-07-17
申请号：US11623541
申请日：2007-01-16
申请人： Ulrich A. Finkler , Mark A. Lavin , Robert T. Sayah
发明人： Ulrich A. Finkler , Mark A. Lavin , Robert T. Sayah
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A system and method for processing glyph-based data associated with generating very large scale integrated circuit (VLSI) designs. A system is provide that includes a system for defining variable patterns using a pattern description language to create a glyph layout; and a graph-based pattern matching system that can identify potential matches amongst variable patterns in the glyph layout.
摘要翻译：一种用于处理与生成超大规模集成电路（VLSI）设计相关联的基于字形的数据的系统和方法。提供一种系统，其包括用于使用模式描述语言定义可变模式以创建字形布局的系统; 以及可以识别字形布局中的可变图案之间的潜在匹配的基于图形的模式匹配系统。

10. 发明申请

US20110289472A1 LAYOUT QUALITY EVALUATION 审中-公开
标题翻译：布局质量评估
公开(公告)号：US20110289472A1
公开(公告)日：2011-11-24
申请号：US12782926
申请日：2010-05-19
申请人： Ulrich A. Finkler , Mark A. Lavin , Amith Singhee
发明人： Ulrich A. Finkler , Mark A. Lavin , Amith Singhee
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A method for quantifying and improving layout quality of an IC is disclosed. The method includes receiving a drawn layout and placing essentially one dimensional measurement markers (chords) at various location in the drawn layout. This placement is done in such manner that contours of shapes in the drawn layout intersect a chord in at least two places. The length of the chord is defined as its portion delimited by the intersections, and a measurement of the chord is defined as obtaining its length. The drawn layout is subjected, with the exception of the chords, to a patterning simulation at a selected processing point. Following the simulation the chords are measured and the obtained lengths associated with the drawn layout and the processing point. The patterning simulation may be carried out at a variety processing points and the chord lengths following each simulation are associated with the respective processing point. The sets of lengths obtained at the various processing points are used to quantitatively evaluate the layout quality, to improve the layout quality and tune the processing window.
摘要翻译：公开了一种量化和提高IC布局质量的方法。该方法包括接收绘制的布局并且在绘制的布局中的各个位置放置基本上一维的测量标记（和弦）。这种放置以这样的方式完成，使得绘制布局中的形状的轮廓在至少两个地方与弦并行。弦的长度被定义为由交点限定的部分，并且弦的测量被定义为获得其长度。除了和弦之外，绘制的布局受到所选处理点处的图案化模拟的影响。在模拟之后，测量和弦并获得与绘制的布局和处理点相关联的长度。图案化模拟可以在各种处理点处执行，并且每个模拟之后的弦长与相应的处理点相关联。在各种处理点获得的长度集合用于定量评估布局质量，提高布局质量并调整处理窗口。

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