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1. 发明授权

US08266502B2 Recording/reproducing apparatus and recording/reproducing method 失效
标题翻译：记录/再现装置和记录/再现方法
公开(公告)号：US08266502B2
公开(公告)日：2012-09-11
申请号：US12270004
申请日：2008-11-13
申请人： Tsutomu Harada , Yoshihiko Deoka , Hisato Hirasaka , Toshihiko Hirose , Toshiyuki Hirose , Osamu Nakamura , Akira Itou
发明人： Tsutomu Harada , Yoshihiko Deoka , Hisato Hirasaka , Toshihiko Hirose , Toshiyuki Hirose , Osamu Nakamura , Akira Itou
IPC分类号： G11C29/00
CPC分类号： G11B20/1879 , G11B20/1833 , G11B2020/1823 , G11B2020/183 , G11B2020/185 , G11B2220/91 , H03M13/1128
摘要： A recording/reproducing apparatus includes an encoding section, a decoding section, and a first judging section. The encoding section is configured to encode data that is to be recorded onto a recording medium into an LDPC (Low Density Parity Check) code. The decoding section is configured to decode the LDPC code read out from the recording medium. The judging section is configured to judge a block with a recording error based on one of a block error flag and an iterative decoding count output from the decoding section.
摘要翻译：记录/再现装置包括编码部分，解码部分和第一判断部分。编码部被配置为将要记录到记录介质上的数据编码为LDPC（低密度奇偶校验）码。解码部分被配置为对从记录介质读出的LDPC码进行解码。该判定部根据从解码部输出的块错误标志和迭代解码计数中的一个来判断具有记录错误的块。

2. 发明授权

US08174271B2 Capacitance change measuring circuit of capacitive sensor device, capacitive sensor module, method of measuring capacitance change of capacitive sensor device, and electronic device 失效
标题翻译：电容传感器装置的电容变化测量电路，电容式传感器模块，电容式传感器装置的电容变化测量方法以及电子装置
公开(公告)号：US08174271B2
公开(公告)日：2012-05-08
申请号：US12537757
申请日：2009-08-07
申请人： Hisato Hirasaka , Osamu Nakamura , Toshiyuki Hirose , Toshihiko Hirose , Hitoshi Ozawa , Akira Itou
发明人： Hisato Hirasaka , Osamu Nakamura , Toshiyuki Hirose , Toshihiko Hirose , Hitoshi Ozawa , Akira Itou
IPC分类号： G01R27/26 , G06K9/00
CPC分类号： G06F3/044 , G06F3/0416 , H03K17/955 , H03K17/9622 , H03K2217/960715 , H03K2217/960725
摘要： Scanning rate in a capacitance change measuring circuit for a capacitive sensor device is enhanced. The circuit includes: an electrode drive section line-sequentially applying an input pulse signal to a plurality of columns of first electrode patterns in the capacitive sensor device; a peak hold circuit storing a peak level of a detection signal extracted from each column of second electrode patterns into a capacitive element as a corresponding potential; a current source initializing the potential in the capacitive element within one period of the input pulse signal; a comparator comparing the potential in the capacitive element with a reference value; and determination sections each determining whether or not an input operation using a human body or the like is executed, based on a timing information and a reference timing information, the timing information representing a timing when the potential held in the capacitive element crosses the reference value.
摘要翻译：用于电容式传感器装置的电容变化测量电路中的扫描速率得到提高。所述电路包括：电极驱动部，对所述电容式传感器装置中的多列第一电极图案进行顺序地施加输入脉冲信号; 峰值保持电路，将从每列第二电极图案提取的检测信号的峰值电平存储为电容元件作为相应的电位; 电流源在输入脉冲信号的一个周期内初始化电容元件中的电位; 比较电容元件中的电位与参考值的比较器; 以及确定部分，其基于定时信息和参考定时信息来确定是否执行使用人体等的输入操作，所述定时信息表示当所述电容元件中保持的电位与参考值交叉时的定时。

3. 发明申请

US20110193417A1 WIRELESS POWER TRANSMISSION APPARATUS 有权
标题翻译：无线电力传输设备
公开(公告)号：US20110193417A1
公开(公告)日：2011-08-11
申请号：US13016582
申请日：2011-01-28
申请人： Hisato Hirasaka , Toshiyuki Hirose , Toshihiko Hirose , Tetsuro Makise , Akira Itou
发明人： Hisato Hirasaka , Toshiyuki Hirose , Toshihiko Hirose , Tetsuro Makise , Akira Itou
IPC分类号： H01F38/14
CPC分类号： H02J50/10 , H02J5/005 , H02J17/00 , H02J50/12 , H02J50/80 , H04K1/10 , H04L63/0442 , H04L63/083 , H04W12/06 , Y04S40/24
摘要： A wireless power transmission apparatus includes: a transmitter that wirelessly transmits electric power; and a receiver that can receive, in a resonant relation with the transmitter, a transmission signal including the electric power transmitted from the transmitter, wherein the receiver includes a frequency variable unit that can change a reception resonant frequency; a detecting unit that detects reception power; and a control unit that controls the frequency variable unit to perform frequency adjustment such that the reception power detected by the detecting unit is maximized.
摘要翻译：无线电力传输装置包括：无线发射电力的发射机; 以及接收器，其可以与所述发射机以共振关系接收包括从所述发射机发送的电力的发送信号，其中所述接收机包括可以改变接收谐振频率的频率可变单元; 检测单元，检测接收功率; 以及控制单元，其控制所述频率可变单元进行频率调整，使得由所述检测单元检测到的接收功率最大化。

4. 发明授权

US09300145B2 Wireless power transmission apparatus 有权
标题翻译：无线电力传输装置
公开(公告)号：US09300145B2
公开(公告)日：2016-03-29
申请号：US13016582
申请日：2011-01-28
申请人： Hisato Hirasaka , Toshiyuki Hirose , Toshihiko Hirose , Tetsuro Makise , Akira Itou
发明人： Hisato Hirasaka , Toshiyuki Hirose , Toshihiko Hirose , Tetsuro Makise , Akira Itou
IPC分类号： H01F27/42 , H02J5/00 , H02J17/00 , H04K1/10 , H04L29/06
CPC分类号： H02J50/10 , H02J5/005 , H02J17/00 , H02J50/12 , H02J50/80 , H04K1/10 , H04L63/0442 , H04L63/083 , H04W12/06 , Y04S40/24
摘要： A wireless power transmission apparatus includes: a transmitter that wirelessly transmits electric power; and a receiver that can receive, in a resonant relation with the transmitter, a transmission signal including the electric power transmitted from the transmitter, wherein the receiver includes a frequency variable unit that can change a reception resonant frequency; a detecting unit that detects reception power; and a control unit that controls the frequency variable unit to perform frequency adjustment such that the reception power detected by the detecting unit is maximized.
摘要翻译：无线电力传输装置包括：无线发射电力的发射机; 以及接收器，其可以与所述发射机以共振关系接收包括从所述发射机发送的电力的发送信号，其中所述接收机包括可以改变接收谐振频率的频率可变单元; 检测单元，检测接收功率; 以及控制单元，其控制所述频率可变单元进行频率调整，使得由所述检测单元检测到的接收功率最大化。

5. 发明授权

US07092470B2 Data transfer method, block synchronizing signal detecting method, and reproducing apparatus 失效
标题翻译：数据传输方法，块同步信号检测方法和再现装置
公开(公告)号：US07092470B2
公开(公告)日：2006-08-15
申请号：US10363908
申请日：2002-07-09
申请人： Akira Itou , Toshihiko Hirose
发明人： Akira Itou , Toshihiko Hirose
IPC分类号： H04L25/38
CPC分类号： H04L7/041 , G11B20/10009 , G11B20/10055 , G11B20/10296 , G11B20/1426 , G11B20/1833 , G11B27/3027 , G11B2020/1287 , G11B2020/1438 , G11B2220/90 , H03M13/33
摘要： There is provided a method of detecting a block sync signal in which a sync signal and code sequence can be distinguished from each other to recognize the head of a block composed of a plurality of code words at the time of data reading or reception. A sync word detector (10) is supplied with a window signal Sync_window generated based on a parity OK signal supplied from a parity check circuit (12) and indicating a period between the sync word included in signal read from the medium (1) and the ID information, and detects the sync word as to a bit string detected by a PRML Viterbi detector (6) with the use of the Sync_window signal.
摘要翻译：提供了一种检测块同步信号的方法，其中同步信号和码序列可以彼此区分，以识别在数据读取或接收时由多个码字组成的块的头。同步字检测器（10）被提供有基于从奇偶校验电路（12）提供的奇偶校验OK信号产生的窗口信号Sync_window，并指示包括在从介质（1）读取的信号中的同步字与 ID信息，并且通过使用Sync_window信号来检测由PRML维特比检测器（6）检测到的位串的同步字。

6. 发明授权

US06218724B1 Thin film transistor used in semiconductor memory for achieving reduction in power consumption 失效
标题翻译：用于半导体存储器中的薄膜晶体管用于实现功耗的降低
公开(公告)号：US06218724B1
公开(公告)日：2001-04-17
申请号：US08879449
申请日：1997-06-20
申请人： Motomu Ukita , Toshihiko Hirose , Shigeto Maegawa
发明人： Motomu Ukita , Toshihiko Hirose , Shigeto Maegawa
IPC分类号： H01L2711
CPC分类号： G11C5/147 , Y10S257/904
摘要： An SRAM according to the present invention includes a voltage-down circuit and an internal circuit. The voltage-down circuit includes three resistors, two PMOS transistors and an NMOS transistor. One PMOS transistor directly applies an external power supply voltage to the internal circuit. The NMOS transistor applies a voltage obtained by reducing the external power supply voltage by a threshold voltage thereof to the internal circuit. The value of a predetermined voltage as a condition for switching such application of the voltage by the PMOS transistor and application Of the voltage by the NMOS transistor is determined by the resistance ratio of the two resistors. Each of the three resistors is formed by a plurality of resistance elements of one kind. Thus, even if the process parameter varies, the ratio of the resistance values of the two resistors which determines the switching point can be kept constant, thereby preventing variation in switching point.
摘要翻译：根据本发明的SRAM包括降压电路和内部电路。降压电路包括三个电阻，两个PMOS晶体管和一个NMOS晶体管。一个PMOS晶体管直接将外部电源电压施加到内部电路。 NMOS晶体管将通过将外部电源电压降低到其内部电路的阈值电压来获得的电压。作为用于切换由PMOS晶体管施加电压的条件的预定电压的值和由NMOS晶体管施加的电压的值由两个电阻器的电阻比确定。三个电阻器中的每一个由多个一种电阻元件形成。因此，即使过程参数变化，也可以将确定开关点的两个电阻器的电阻值的比率保持为一定，从而防止开关点的变化。

7. 发明授权

US5659513A Static semiconductor memory device having improved characteristics 失效
标题翻译：具有改进特性的静态半导体存储器件
公开(公告)号：US5659513A
公开(公告)日：1997-08-19
申请号：US526245
申请日：1995-09-11
申请人： Toshihiko Hirose , Shigeki Ohbayashi , Setsu Kondo , Takashi Hayasaka , Yoshiyuki Fujino , Masayuki Iketani
发明人： Toshihiko Hirose , Shigeki Ohbayashi , Setsu Kondo , Takashi Hayasaka , Yoshiyuki Fujino , Masayuki Iketani
IPC分类号： G11C11/41 , G11C7/14 , G11C7/22 , G11C11/401 , G11C11/407 , G11C11/417 , G11C11/419 , G11C29/00 , G05F3/24
CPC分类号： G11C29/78 , G11C11/417 , G11C11/419 , G11C7/14 , G11C7/22
摘要： A delay circuit delays an internal write control signal by a prescribed time to a global write driver. The global write driver is enabled in response to the delayed write control signal received from the delay circuit, to drive a global write data bus in accordance with internal write data from an input buffer. A block write driver is enabled in response to an internal write control signal and a block selection signal, to drive a local write data bus in response to data on the global write data bus. A write gate connects a bit line to the local write data bus in response to a column selection signal. The delay circuit sets the output of the block write driver at a low level for a prescribed period, whereby a precharge potential of the bit line is reduced to reduce the potential amplitude of the bit line in data writing. An SRAM which operates at a high speed with an enlarged write recovery time margin is provided. SRAM also includes various arrangement for improving operating characteristics and reliability.
摘要翻译：延迟电路将内部写入控制信号延迟规定时间到全局写入驱动器。全局写入驱动器响应于从延迟电路接收的延迟的写入控制信号而使能，以根据来自输入缓冲器的内部写入数据驱动全局写入数据总线。响应于内部写入控制信号和块选择信号来使能块写入驱动器，以响应于全局写入数据总线上的数据驱动本地写入数据总线。写入门响应于列选择信号将位线连接到本地写数据总线。延迟电路将块写入驱动器的输出设定为低电平达规定的周期，从而降低位线的预充电电位以减小数据写入中位线的电位振幅。提供了一种以高速运行并具有放大的写恢复时间裕度的SRAM。 SRAM还包括用于改善操作特性和可靠性的各种布置。

8. 发明授权

US5010420A Image processing apparatus 失效
标题翻译：图像处理装置
公开(公告)号：US5010420A
公开(公告)日：1991-04-23
申请号：US426550
申请日：1989-10-25
申请人： Takanori Hasegawa , Nobuyuki Abe , Toru Hibara , Toshihiko Hirose , Takashi Kanda , Hiroshi Saito , Masaki Oshima , Eiji Nakazawa
发明人： Takanori Hasegawa , Nobuyuki Abe , Toru Hibara , Toshihiko Hirose , Takashi Kanda , Hiroshi Saito , Masaki Oshima , Eiji Nakazawa
IPC分类号： G03B21/132 , G03B21/134 , H04N1/10
CPC分类号： H04N1/1008 , G03B21/132 , G03B21/134
摘要： An image processing apparatus furnished with an overhead projector has an image projecting function and an image-forming function. The image processing apparatus is designed to detect the movement of an original support table or a reflection-type focusing plate during projecting of an original. The result is that the original support table is free from being heated by the focusing plate and also that the focusing plate is free from any deviation of its axis of light, thus preventing the reflected light from striking on the eyes of the operator.
摘要翻译：具有高架投影仪的图像处理装置具有图像投影功能和图像形成功能。图像处理装置被设计成在原稿的投影期间检测原始支撑台或反射型聚焦板的移动。结果是，原始支撑台没有被聚焦板加热，并且聚焦板也没有其轴线的任何偏差，从而防止反射光撞击操作者的眼睛。

9. 发明授权

US4718658A Sheet feeding system using detachable sheet storage unit in image processing device 失效
标题翻译：在图像处理装置中使用可拆卸片材存储单元的片材馈送系统
公开(公告)号：US4718658A
公开(公告)日：1988-01-12
申请号：US833157
申请日：1986-02-27
申请人： Toshihiko Hirose , Tatsuhiko Neno
发明人： Toshihiko Hirose , Tatsuhiko Neno
IPC分类号： B65H1/04 , B65H1/14 , B65H7/02 , B65H1/08
CPC分类号： B65H1/266 , B65H1/04 , B65H1/14 , B65H2405/15 , B65H2801/21
摘要： A sheet feeding system for use in an image processing device composed of a desktop type image forming unit such as an electrostatic copying machine and a pedestal for permitting the image forming device to be placed thereon, which comprises a sheet storage unit having a vertically movable sheet tray on which a large number of sheets can be stacked. The united system body of the image forming unit and the pedestal defines a holder cavity for permitting the sheet storage unit to be put thereinto so as to enable the stacked sheets in the sheet storage unit to be sent out one by one.
摘要翻译：一种用于由诸如静电复印机的桌面型图像形成单元和用于允许图像形成装置放置在其上的基座的图像处理装置中的片材馈送系统，其包括具有可垂直移动的片材的片材存储单元可以堆叠大量纸张的托盘。图像形成单元和基座的联合系统主体限定了用于允许纸张存储单元被放入其中的保持器腔，以使得片材存储单元中的堆叠的片材能够逐个发送。

10. 发明授权

US08150186B2 Amount-of-compressed data control method and image data compressing apparatus 失效
标题翻译：数据压缩数据控制方法和图像数据压缩装置
公开(公告)号：US08150186B2
公开(公告)日：2012-04-03
申请号：US11946582
申请日：2007-11-28
申请人： Masanori Imata , Toshihiko Hirose , Michio Hirai
发明人： Masanori Imata , Toshihiko Hirose , Michio Hirai
IPC分类号： G06K9/36
CPC分类号： H04N19/192 , H04N19/126 , H04N19/149 , H04N19/15 , H04N19/176 , H04N19/60
摘要： An amount-of-compressed-data control method applicable to image data compression processing for compressing an amount of data is disclosed. The method includes the steps of: performing quantization by: dividing one digital image into multiple blocks each having n×n pixels; performing orthogonal transform on each block; and dividing n×n conversion coefficients resulting from the conversion by each threshold value of a quantization matrix including n×n threshold values each resulting from the multiplication of a predetermined coefficient S (where S is a positive real number); and variable-length encoding the quantized data. In this method, the value of the coefficient S allows the amount of compressed data to fit within a predetermined range of a target amount of data by performing the quantization and encoding by dividing the interval that the coefficient S can take on into multiple intervals and calculating the estimated value of the coefficient S based on the relationship between the amount of compressed image data and the coefficient S, which is defined for each of the divided intervals.
摘要翻译：公开了一种适用于压缩数据量的图像数据压缩处理的压缩数据量控制方法。该方法包括以下步骤：通过以下步骤执行量化：将一个数字图像分成多个具有n×n个像素的块; 对每个块执行正交变换; 并且将由转换得到的n×n个转换系数除以由预定系数S（其中S是正实数）的乘法产生的n×n个阈值的量化矩阵的每个阈值。并对量化数据进行可变长度编码。在该方法中，系数S的值通过将系数S可以进行的间隔除以多个间隔进行量化和编码，从而将压缩数据量拟合到目标数据量的预定范围内，并计算基于压缩图像数据量与系数S之间的关系的系数S的估计值，这是针对每个划分的间隔定义的。

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