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    • 3. 发明专利
    • Semiconductor device and method of manufacturing same
    • 半导体器件及其制造方法
    • JP2008252058A
    • 2008-10-16
    • JP2007245852
    • 2007-09-21
    • Toshiba Corp株式会社東芝
    • TOJO HIROSHIKITANI TOMOYUKIIGUCHI TOMOHIROHIRAHARA MASAKONISHIUCHI HIDEO
    • H01L23/48
    • H01L2224/48091H01L2924/00014
    • PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a structure employing no bonding wire, the semiconductor device adapted to enable improving electrical characteristics, while ensuring high reliability and also enhancing production yield to improve the productivity, and to provide a method of manufacturing the semiconductor device. SOLUTION: The semiconductor device includes a semiconductor chip 5, having a first electrode 5a1 of a semiconductor component arranged on a first surface 5a and a second electrode 5b1 of a semiconductor component arranged on a second surface 5b opposite to the first surface 5a; a first conductive member 6a connected to the first surface 5a; a second conductive member 6b, connected to the second surface 5b; a first external electrode 2a connected to the first conductive member 6a and having a connection area larger than the first conductive member 6a; a second external electrode 2b, connected to the second conductive member 6b and having a connection area larger than the second conductive member 6b; and sealing materials 3 for sealing the semiconductor chip 5 and the conductive members 6, in between the first and second external electrodes 2b, 2b by melting through heating and hardening. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:为了提供一种具有不使用接合线的结构的半导体器件,该半导体器件适于提高电气特性,同时确保高可靠性并且还提高生产率以提高生产率,并提供一种 制造半导体器件的方法。 解决方案:半导体器件包括半导体芯片5,其具有布置在第一表面5a上的半导体部件的第一电极5a1和布置在与第一表面5a相对的第二表面5b上的半导体部件的第二电极5b1 ; 连接到第一表面5a的第一导电构件6a; 连接到第二表面5b的第二导电构件6b; 连接到第一导电构件6a并且具有大于第一导电构件6a的连接区域的第一外部电极2a; 连接到第二导电构件6b并且具有大于第二导电构件6b的连接区域的第二外部电极2b; 以及用于通过加热和硬化熔化来密封第一和第二外部电极2b,2b之间的半导体芯片5和导电构件6的密封材料3。 版权所有(C)2009,JPO&INPIT
    • 4. 发明专利
    • Ultrasonic bonding device, and semi-conductor device manufacturing method
    • 超声波接合装置及半导体装置的制造方法
    • JP2007319876A
    • 2007-12-13
    • JP2006150612
    • 2006-05-30
    • Toshiba Corp株式会社東芝
    • TOJO HIROSHIAIZAWA TAKAHIROKITANI TOMOYUKINISHIUCHI HIDEO
    • B23K20/10B23K101/42H01L21/60H01L21/607
    • PROBLEM TO BE SOLVED: To change a component corresponding to a worn application unit at low cost when the application unit for applying ultrasonic waves in an ultrasonic bonding device is worn. SOLUTION: The ultrasonic bonding device comprises an ultrasonic horn 12 in which the ultrasonic vibration is propagated from an ultrasonic vibration generation unit, a mounting recessed part 15 formed in the ultrasonic horn 12 and having a tapered side wall surface 15a at least in a part thereof, an application block 13 having an insertion head part 19 having a truncated conical shape, a shaft part 20 extending from the insertion head part 19, and an application unit 21 formed on a fore end side of the shaft part 20 and abutted on an object 3 to be joined, a female screw part 16 formed on a part opposite to the circumference of the shaft part 20 when the insertion head part 19 is inserted in the mounting recessed part 15, and a fixing member 13 having a pass-through hole part 25 for passing the shaft part 20 therethrough, a male screw part 26 to be screwed to the female screw part 16, and a pressing part 28 to press the insertion head part 19 against the side wall surface 15a of the mounting recessed part 15. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:当在超声波接合装置中施加超声波的施加单元被磨损时,以低成本改变与磨损的应用单元相对应的部件。 解决方案:超声波接合装置包括超声波喇叭12,其中超声波振动从超声波振动发生单元传播,安装凹部15形成在超声波喇叭12中,并且具有锥形侧壁表面15a至少在 其一部分具有具有截头圆锥形状的插入头部19,从插入头部19延伸的轴部20和形成在轴部20的前端侧的施加单元21,并且抵接 在要被接合的物体3上,当插入头部19插入到安装凹部15中时,形成在与轴部20的圆周相对的部分上的阴螺纹部16以及具有通孔的固定构件13, 用于使轴部20穿过的通孔部25,与螺纹部16螺合的阳螺纹部26,以及将插入头部19压靠在内螺纹部16的侧壁面15a上的按压部28。 安装凹部15.版权所有(C)2008,JPO&INPIT
    • 5. 发明专利
    • Surface mounting diode and method of manufacturing the same
    • 表面安装二极管及其制造方法
    • JP2011159761A
    • 2011-08-18
    • JP2010019681
    • 2010-01-29
    • Toshiba Corp株式会社東芝
    • KITANI TOMOYUKITOJO HIROSHIATAGI TAKAOHIGUCHI KAZUTOIGUCHI TOMOHIROFUKUMITSU MASAKOOBATA SUSUMUASANO YUSAKU
    • H01L21/329H01L23/48H01L29/861
    • H01L21/782H01L23/48H01L2924/0002H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a semiconductor device, the polarities of which can be identified easily by appearance without causing tombstone, and to provide a method of manufacturing the semiconductor device. SOLUTION: A surface mounting diode includes: a diode chip 2 having a first main surface A1 and a second main surface A2 that face with each other; a cathode electrode 3 having an internal electrode part 3a provided on the first main surface A1 and an external electrode part 3b provided on a surface of the internal electrode part 3a; an anode electrode 4 having an internal electrode part 4a provided on a surface of the second main surface A2 and an external electrode part 4b provided on a surface of the internal electrode part 4a, wherein a thickness of the external electrode part 4b is the same as that of the external electrode part 3b of the cathode electrode; a first coating member 5 coating a peripheral surface of the internal electrode part 3a of one of either the cathode electrode and the anode electrode and a peripheral surface of the diode chip 2; and a second coating member 6 coating a peripheral surface of the internal electrode part 4a of the other of the cathode electrode and the anode electrode and having a color different from that of the first coating member 5. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种可以通过外观容易地识别其极性而不产生墓碑的半导体器件,并提供一种半导体器件的制造方法。 解决方案:表面安装二极管包括:具有彼此面对的第一主表面A1和第二主表面A2的二极管芯片2; 设置在第一主面A1上的内部电极部分3a和设置在内部电极部分3a的表面上的外部电极部分3b的阴极电极3; 设置在第二主面A2的表面上的内部电极部分4a和设置在内部电极部分4a的表面上的外部电极部分4b的阳极电极4,其中外部电极部分4b的厚度与 阴极电极的外部电极部分3b; 涂覆阴极电极和阳极电极之一的内部电极部分3a的外周表面和二极管芯片2的外围表面的第一涂覆部件5; 以及第二涂覆部件6,其涂覆阴极电极和阳极电极中的另一个的内部电极部分4a的周面,并且具有与第一涂覆部件5不同的颜色。版权所有(C)2011 ,JPO&INPIT
    • 6. 发明专利
    • Semiconductor device and method of manufacturing semiconductor device
    • 半导体器件及制造半导体器件的方法
    • JP2011066346A
    • 2011-03-31
    • JP2009217884
    • 2009-09-18
    • Toshiba Corp株式会社東芝
    • IGUCHI TOMOHIROHIGUCHI KAZUTOKITANI TOMOYUKINISHIUCHI HIDEOFUKUMITSU MASAKOTOJO HIROSHIKATO KYOKO
    • H01L23/12
    • H01L2224/34H01L2224/37599H01L2224/37647H01L2224/8385H01L2924/00014H01L2924/00012
    • PROBLEM TO BE SOLVED: To provide a semiconductor device and a method of manufacturing the semiconductor device, in which further reduction in size of the device and reduction of internal resistance are attained while the effects of manufacturing at low cost and improvement of manufacturing efficiency are maintained. SOLUTION: A semiconductor device comprises: a semiconductor element 2; a first wiring layer 3 connected with a first electrode 2a on a side of a first surface A1; a second wiring layer 4 connected with a second electrode 2b at a side of a second surface A2; an insulating layer 5 provided around the semiconductor element 2 excluding the first surface A1 and the second surface A2; a through-hole 6 passing through the side of the first surface A1 and the side of the second surface A2 in the insulating layer 5; a third wiring layer 7 provided at the side of the first surface A1 and connected with the second wiring layer 4; external electrodes 8 provided on the first wiring layer 3 and the third wiring layer 7 respectively; and an enclosure 9 sealing the side of the second surface A2 including the second wiring layer 4 and sealing the periphery of the external electrodes 8 excluding an area exposed at the side of the first surface A1, the semiconductor element 2, the first wiring layer 3, and the third wiring layer 7. COPYRIGHT: (C)2011,JPO&INPIT
    • 将要解决的问题:提供一种半导体器件和半导体器件的制造方法,其中,在制造成本低且制造性能提高的同时,实现器件尺寸的进一步减小和内阻的降低 保持效率。 解决方案:半导体器件包括:半导体元件2; 与第一面A1一侧的第一电极2a连接的第一布线层3; 与第二表面A2侧的第二电极2b连接的第二布线层4; 设置在除了第一面A1和第二面A2之外的半导体元件2周围的绝缘层5; 穿过绝缘层5中的第一表面A1侧和第二表面A2侧的通孔6; 设置在第一表面A1侧并与第二布线层4连接的第三布线层7; 设置在第一布线层3和第三布线层7上的外部电极8; 以及密封包括第二布线层4的第二表面A2的侧面并且密封外部电极8的外围的外壳9,除了暴露在第一表面A1,半导体元件2,第一布线层3 ,和第三布线层7.版权所有(C)2011,JPO&INPIT
    • 8. 发明专利
    • Semiconductor device and method for manufacturing the semiconductor device
    • 用于制造半导体器件的半导体器件和方法
    • JP2010062316A
    • 2010-03-18
    • JP2008226236
    • 2008-09-03
    • Toshiba Corp株式会社東芝
    • TOJO HIROSHIKITANI TOMOYUKIIGUCHI TOMOHIROAIZAWA TAKAHIRONISHIUCHI HIDEOOISHI MASAKO
    • H01L23/48H01L21/301H01L21/56
    • H01L21/561H01L23/3107H01L24/97H01L2924/01005H01L2924/01006H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/01074H01L2924/01075H01L2924/01078H01L2924/01082H01L2924/181H01L2924/19041H01L2924/3025H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a structure of not using a bonding wire, thereby enhancing an electric characteristic while securing the reliability, and improved in productivity by reducing a manufacturing time, and also to provide a method for manufacturing the same. SOLUTION: The semiconductor device includes: a semiconductor chip 5 in which a first electrode 5a1 of a semiconductor element is arranged on a first surface 5a, and a second electrode 5b1 of the semiconductor element is arranged on a second surface 5b opposing to the first surface 5a; a sealer 3 which is molten and hardened by heating the semiconductor chip 5 for sealing, and is provided with a first hole 3a1 and a second hole 3b1 so as to expose regions of the first electrode 5a1 and the second electrode 5b1; a first conductive member 2a connected to the first surface 5a of the semiconductor chip 5 through the first hole 3a1; a second conductive member 2b connected to the second surface 5b of the semiconductor chip 5 through the second hole 3b1; and a plating film 4 coating five faces which do not come into contact with the sealers 3 of the first conductive member 2a and the second conductive member 2b. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供一种具有不使用接合线的结构的半导体器件,从而在确保可靠性的同时提高电特性,并且通过缩短制造时间来提高生产率,并且还提供一种方法 制造相同。 解决方案:半导体器件包括:半导体芯片5,其中半导体元件的第一电极5a1布置在第一表面5a上,半导体元件的第二电极5b1布置在与半导体元件相对的第二表面5b上 第一表面5a; 通过加热用于密封的半导体芯片5熔融和硬化的密封件​​3,并且设置有第一孔3a1和第二孔3b1,以暴露第一电极5a1和第二电极5b1的区域; 通过第一孔3a1连接到半导体芯片5的第一表面5a的第一导电构件2a; 通过第二孔3b1连接到半导体芯片5的第二表面5b的第二导电构件2b; 以及涂覆不与第一导电部件2a和第二导电部件2b的密封件3接触的五个面的镀膜4。 版权所有(C)2010,JPO&INPIT