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1. 发明专利

JP2008252058A Semiconductor device and method of manufacturing same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008252058A
公开(公告)日：2008-10-16
申请号：JP2007245852
申请日：2007-09-21
申请人： Toshiba Corp , 株式会社東芝
发明人： TOJO HIROSHI , KITANI TOMOYUKI , IGUCHI TOMOHIRO , HIRAHARA MASAKO , NISHIUCHI HIDEO
IPC分类号： H01L23/48
CPC分类号： H01L2224/48091 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a structure employing no bonding wire, the semiconductor device adapted to enable improving electrical characteristics, while ensuring high reliability and also enhancing production yield to improve the productivity, and to provide a method of manufacturing the semiconductor device. SOLUTION: The semiconductor device includes a semiconductor chip 5, having a first electrode 5a1 of a semiconductor component arranged on a first surface 5a and a second electrode 5b1 of a semiconductor component arranged on a second surface 5b opposite to the first surface 5a; a first conductive member 6a connected to the first surface 5a; a second conductive member 6b, connected to the second surface 5b; a first external electrode 2a connected to the first conductive member 6a and having a connection area larger than the first conductive member 6a; a second external electrode 2b, connected to the second conductive member 6b and having a connection area larger than the second conductive member 6b; and sealing materials 3 for sealing the semiconductor chip 5 and the conductive members 6, in between the first and second external electrodes 2b, 2b by melting through heating and hardening. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种具有不使用接合线的结构的半导体器件，该半导体器件适于提高电气特性，同时确保高可靠性并且还提高生产率以提高生产率，并提供一种制造半导体器件的方法。解决方案：半导体器件包括半导体芯片5，其具有布置在第一表面5a上的半导体部件的第一电极5a1和布置在与第一表面5a相对的第二表面5b上的半导体部件的第二电极5b1 ; 连接到第一表面5a的第一导电构件6a; 连接到第二表面5b的第二导电构件6b; 连接到第一导电构件6a并且具有大于第一导电构件6a的连接区域的第一外部电极2a; 连接到第二导电构件6b并且具有大于第二导电构件6b的连接区域的第二外部电极2b; 以及用于通过加热和硬化熔化来密封第一和第二外部电极2b，2b之间的半导体芯片5和导电构件6的密封材料3。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2008182105A Method for manufacturing semiconductor device, and the semiconductor device 审中-公开
标题翻译：制造半导体器件的方法和半导体器件
公开(公告)号：JP2008182105A
公开(公告)日：2008-08-07
申请号：JP2007015179
申请日：2007-01-25
申请人： Toshiba Corp , 株式会社東芝
发明人： KITANI TOMOYUKI , IGUCHI TOMOHIRO , HIRAHARA MASAKO , NISHIUCHI HIDEO , TOJO HIROSHI , TOMIOKA TAIZO
IPC分类号： H01L23/00 , H01L21/60
CPC分类号： H01L21/78 , H01L23/29 , H01L23/291 , H01L23/293 , H01L23/298 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/19043 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To prevent a conductive layer from being shaved by a bonding tool which applies ultrasonic vibration, and to prevent mounting status variations in a semiconductor device due to shavings stuck to the bonding tool, when the semiconductor device whose conductive layer is formed in the other main plane of a semiconductor substrate, in order to reduce the electrical resistance between circuit elements formed in one main plane of the semiconductor substrate is flip-chip packaged by applying ultrasonic vibration. SOLUTION: The method for manufacturing the semiconductor device includes a process to form the conductive layer in the other main plane of a semiconductor wafer, in which circuit elements are formed in one main plane; a process of forming a protective layer which is harder to be shaved than this conductive layer in a region covering at least a part of the top of the conductive layer; and a process of cutting the semiconductor wafer by every semiconductor device. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了防止导电层被施加超声波振动的接合工具刮削，并且为了防止由于刨花粘附到接合工具而导致的半导体器件中的安装状态变化，当导电在半导体衬底的另一个主平面中形成层，以便通过施加超声波振动来减少在半导体衬底的一个主平面中形成的电路元件之间的电阻进行倒装芯片封装。解决方案：制造半导体器件的方法包括在半导体晶片的另一个主平面中形成导电层的工艺，其中电路元件形成在一个主平面中; 在覆盖所述导电层的顶部的至少一部分的区域中形成比该导电层更难剃削的保护层的工序; 以及通过每个半导体器件切割半导体晶片的工艺。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2009194155A Ultrasonic probe apparatus and method of manufacturing the ultrasonic probe apparatus 有权
标题翻译：超声探头装置及制造超声探头装置的方法
公开(公告)号：JP2009194155A
公开(公告)日：2009-08-27
申请号：JP2008033318
申请日：2008-02-14
申请人： Toshiba Corp , 株式会社東芝
发明人： ASAGIRI SATOSHI , HIRAHARA MASAKO , HARA SATORU
IPC分类号： H05K1/14 , H05K3/36
摘要： PROBLEM TO BE SOLVED: To raise bonding strength between a flexible circuit board and rigid board, and to assure desired electric performance.
SOLUTION: An ultrasonic probe apparatus 1 includes: a piezoelectric module 16 which has a supersonic vibration element 16a; a plurality of sheets of flexible circuit boards 15 which are arranged along a thickness direction and whose rear anchor sides are supported at the piezoelectric module 16 side; and a plurality of sheets of rigid boards 14 which are arranged along a thickness direction and whose ends respectively have electrode regions in which electrode patterns 21 are formed, and superposed and bonded to front edge sides of the plurality of flexible circuit boards 15 through an anisotropic conductive film 22. The surface topography of a peel region 19 of the edge side of the rear anchor sides of a connecting part 18 which is arranged in at least one of the rigid boards 14 or the flexible circuit boards 15 and bonded through the anisotropic conductive film 22 is configured to have finer irregularities than the surface topography of the center of the connecting part.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提高柔性电路板和刚性板之间的接合强度，并确保所需的电性能。解决方案：超声波探头装置1包括：具有超音速振动元件16a的压电模块16; 多个柔性电路板15，其沿着厚度方向布置并且其后固定侧支撑在压电模块16侧; 以及沿着厚度方向配置的多个刚性基板14，其端部分别具有形成有电极图案21的电极区域，并且通过各向异性层叠并接合到多个柔性电路板15的前边缘侧导电膜22.布置在至少一个刚性板14或柔性电路板15中并通过各向异性导电层连接的连接部分18的后锚固边的边缘侧的剥离区域19的表面形貌膜22被构造成具有比连接部的中心的表面形貌更细的凹凸。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2008078561A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008078561A
公开(公告)日：2008-04-03
申请号：JP2006258930
申请日：2006-09-25
申请人： Toshiba Corp , 株式会社東芝
发明人： OBATA SUSUMU , KOMATSU IZURU , IGUCHI TOMOHIRO , KITANI TOMOYUKI , HIRAHARA MASAKO , UKITA YASUNARI , HIGUCHI KAZUTO
IPC分类号： H01L21/60 , H01L23/48
CPC分类号： H01L23/49562 , H01L23/3135 , H01L23/49524 , H01L24/18 , H01L24/24 , H01L24/40 , H01L24/82 , H01L24/84 , H01L2224/18 , H01L2224/24246 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/8485 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/181 , H01L2924/19043 , H01L2924/3512 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device and its manufacturing method, which can be easily manufactured and whose internal resistance can be made further lower. SOLUTION: The semiconductor device comprises: a semiconductor element 3; a lead 4 having an electrode connected to an electrode provided on the semiconductor element 3; and a metal film 6 for electrically connecting the electrode of the semiconductor element 3 and the electrode of the lead 4. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供可以容易地制造并且可以进一步降低其内阻的高度可靠的半导体器件及其制造方法。解决方案：半导体器件包括：半导体元件3; 具有连接到设置在半导体元件3上的电极的电极的引线4; 以及用于将半导体元件3的电极和引线4的电极电连接的金属膜6.版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2005021929A Solder, and solder joined structure 审中-公开
标题翻译：焊接和焊接结合
公开(公告)号：JP2005021929A
公开(公告)日：2005-01-27
申请号：JP2003188488
申请日：2003-06-30
申请人： Toshiba Corp , 株式会社東芝
发明人： TATEYAMA KAZUKI , HIRAHARA MASAKO
IPC分类号： B23K35/26 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide lead-free solder which has excellent wettability and excellent thermal fatigue resistance.
SOLUTION: The Sn-Ag-Cu based solder comprises ≤400 ppm Pb and 400 to 1,000 ppm Bi.
COPYRIGHT: (C)2005,JPO&NCIPI

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