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1. 发明专利

JP2017118145A 半導体チップ及び半導体装置审中-公开
公开(公告)号：JP2017118145A
公开(公告)日：2017-06-29
申请号：JP2017050977
申请日：2017-03-16
申请人：株式会社東芝 , Toshiba Corp
发明人： ASANO YUSAKU , HIGUCHI KAZUTO , TOMIOKA TAIZO , IGUCHI TOMOHIRO
IPC分类号： H01L21/306 , H01L21/301
CPC分类号： H01L24/32 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83191 , H01L2924/10156 , H01L2924/00014 , H01L2924/00012
摘要：【課題】高い生産性で半導体チップを製造可能とする。【解決手段】実施形態の半導体チップは、半導体素子を含んだ表面領域を有しているチップ本体10’を具備し、前記チップ本体10’の端面29は、前記チップ本体10’の前記表面領域側の面から反対側の面へ向けて各々が延びた筋状の凹部又は凸部を、粒状の貴金属触媒に起因したエッチング痕32として有している。【選択図】図17A

2. 发明专利

JP2007324222A Optical semiconductor device 审中-公开
标题翻译：光学半导体器件
公开(公告)号：JP2007324222A
公开(公告)日：2007-12-13
申请号：JP2006150337
申请日：2006-05-30
申请人： Toshiba Corp , 株式会社東芝
发明人： INOUE MICHINOBU , TOMIOKA TAIZO
IPC分类号： H01L33/08 , H01L33/50 , H01L33/56 , H01L33/60 , H01L33/62
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide an optical semiconductor device capable of raising producing property while suppressing luminance deterioration, and obtaining a symmetrical light distribution characteristic.
SOLUTION: The optical semiconductor device 1A includes: a base material 2; a first light-emitting element 3 arranged in the base material 2 and radiating light; a second light-emitting element 4 arranged on the first light-emitting element 3, and radiating light with wavelength being different from that of the light radiated from the first light-emitting element 3; and a transmission sealing member 5 for sealing the first and second light-emitting elements 3, 4, and containing phosphors 5a for converting the wavelength of the light radiated from the first and second light-emitting elements 3, 4.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供能够提高制造性能同时抑制亮度劣化并获得对称的光分布特性的光学半导体装置。解决方案：光学半导体器件1A包括：基材2; 布置在基材2中并辐射光的第一发光元件3; 布置在第一发光元件3上的第二发光元件4，并且发射波长不同于从第一发光元件3辐射的光的波长的光; 以及用于密封第一和第二发光元件3,4并且包含用于转换从第一和第二发光元件3,4辐射的光的波长的荧光体5a的透射密封构件5。（C）2008，JPO＆INPIT

3. 发明专利

JP2007207951A Device for evaluating bump arrangement, device for supporting design of semiconductor device and manufacturing method for semiconductor device 审中-公开
标题翻译：用于评估BUMP装置的装置，用于支持半导体装置的设计的装置和用于半导体装置的制造方法
公开(公告)号：JP2007207951A
公开(公告)日：2007-08-16
申请号：JP2006023887
申请日：2006-01-31
申请人： Toshiba Corp , 株式会社東芝
发明人： KITANI TOMOYUKI , TOMIOKA TAIZO , SUGA KENTARO
IPC分类号： H01L21/60
CPC分类号： H01L24/02 , H01L24/81 , H01L2224/0401 , H01L2224/1134 , H01L2224/13099 , H01L2224/14 , H01L2224/81205 , H01L2224/81801 , H01L2924/01004 , H01L2924/01006 , H01L2924/01014 , H01L2924/01019 , H01L2924/01033 , H01L2924/351 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To reduce the manufacturing cost of a trial-manufactured chip and shorten time for designing a semiconductor device by deciding the propriety of a bump layout before trial manufacturing. SOLUTION: A control unit 31 computes torque applied to a semiconductor chip 102 on the basis of the size of the external shape of the semiconductor chip 102, the coordinates of bumps in the semiconductor chip 102, diameters of the bumps 103, and ultrasonic vibration applied to the semiconductor chip 102. The control unit 31 computes stress generated in each bump 103 by the torque, and evaluates the propriety of the arrangement of the bumps 103 on the basis of the stresses generated in each bump 103. A device for evaluating the bump arrangement has such a control unit 31. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了降低试制芯片的制造成本，缩短半导体器件的设计时间，可以通过在试制前确定凸块布局的合适性。解决方案：控制单元31基于半导体芯片102的外形尺寸，半导体芯片102中的凸块的坐标，凸块103的直径和凸起的直径来计算施加到半导体芯片102的扭矩施加到半导体芯片102的超声波振动。控制单元31通过转矩计算在每个凸起103中产生的应力，并且基于在每个凸起103中产生的应力来评估凸起103的布置的适当性。评估凸块布置具有这样的控制单元31.版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2007180227A Optical semiconductor device and its manufacturing method 有权
标题翻译：光学半导体器件及其制造方法
公开(公告)号：JP2007180227A
公开(公告)日：2007-07-12
申请号：JP2005376253
申请日：2005-12-27
申请人： Toshiba Corp , 株式会社東芝
发明人： TOMIOKA TAIZO , SUZUKI TAKAHIRO , HIGASHIKUBO HIROYUKI , AOKI YUKINORI
IPC分类号： H01L33/50 , H01L33/62 , H01L33/64
CPC分类号： H01L33/486 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2924/10253 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a thin and small optical semiconductor device excellent in heat radiation properties, and stable in production. SOLUTION: In a die pad side inner lead 4, a die pad mounting an optical semiconductor element is provided from the projecting end of the lead to a middle part, and a first bent part 21 is bent at about 40° so as to incline from a face made by a die pad to a main face mounting the optical semiconductor element. A second bent part 22 is provided at a location higher in 400 μm than the first bent part 21, and is caused to again extend to the same direction as the die pad. A die pad side outer lead 7 is located in the extending region of the inner lead 4 extending from the second bent part 22 to extend horizontally in an area outside of an envelope. A third bent part 23 provided in the middle part is bent toward a direction intersecting with a virtual plane containing the rear face of the die pad. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供散热性优异的薄且小型的半导体装置，并且生产稳定。解决方案：在芯片焊盘侧的内部引线4中，安装光学半导体元件的管芯焊盘从引线的突出端设置到中间部分，并且第一弯曲部分21以大约40°弯曲，以便从由芯片焊盘制成的表面倾斜到安装光学半导体元件的主面上。第二弯曲部22设置在比第一弯曲部21更高的400μm的位置处，并且再次延伸到与模片垫相同的方向。管芯焊盘侧外引线7位于从第二弯曲部22延伸的内引线4的延伸区域中，以在外壳的外侧的水平方向水平延伸。设置在中间部分的第三弯曲部分23朝向与包含模片垫的背面的虚拟平面相交的方向弯曲。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2006286666A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2006286666A
公开(公告)日：2006-10-19
申请号：JP2005100331
申请日：2005-03-31
申请人： Toshiba Corp , 株式会社東芝
发明人： SHIMOKAWA KAZUO , TOMIOKA TAIZO
IPC分类号： H01L21/60
CPC分类号： H01L24/83 , H01L2224/83192 , H01L2924/01322 , H01L2924/15787 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To achieve a reliable and low-cost good bonding even if it is the case where a semiconductor device is jointed to a substrate with coarse front surfaces, such as a ceramic substrate. SOLUTION: A method of manufacturing the semiconductor device includes a step of thermally compressing a golden bump 50 combined with ultrasonic wave heatment to the connection electrode 43 of the ceramic substrate 40, a step of pressurizing and flattening the golden bump 50 with a flat tool 60, and a step of supplying a flux on the golden bump 50. The method further includes a step of forming a solder film in the terminal of an LED and mounting the LED on the ceramic substrate 40, and a step of heating the ceramic substrate 40 and melting the solder film and joining the terminal and the connection electrode 43 of the LED. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：即使将半导体器件接合到具有粗糙表面的基板（例如陶瓷基板）的情况下，也可以实现可靠且低成本的良好的接合。解决方案：制造半导体器件的方法包括将与超声波加热结合的金色凸块50热压到陶瓷基板40的连接电极43的步骤，将金黄凸块50加压和平坦化的步骤平面工具60以及在金色凸块50上供给焊剂的步骤。该方法还包括在LED的端子中形成焊料膜并将LED安装在陶瓷基板40上的步骤，陶瓷基板40，并且熔化焊料膜并将LED的端子和连接电极43接合。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2003007974A Method of manufacturing laminated electrical component 审中-公开
标题翻译：制造层压电气元件的方法
公开(公告)号：JP2003007974A
公开(公告)日：2003-01-10
申请号：JP2001193928
申请日：2001-06-27
申请人： Toshiba Corp , 株式会社東芝
发明人： TOMIOKA TAIZO
IPC分类号： H01L25/16 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/16145 , H01L2224/45144 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To manufacture an electrical component of a chip-on-chip structure at high speed and at satisfactory yield. SOLUTION: Electrodes 4 for external connection and inner leads on a lead frame 6 are wire-bonded with reference to respective electrodes on a dir-bonded IC chip, and they are connected by loops 9 composed of a gold wire. An operating mode is then changed over to a ball-bump formation mode from a wire bonding mode, and ball bumps 10 are formed by a wire bonding method on electrodes 5 in the central part of the IC chip.
摘要翻译：要解决的问题：以高速和令人满意的成品率制造片上芯片结构的电气部件。解决方案：引线框架6上的外部连接用电极4和内部引线参照直接接合的IC芯片上的各个电极进行引线接合，并且由金线构成的环9连接。然后将工作模式从引线键合模式切换到球凸点形成模式，并且通过引线接合方法在IC芯片的中心部分的电极5上形成球凸块10。

7. 发明专利

JP2012069268A Battery and ultrasonic bonding method for battery 有权
标题翻译：电池电池和超声波接合方法
公开(公告)号：JP2012069268A
公开(公告)日：2012-04-05
申请号：JP2010210760
申请日：2010-09-21
申请人： Toshiba Corp , 株式会社東芝
发明人： AIZAWA TAKAHIRO , IKETANI YUKIHIRO , TOMIOKA TAIZO
IPC分类号： H01M2/26
CPC分类号： H01M2/30 , B23K20/10 , B23K2201/38 , B23K2203/10 , H01M2/263
摘要： PROBLEM TO BE SOLVED: To provide a battery and an ultrasonic bonding method for the battery, in which both low electric resistance of a lead and securing of ultrasonic bonding strength can be achieved by using ultrasonic bonding.SOLUTION: The battery comprises: a container 12; an electrode group 1 stored in the container and including a cathode and an anode; a plurality of collector tabs 2a and 2b which are extended from the cathode or the anode of the electrode group and are superposed on each other; leads 5a-5c and 6a-6c bonded to at least one of the collector tabs by ultrasonic bonding; a lid 11 covering an opening of the container; and external terminals 9 and 10 provided on the lid 11 and connected to the collector tabs via the leads. Cross-sectional areas of the leads are increased on the way from the ultrasonically bonded portions between the leads and the collector tabs to the external terminals.
摘要翻译：要解决的问题：提供一种电池的电池和超声波接合方法，其中通过使用超声波接合可以实现引线的低电阻和超声波接合强度的确保。电池包括：容器12; 存储在容器中并包括阴极和阳极的电极组1; 从电极组的阴极或阳极延伸并叠置的多个集电片2a和2b; 引线5a-5c和6a-6c通过超声波接合结合到至少一个收集片; 覆盖容器的开口的盖11; 以及设置在盖11上的外部端子9和10，并且经由引线连接到收集器突出部。引线的横截面积在从引线和收集器突片之间的超声波接合部分到外部端子的路上增加。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2011120968A Paste supply device and paste supply method 审中-公开
标题翻译：浆料供应设备和浆料供应方法
公开(公告)号：JP2011120968A
公开(公告)日：2011-06-23
申请号：JP2009278416
申请日：2009-12-08
申请人： Toshiba Corp , 株式会社東芝
发明人： TOMIOKA TAIZO
IPC分类号： B05C5/00 , B05D1/26 , B05D7/24
摘要： PROBLEM TO BE SOLVED: To improve the productivity by shortening a paste supply time while suppressing an increase of a device cost and device breakage, and to supply thick paste stably.
SOLUTION: A paste supply device includes: a block 5a that has a first route K1 and a second route K2 connected to a side surface of the first route K1; an injection mechanism 5b which injects the paste into the second route K2 and extrudes it to the first route K1; a piston 5c which is reciprocatably provided in the first route K1, and is configured to cut out the paste P extruded from the second route K2 to the first route K1 and put it out of the block 5a from the first route K1; and a driving mechanism 5d which reciprocates the piston 5c.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过缩短糊剂供应时间同时抑制装置成本和装置破损的增加，并且稳定地供应稠糊，从而提高生产率。糊剂供给装置包括：块5a，其具有连接到第一路线K1的侧面的第一路线K1和第二路线K2; 注入机构5b，其将糊剂注入第二路线K2并将其挤出到第一路线K1; 活塞5c，其可往复运动地设置在第一路线K1中，并且被构造成将从第二路线K2挤出的浆料P切割成第一路线K1，并从第一路线K1将其从车厢5a中排出; 以及使活塞5c往复运动的驱动机构5d。版权所有（C）2011，JPO＆INPIT

9. 发明专利

JP2009105497A Portable electronic device 审中-公开
标题翻译：便携式电子设备
公开(公告)号：JP2009105497A
公开(公告)日：2009-05-14
申请号：JP2007272983
申请日：2007-10-19
申请人： Toshiba Corp , 株式会社東芝
发明人： TOMIOKA TAIZO
IPC分类号： H04M1/02 , G06F1/16 , G06F1/26
CPC分类号： H05K5/0217 , G06F1/1626 , G06F1/1656 , H04M1/0206
摘要： PROBLEM TO BE SOLVED: To provide a portable electronic device which can be reduced in thickness and imparted with sufficient mechanical strength. SOLUTION: The portable communication terminal 100 comprises two hollow metal cases 5 and 6 extending on both sides along the longitudinal direction. A display unit 1, an input unit 2, a microphone 3 and the like are arranged in the longitudinal direction of the terminal 10, between the metal cases 5 and 6, and a resin 14 is applied to the resultant structure to mold together with the metal cases 5 and 6. COPYRIGHT: (C)2009,JPO&INPIT

10. 发明专利

JP2008300680A Mounting machine of electronic component, and manufacturing method for circuit board 审中-公开
标题翻译：电子元器件安装机及电路板制造方法
公开(公告)号：JP2008300680A
公开(公告)日：2008-12-11
申请号：JP2007145894
申请日：2007-05-31
申请人： Toshiba Corp , 株式会社東芝
发明人： FUKUYOSHI HIROSHI , TOMIOKA TAIZO , FUKUCHI YOSHIHARU
IPC分类号： H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide a mounting machine of electronic components that can form a solder junction suitable for each of the electronic components, and to provide a manufacturing method for circuit boards.
SOLUTION: A mask 10 having an opening 11 of a fixed thickness is brought into contact with a substrate 30, having a concave portion 32 and a pattern 31 on the top surface, and the opening 11 is filled with solder 50 by squeegee equipment 20, having many segmented squeegees 21, with their vertical and movement directions limited to form a solder junction 51. Electronic components are mounted on this junction.
COPYRIGHT: (C)2009,JPO&INPIT

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