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1. 发明授权

US06563300B1 Method and apparatus for fault detection using multiple tool error signals 有权
标题翻译：使用多个刀具误差信号进行故障检测的方法和装置
公开(公告)号：US06563300B1
公开(公告)日：2003-05-13
申请号：US09832781
申请日：2001-04-11
申请人： Timothy L. Jackson , Richard J. Markle , Edward C. Stewart
发明人： Timothy L. Jackson , Richard J. Markle , Edward C. Stewart
IPC分类号： G01R3100
CPC分类号： G01R31/2894 , Y10S707/99945 , Y10S707/99948
摘要： A method for detecting faults in a manufacturing line includes processing a plurality of workpieces in a plurality of tools; generating a first error signal associated with the workpieces based on the processing performed in a first tool of the plurality of tools; generating a second error signal associated with the workpieces based on the processing performed in a second tool of the plurality of tools; combining the first and second error signals to generate a composite error signal; and identifying a fault condition with the workpieces based on the composite error signal. A manufacturing system includes a plurality of tools adapted to process workpieces, and a fault monitor. The fault monitor is adapted to receive a first error signal associated with the workpieces based on the processing performed in a first tool of the plurality of tools, receive a second error signal associated with the workpieces based on the processing performed in a second tool of the plurality of tools, combine the first and second error signals to generate a composite error signal, and identify a fault condition with the workpieces based on the composite error signal.
摘要翻译：一种用于检测生产线中的故障的方法，包括在多个工具中处理多个工件; 基于在所述多个工具的第一工具中执行的处理来生成与所述工件相关联的第一错误信号; 基于在所述多个工具的第二工具中执行的处理，生成与所述工件相关联的第二误差信号; 组合第一和第二误差信号以产生复合误差信号; 并根据复合误差信号识别工件的故障状况。制造系统包括适于处理工件的多个工具和故障监视器。故障监视器适于基于在多个工具的第一工具中执行的处理来接收与工件相关联的第一错误信号，基于在工件的第二工具中执行的处理来接收与工件相关联的第二错误信号多个工具，组合第一和第二误差信号以产生复合误差信号，并且基于复合误差信号识别与工件的故障状况。

2. 发明授权

US06925347B1 Process control based on an estimated process result 有权
标题翻译：基于估计过程结果的过程控制
公开(公告)号：US06925347B1
公开(公告)日：2005-08-02
申请号：US10223174
申请日：2002-08-19
申请人： Michael L. Miller , Thomas J. Sonderman , Alexander J. Pasadyn , Richard J. Markle , Brian K. Cusson , Patrick M. Cowan , Timothy L. Jackson , Naomi M. Jenkins
发明人： Michael L. Miller , Thomas J. Sonderman , Alexander J. Pasadyn , Richard J. Markle , Brian K. Cusson , Patrick M. Cowan , Timothy L. Jackson , Naomi M. Jenkins
IPC分类号： G05B19/418 , G06F19/00
CPC分类号： G05B19/41875 , G05B2219/45031 , Y02P90/22
摘要： A method and apparatus is provided for a process control based on an estimated process result. The method comprises processing a workpiece using a processing tool, receiving trace data associated with the processing of the workpiece from the processing tool and estimating at least one process result of the workpiece based on at least a portion of the received trace data. The method further comprises adjusting processing of a next workpiece based on the estimated at least one process result.
摘要翻译：基于估计的处理结果提供了用于过程控制的方法和装置。该方法包括使用处理工具处理工件，从处理工具接收与工件的处理相关联的跟踪数据，并基于所接收的跟踪数据的至少一部分估计工件的至少一个处理结果。该方法还包括基于估计的至少一个处理结果来调整下一个工件的处理。

3. 发明授权

US06988225B1 Verifying a fault detection result based on a process control state 有权
标题翻译：基于过程控制状态验证故障检测结果
公开(公告)号：US06988225B1
公开(公告)日：2006-01-17
申请号：US10285003
申请日：2002-10-31
申请人： Matthew A. Purdy , Richard J. Markle , Timothy L. Jackson
发明人： Matthew A. Purdy , Richard J. Markle , Timothy L. Jackson
IPC分类号： G06F11/00
CPC分类号： G05B23/0262
摘要： A method and an apparatus are provided for verifying a fault detection result in a system. The apparatus includes an interface and a control unit. The interface is adapted to receive data associated with a process operation and adapted to receive information provided by a process controller associated with the process operation. The control unit, which is communicatively coupled to the interface, is adapted to perform a fault detection analysis based on the data associated with the process operation and verify a result of the fault detection analysis based on the information provided by the process controller.
摘要翻译：提供了一种用于验证系统中的故障检测结果的方法和装置。该装置包括接口和控制单元。接口适于接收与过程操作相关联的数据，并且适于接收由过程操作相关联的过程控制器提供的信息。通信地耦合到接口的控制单元适于基于与处理操作相关联的数据执行故障检测分析，并且基于由过程控制器提供的信息来验证故障检测分析的结果。

4. 发明授权

US07755204B2 Stacked die module including multiple adhesives that cure at different temperatures 有权
标题翻译：堆叠模具包括在不同温度下固化的多种粘合剂
公开(公告)号：US07755204B2
公开(公告)日：2010-07-13
申请号：US10672750
申请日：2003-09-25
申请人： Chad A. Cobbley , Timothy L. Jackson
发明人： Chad A. Cobbley , Timothy L. Jackson
IPC分类号： H01L23/02 , H01L29/40 , H01L21/00
CPC分类号： H01L25/50 , H01L22/20 , H01L23/481 , H01L24/48 , H01L25/0657 , H01L2224/05599 , H01L2224/16 , H01L2224/32145 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L2225/0651 , H01L2225/06541 , H01L2225/06555 , H01L2225/06562 , H01L2225/06579 , H01L2225/06596 , H01L2924/00014 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , Y10T156/10 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked up by the stacking tip. The first die is coated with an adhesive on the underside of the die. The first die is brought in contact with a second die via the stacking tip. The second die is coupled to the first die via the adhesive on the underside of the first die. The second die is coated with an adhesive coating on the underside of the die. The second die is then brought in contact with a third die via the stacking tip. The third die is coupled to the second die via the adhesive on the underside of the second die, and so forth. Die stacks are formed without being coupled to a substrate. The die stacks may be functionally and/or environmentally tested before attaching the die stack to a substrate.
摘要翻译：一种用于形成模具叠层的技术。具体地，提供了堆叠顶端以便于以期望的构造堆叠模具。第一个模具被堆垛顶部拾起。第一个模具在模具的下侧涂有粘合剂。第一模具通过堆叠顶端与第二模具接触。第二管芯通过第一管芯的下侧上的粘合剂与第一管芯相连。第二个模具在模具的下侧涂有粘合剂涂层。然后通过堆叠顶端将第二模具与第三模具接触。第三模具通过第二模具的下侧上的粘合剂连接到第二模具，等等。在不耦合到衬底的情况下形成管芯堆叠。在将管芯堆叠连接到衬底之前，管芯堆叠可以是功能和/或环境测试的。

5. 发明授权

US07355273B2 Semiconductor dice having back side redistribution layer accessed using through-silicon vias, methods 有权
标题翻译：具有使用硅通孔进行访问的背侧再分配层的半导体管芯，方法
公开(公告)号：US07355273B2
公开(公告)日：2008-04-08
申请号：US11110431
申请日：2005-04-20
申请人： Timothy L. Jackson , Tim E. Murphy
发明人： Timothy L. Jackson , Tim E. Murphy
IPC分类号： H01L23/02
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/76898 , H01L23/481 , H01L23/525 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/50 , H01L2224/02313 , H01L2224/02372 , H01L2224/0401 , H01L2224/05599 , H01L2224/13024 , H01L2224/13111 , H01L2224/16145 , H01L2224/16225 , H01L2224/29116 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/48463 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： An apparatus and method of rerouting redistribution lines from an active surface of a semiconductor substrate to a back surface thereof and assembling and packaging individual and multiple semiconductor dice with such rerouted redistribution lines formed thereon. The semiconductor substrate includes one or more vias having conductive material formed therein and which extend from an active surface to a back surface of the semiconductor substrate. The redistribution lines are patterned on the back surface of the semiconductor substrate, extending from the conductive material in the vias to predetermined locations on the back surface of the semiconductor substrate that correspond with an interconnect pattern of another substrate for interconnection thereto.
摘要翻译：将再分配线从半导体衬底的有源表面重新路由到其后表面的装置和方法，以及组装和封装具有形成在其上的这种重新分布线路的单个和多个半导体管芯。半导体衬底包括其中形成有导电材料并且从半导体衬底的有源表面延伸到后表面的一个或多个通孔。再分配线在半导体衬底的背表面上被图案化，从通孔中的导电材料延伸到与半导体衬底的背表面上的预定位置相对应的另一个衬底的互连图案以便与之互连。

6. 发明授权

US06506681B2 Thin flip—chip method 有权
标题翻译：薄倒装芯片方法
公开(公告)号：US06506681B2
公开(公告)日：2003-01-14
申请号：US09731360
申请日：2000-12-06
申请人： Ford B. Grigg , Timothy L. Jackson
发明人： Ford B. Grigg , Timothy L. Jackson
IPC分类号： H01L2100
CPC分类号： H01L21/78 , H01L21/563 , H01L21/565 , H01L24/29 , H01L2224/05573 , H01L2224/05609 , H01L2224/05611 , H01L2224/05616 , H01L2224/05639 , H01L2224/05644 , H01L2224/16225 , H01L2224/274 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/83104 , H01L2224/83191 , H01L2224/83856 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/00 , H01L2924/013 , H01L2924/00014
摘要： Methods for thinning a bumped semiconductor wafer, as well as methods for producing flip-chips of very thin profiles, are disclosed. According to the methods of the present invention, a mold compound is interspersed between conductive bumps on the active face of a wafer to provide support and protection for the wafer structure both during and after a process of removing the wafer's inactive backside silicon surface. The mold compound also serves to preserve the integrity of the conductively bumped aspects of the wafer during subsequent processing and may, after the wafer is diced, act as all or part of an underfill material for flip-chip applications.
摘要翻译：公开了用于减薄凸起的半导体晶片的方法以及用于制造非常薄型的倒装芯片的方法。根据本发明的方法，模具化合物散布在晶片的有源面上的导电凸块之间，以在去除晶片的无活性背面硅表面的过程中和之后提供晶片结构的支撑和保护。模具化合物还用于在随后的处理期间保持晶片的导电凸起的方面的完整性，并且在晶片被切割之后，可充当用于倒装芯片应用的底部填充材料的全部或部分。

7. 发明授权

US06962867B2 Methods of fabrication of semiconductor dice having back side redistribution layer accessed using through-silicon vias and assemblies thereof 失效
标题翻译：使用硅通孔及其组件访问具有背侧再分布层的半导体晶片的制造方法
公开(公告)号：US06962867B2
公开(公告)日：2005-11-08
申请号：US10732558
申请日：2003-12-10
申请人： Timothy L. Jackson , Tim E. Murphy
发明人： Timothy L. Jackson , Tim E. Murphy
IPC分类号： H01L21/56 , H01L21/768 , H01L23/48 , H01L23/525 , H01L25/065 , H01L21/4763 , H01L21/44
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/76898 , H01L23/481 , H01L23/525 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/50 , H01L2224/02313 , H01L2224/02372 , H01L2224/0401 , H01L2224/05599 , H01L2224/13024 , H01L2224/13111 , H01L2224/16145 , H01L2224/16225 , H01L2224/29116 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/48463 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： An apparatus and method of rerouting redistribution lines from an active surface of a semiconductor substrate to a back surface thereof and assembling and packaging individual and multiple semiconductor dice with such rerouted redistribution lines formed thereon. The semiconductor substrate includes one or more vias having conductive material formed therein and which extend from an active surface to a back surface of the semiconductor substrate. The redistribution lines are patterned on the back surface of the semiconductor substrate, extending from the conductive material in the vias to predetermined locations on the back surface of the semiconductor substrate that correspond with an interconnect pattern of another substrate for interconnection thereto.
摘要翻译：将再分配线从半导体衬底的有源表面重新路由到其后表面的装置和方法，以及组装和封装具有形成在其上的这种重新分布线路的单个和多个半导体管芯。半导体衬底包括其中形成有导电材料并且从半导体衬底的有源表面延伸到后表面的一个或多个通孔。再分配线在半导体衬底的背表面上被图案化，从通孔中的导电材料延伸到与半导体衬底的背表面上的预定位置相对应的另一个衬底的互连图案以便与之互连。

8. 发明授权

US06244064B1 Combination toolbox-cooler device 失效
标题翻译：组合工具箱 - 冷却器装置
公开(公告)号：US06244064B1
公开(公告)日：2001-06-12
申请号：US09444876
申请日：1999-11-22
申请人： Arthur Powell , Melvin T. Willis, Sr. , Maurice L. Monroe , Timothy L. Jackson , Benjamin Scandrett
发明人： Arthur Powell , Melvin T. Willis, Sr. , Maurice L. Monroe , Timothy L. Jackson , Benjamin Scandrett
IPC分类号： F25D308
CPC分类号： A45C15/00 , B25H3/023 , B25H3/028 , F25D3/00 , F25D23/12 , F25D2331/804
摘要： A tool box section and a cooler section are integrally formed as one device. The toolbox portion is a typical tool box having a plurality of stacking tool trays with a latching means for securing said trays together. The stacked and latched tool trays thereby form the upper portion of the toolbox section. The lower portion forms a rectangular box having an open face and a half open top. Carried by approximately half of the lower portion, in the open top area, are a plurality of sliding tool drawers that slide open through the open face of the lower portion of the toolbox section. Carried by approximately the other half of the lower portion is the cooler section. The cooler section comprises a hinged lid having a cavity opposite the hinged end for inserting fingers to facilitate lifting of the lid. The cooler section slides in and out of the lower portion via a well known means such as a tongue-and-groove, protrusion-and-track, or wheel-and-track arrangement.
摘要翻译：工具箱部分和冷却器部分一体地形成为一个装置。工具箱部分是具有多个堆叠工具托盘的典型工具箱，其具有用于将所述托盘固定在一起的闩锁装置。堆叠和锁定的工具托盘因此形成工具箱部分的上部。下部形成具有开口面和半开口顶部的矩形框。在敞开的顶部区域中，大约一半的下部部分是多个滑动工具抽屉，其通过工具箱部分的下部的开口面向外滑动。较低部分的大约另一半所携带的是冷却器部分。冷却器部分包括具有与铰接端相对的空腔的铰接盖，用于插入手指以便于盖的提升。冷却器部分通过诸如榫槽，突起和轨道或轮和轨道布置的众所周知的装置滑入和滑出下部。

9. 发明授权

US5410124A Tracking sensor fixture and method for tracking reference locations on a moving semiconductor leadframe strip 失效
标题翻译：跟踪传感器夹具和跟踪移动半导体引线框带上的参考位置的方法
公开(公告)号：US5410124A
公开(公告)日：1995-04-25
申请号：US40465
申请日：1993-04-01
申请人： Timothy L. Jackson
发明人： Timothy L. Jackson
IPC分类号： B23K26/04 , H01L21/00 , H01L21/68 , B23K26/00
CPC分类号： H01L21/67144 , B23K26/04 , H01L21/681 , Y10T29/49121 , Y10T29/53091
摘要： A tracking sensor fixture for mounting an optic sensor and for positioning reference locations on semiconductor leadframe strips with the sight line of the sensor is provided. The tracking sensor fixture includes a movable support frame and a guide member mounted to the support frame. The guide member includes a roller bearing that is biased into contact with an edge of a moving leadframe strip, regardless of the vertical location of the leadframe strip, by a spring acting on the movable support frame.
摘要翻译：提供了一种用于安装光学传感器并用于将参考位置定位在具有传感器的视线的半导体引线框带上的跟踪传感器夹具。跟踪传感器夹具包括可移动支撑框架和安装到支撑框架上的引导构件。引导构件包括滚子轴承，其通过作用在可移动支撑框架上的弹簧而被偏置成与运动的引线框架条的边缘接触，而不管引线框条的垂直位置如何。

10. 发明授权

US07811903B2 Thin flip-chip method 有权
标题翻译：薄倒装芯片方法
公开(公告)号：US07811903B2
公开(公告)日：2010-10-12
申请号：US11923832
申请日：2007-10-25
申请人： Ford B. Grigg , Timothy L. Jackson
发明人： Ford B. Grigg , Timothy L. Jackson
IPC分类号： H01L21/30 , H01L21/78 , H01L21/50
CPC分类号： H01L21/78 , H01L21/563 , H01L21/565 , H01L24/29 , H01L2224/05573 , H01L2224/05609 , H01L2224/05611 , H01L2224/05616 , H01L2224/05639 , H01L2224/05644 , H01L2224/16225 , H01L2224/274 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/83104 , H01L2224/83191 , H01L2224/83856 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/00 , H01L2924/013 , H01L2924/00014
摘要： Methods for thinning a bumped semiconductor wafer, as well as methods for producing flip-chips of very thin profiles, are disclosed. According to the methods of the present invention, a mold compound is interspersed between conductive bumps on the active face of a wafer to provide support and protection for the wafer structure both during and after a process of removing the wafer's inactive back side silicon surface. The mold compound also serves to preserve the integrity of the conductively bumped aspects of the wafer during subsequent processing and may, after the wafer is diced, act as all or part of an underfill material for flip-chip applications.
摘要翻译：公开了用于减薄凸起的半导体晶片的方法以及用于制造非常薄型的倒装芯片的方法。根据本发明的方法，模具化合物散布在晶片的有源面上的导电凸起之间，以在去除晶片的非活性背面硅表面的过程中和之后提供晶片结构的支撑和保护。模具化合物还用于在随后的处理期间保持晶片的导电凸起的方面的完整性，并且在晶片被切割之后，可充当用于倒装芯片应用的底部填充材料的全部或部分。

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