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1. 发明授权

US06684124B2 Method for controlling a processing device for a sequential processing of semiconductor wafers 有权
标题翻译：用于控制用于半导体晶片的顺序处理的处理装置的方法
公开(公告)号：US06684124B2
公开(公告)日：2004-01-27
申请号：US10134106
申请日：2002-04-29
申请人： Thorsten Schedel , Karl Schumacher , Thomas Fischer , Heiko Hommen , Ralf Otto , Sebastian Schmidt
发明人： Thorsten Schedel , Karl Schumacher , Thomas Fischer , Heiko Hommen , Ralf Otto , Sebastian Schmidt
IPC分类号： G06F1900
CPC分类号： G03F7/70525 , G03F7/70625 , G03F7/70633 , H01L22/20
摘要： While a first leading semiconductor wafer (11) already processed in a process appliance (1) and belonging to a batch is being measured in a microscope measuring instrument (2) in relation to values for the structure parameters 30, a second or further semiconductor wafer (12) belonging to the batch is processed in the process appliance (1). An event signal (100) reports, for example, an inspection carried out successfully of the first wafer, so that the following wafers (12) no longer need to be inspected. Using the measured results, the process parameters (31) of the process appliance (1) are automatically readjusted. Events such as maintenance work or parameter drifts in trend maps etc. are detected in control units (8 or 9) and, via the output of an event signal (102), for example in an event database (40), lead to the event-based selection of structure parameters (30′) to be measured and/or to the initiation of a leading wafer (11). Limiting-value violations (21) of at least one process parameter (31), detected by a control unit (8), are responded to by a warning signal (101) and likewise fed into the event database (40).
摘要翻译：虽然已经在处理器具（1）中处理并属于批次的第一个领先的半导体晶片（11）在显微镜测量仪器（2）中相对于结构参数30的值被测量，第二或另外的半导体晶片（12）在处理器具（1）中进行处理。事件信号（100）报告例如第一晶片成功执行的检查，使得不再需要检查以下晶片（12）。使用测量结果，自动重新调整过程设备（1）的过程参数（31）。在控制单元（8或9）中检测诸如维护工作或趋势图中参数漂移的事件，并且例如在事件数据库（40）中，通过事件信号（102）的输出导致事件对待测量的结构参数（30'）和/或引导晶片（11）的启动进行选择。由控制单元（8）检测到的至少一个处理参数（31）的限制值违反（21）由警告信号（101）响应，并且同样馈送到事件数据库（40）中。

2. 发明授权

US06979522B2 Method for exposing at least one or at least two semiconductor wafers 失效
标题翻译：用于暴露至少一个或至少两个半导体晶片的方法
公开(公告)号：US06979522B2
公开(公告)日：2005-12-27
申请号：US10635583
申请日：2003-08-06
申请人： Heiko Hommen , Ralf Otto , Thorsten Schedel , Sebastian Schmidt , Thomas Fischer
发明人： Heiko Hommen , Ralf Otto , Thorsten Schedel , Sebastian Schmidt , Thomas Fischer
IPC分类号： G03F7/20 , G03F9/00 , H01L21/027 , G03C5/00
CPC分类号： G03F7/70633 , G03F9/7046
摘要： A batch of semiconductor wafers are exposed after an alignment in a wafer stepper or scanner and each of their alignment parameters are determined. Using, e.g., a linear formula with tool specific coefficients, the overlay accuracy can be calculated from these alignment parameters in advance with a high degree of accuracy as if a measurement with an overlay inspection tool had been performed. The exposure tool-offset can be adjusted on a wafer-to-wafer basis to correct for the derived overlay inaccuracy. Moreover, the alignment parameters for a specific wafer can be used to change the tool-offset for the same wafer prior to exposure. The required inspection tool capacity is advantageously reduced, the wafer rework decreases, and time is saved to perform the exposure step.
摘要翻译：一批半导体晶片在晶片步进器或扫描仪中对齐后进行曝光，并确定其每个对准参数。使用例如具有刀具特定系数的线性公式，可以以高精确度的方式从这些对准参数中预先计算覆盖精度，如同已经执行了覆盖检查工具的测量一样。可以在晶圆到晶圆的基础上调整曝光工具偏移量，以校正衍生的叠加误差。此外，特定晶片的对准参数可用于在曝光之前改变相同晶片的刀具偏移。所需的检查工具容量有利地减少，晶片返工减少，并节省时间以执行曝光步骤。

3. 发明申请

US20050260510A1 Method for determining the relative positional accuracy of two structure elements on a wafer 有权
标题翻译：用于确定晶片上两个结构元件的相对位置精度的方法
公开(公告)号：US20050260510A1
公开(公告)日：2005-11-24
申请号：US10950165
申请日：2004-09-24
申请人： Heiko Hommen , Jens Stacker , Maria de la Piedad Fernandez-Martinez , Jens Bruch , Thorsten Schedel
发明人： Heiko Hommen , Jens Stacker , Maria de la Piedad Fernandez-Martinez , Jens Bruch , Thorsten Schedel
IPC分类号： G03F7/20 , G03F9/00 , H01L21/66 , H01L23/544 , G03C5/00
CPC分类号： G03F7/70633 , H01L22/34 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A measurement mark (3) for determining the relative positional accuracy of a progressive projection onto a wafer (5), the projection being performed with two masks (3, 4), comprising two structure elements (10, 20) formed on a respective one of the masks (1, 2). The structure elements (10, 20) overlap with regard to their position on the masks so that, during the projection of the second structure element (20), an electrically conductive structure (30) formed on the basis of the first structure element on the wafer (5) is overformed by removal of a portion (31). In an electrical line width measurement, the reduced width (CD, CD30a) of the structure (30) is measured and compared either with the original width (62) or with that width (CD30b) of a further partial element (30b) produced by the overforming.
摘要翻译：一种用于确定在晶片（5）上的逐行投影的相对位置精度的测量标记（3），所述投影由两个掩模（3,4）执行，包括形成在相应的一个上的两个结构元件（10,20）的面罩（1,2）。结构元件（10,20）关于它们在掩模上的位置重叠，使得在第二结构元件（20）的突出期间，形成在第一结构元件的基础上的导电结构（30）晶片（5）通过去除部分（31）而变形。在电线宽度测量中，测量结构（30）的减小的宽度（CD，CD'30a），并将其与原始宽度（62）或与该宽度（CD < 30b）通过过度成形而产生的另一部分元件（30b）。

4. 发明授权

US07186484B2 Method for determining the relative positional accuracy of two structure elements on a wafer 有权
标题翻译：用于确定晶片上两个结构元件的相对位置精度的方法
公开(公告)号：US07186484B2
公开(公告)日：2007-03-06
申请号：US10950165
申请日：2004-09-24
申请人： Heiko Hommen , Jens Stäcker , Maria de la Piedad Fernandez-Martinez , Jens Uwe Bruch , Thorsten Schedel
发明人： Heiko Hommen , Jens Stäcker , Maria de la Piedad Fernandez-Martinez , Jens Uwe Bruch , Thorsten Schedel
IPC分类号： G03F9/00
CPC分类号： G03F7/70633 , H01L22/34 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A measurement mark (3) for determining the relative positional accuracy of a progressive projection onto a wafer (5), the projection being performed with two masks (3, 4), comprising two structure elements (10, 20) formed on a respective one of the masks (1, 2). The structure elements (10, 20) overlap with regard to their position on the masks so that, during the projection of the second structure element (20), an electrically conductive structure (30) formed on the basis of the first structure element on the wafer (5) is overformed by removal of a portion (31). In an electrical line width measurement, the reduced width (CD, CD30a) of the structure (30) is measured and compared either with the original width (62) or with that width (CD30b) of a further partial element (30b) produced by the overforming.
摘要翻译：一种用于确定在晶片（5）上的逐行投影的相对位置精度的测量标记（3），所述投影由两个掩模（3,4）执行，包括形成在相应的一个上的两个结构元件（10,20）的面罩（1,2）。结构元件（10,20）关于它们在掩模上的位置重叠，使得在第二结构元件（20）的突出期间，形成在第一结构元件的基础上的导电结构（30）晶片（5）通过去除部分（31）而变形。在电线宽度测量中，测量结构（30）的减小的宽度（CD，CD'30a），并将其与原始宽度（62）或与该宽度（CD < 30b）通过过度成形而产生的另一部分元件（30b）。

5. 发明申请

US20050105073A1 Method for carrying out a double or multiple exposure 有权
标题翻译：进行双重或多次曝光的方法
公开(公告)号：US20050105073A1
公开(公告)日：2005-05-19
申请号：US10948570
申请日：2004-09-24
申请人： Jens Stacker , Heiko Hommen , Jens Bruch , Marlene Strobl , Karl Schumacher
发明人： Jens Stacker , Heiko Hommen , Jens Bruch , Marlene Strobl , Karl Schumacher
IPC分类号： G03B27/42 , G03F1/00 , G03F7/20
CPC分类号： G03F7/70466 , G03F7/70733
摘要： The mutually associated structure patterns, which are provided on one mask, or a plurality of masks for a double or multiple exposure can be received by the mask substrate holder. The mask substrate holder has two receiving stations one for each of the masks. Alternatively, both structure patterns for the double exposure are formed on one mask. The substrate holder has one receiving station. The substrate holder, is displaced from the section including first structure pattern to the second, between the two exposure operations, without the masks having to be loaded or unloaded, and realigned.
摘要翻译：提供在一个掩模上的相互关联的结构图案或用于双重或多次曝光的多个掩模可以被掩模基板保持器接收。掩模基板保持器具有两个用于每个掩模的接收站。或者，双曝光的两种结构图案都形成在一个掩模上。基板支架有一个接收台。在两个曝光操作之间，衬底保持器从包括第一结构图案的部分移动到第二结构图案，而不必将掩模装载或卸载，并重新对准。

6. 发明申请

US20080079920A1 Wafer exposure device and method 审中-公开
标题翻译：晶圆曝光装置及方法
公开(公告)号：US20080079920A1
公开(公告)日：2008-04-03
申请号：US11541400
申请日：2006-09-29
申请人： Heiko Hommen , Norman Birnstein , Karl Schumacher , Jens Staecker
发明人： Heiko Hommen , Norman Birnstein , Karl Schumacher , Jens Staecker
IPC分类号： G03B27/52
CPC分类号： G03F7/7085 , G03F9/7026 , G03F9/7088 , H01L21/681
摘要： A wafer exposure device includes a wafer stage. An optical exposure system exposes a wafer on the wafer stage. A sensor block measures a distance to a wafer provided on the wafer stage. The sensor block includes a plurality of height level sensors. Each height level sensor measures and outputs height level values. The wafer exposure device compares with one another the measured height level values outputted by respective height level sensors. The wafer exposure device calculates individual sensor position offset values to be attributed to the individual height level sensors. The wafer exposure device corrects the measured height level values output by the respective height level sensors using the calculated sensor position offset values of the respective height level sensor.
摘要翻译：晶片曝光装置包括晶片台。光学曝光系统在晶片台上露出晶片。传感器块测量到设置在晶片台上的晶片的距离。传感器块包括多个高度水平传感器。每个高度传感器测量并输出高度值。晶片曝光装置将相应的高度电平传感器输出的测量高度电平值彼此进行比较。晶片曝光装置计算归因于各个高度传感器的各个传感器位置偏移值。晶片曝光装置使用计算出的相应高度传感器的传感器位置偏移值来校正由各个高度传感器输出的测量高度值。

7. 发明授权

US07310129B2 Method for carrying out a double or multiple exposure 有权
标题翻译：进行双重或多次曝光的方法
公开(公告)号：US07310129B2
公开(公告)日：2007-12-18
申请号：US10948570
申请日：2004-09-24
申请人： Jens Stäcker , Heiko Hommen , Jens Uwe Bruch , Marlene Strobl , Karl Schumacher
发明人： Jens Stäcker , Heiko Hommen , Jens Uwe Bruch , Marlene Strobl , Karl Schumacher
IPC分类号： G03B27/42 , G03B27/44 , G03B27/62 , G03B27/32 , G03C5/00
CPC分类号： G03F7/70466 , G03F7/70733
摘要： The mutually associated structure patterns, which are provided on one mask, or a plurality of masks for a double or multiple exposure can be received by the mask substrate holder. The mask substrate holder has two receiving stations one for each of the masks. Alternatively, both structure patterns for the double exposure are formed on one mask. The substrate holder has one receiving station. The substrate holder, is displaced from the section including first structure pattern to the second, between the two exposure operations, without the masks having to be loaded or unloaded, and realigned.
摘要翻译：提供在一个掩模上的相互关联的结构图案或用于双重或多次曝光的多个掩模可以被掩模基板保持器接收。掩模基板保持器具有两个用于每个掩模的接收站。或者，双曝光的两种结构图案都形成在一个掩模上。基板支架有一个接收台。在两个曝光操作之间，衬底保持器从包括第一结构图案的部分移动到第二结构图案，而不必将掩模装载或卸载，并重新对准。

8. 发明授权

US06896999B2 Method of exposing a semiconductor wafer in an exposer 失效
标题翻译：在曝光器中曝光半导体晶片的方法
公开(公告)号：US06896999B2
公开(公告)日：2005-05-24
申请号：US10465294
申请日：2003-06-19
申请人： Jens Stäcker , Heiko Hommen
发明人： Jens Stäcker , Heiko Hommen
IPC分类号： G03F9/00 , G03C5/00
CPC分类号： G03F9/708
摘要： A method for exposing a semiconductor wafer in an exposer includes applying a first resist layer on a layer covering an alignment mark. A microscope measuring instrument, which has a visible and an ultraviolet light source, uses the visible light source for aligning the wafer and uses the ultraviolet light source for exposing a region in the first resist layer above the alignment mark without using a mask to free expose the alignment marks. The semiconductor wafer is then developed, the alignment mark is etched free and covered again with a second resist, which is exposed in an exposer in order to transfer a mask structure following an alignment with the alignment mark. The capacity of expensive exposers is thus advantageously increased, and microscope measuring instruments can be used multifunctionally, for example for the free exposure and for the detection of defects.
摘要翻译：一种用于在曝光器中曝光半导体晶片的方法包括在覆盖对准标记的层上施加第一抗蚀剂层。具有可见光和紫外光源的显微镜测量仪器使用可见光源对准晶片，并且使用紫外光源用于暴露对准标记上方的第一抗蚀剂层中的区域，而不使用掩模以使曝光对齐标记。然后显影半导体晶片，对准标记被自由蚀刻并再次用第二抗蚀剂覆盖，第二抗蚀剂在曝光器中曝光，以便在与对准标记对准之后传送掩模结构。因此，有利地增加昂贵的曝光器的容量，并且可以多功能地使用显微镜测量仪器，例如用于自由曝光和检测缺陷。

9. 发明申请

US20050068508A1 Alignment mark for coarse alignment and fine alignment of a semiconductor wafer in an exposure tool 有权
标题翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记
公开(公告)号：US20050068508A1
公开(公告)日：2005-03-31
申请号：US10951596
申请日：2004-09-29
申请人： Diana Mattiza , Heiko Hommen , Holger Hasse
发明人： Diana Mattiza , Heiko Hommen , Holger Hasse
IPC分类号： G03F9/00 , G03B27/52
CPC分类号： G03F9/7076
摘要： An alignment mark for the coarse alignment and fine alignment of a semiconductor wafer in an exposure tool includes a first partial structure for generating a first reflection pattern in the exposure tool for the fine alignment of the semiconductor wafer, and a second partial structure for generating a second reflection pattern in the exposure tool for the coarse alignment of the semiconductor wafer. The first partial structure has a plurality of first structure elements, which are arranged relatively parallel and in a manner lying next to one another with a predetermined distance between midpoints symmetrically around the center of an inner region. The second partial structure has a plurality of second structure elements, formed in a manner corresponding to a pattern stored in the exposure tool and being arranged in the inner region.
摘要翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记包括用于在曝光工具中产生用于半导体晶片的精细对准的第一反射图案的第一部分结构和用于产生半导体晶片的第二部分结构用于半导体晶片的粗略对准的曝光工具中的第二反射图案。第一部分结构具有多个第一结构元件，这些第一结构元件相对平行地布置并且以彼此相邻的方式相对布置，并且围绕内部区域的中心对称地在中间点之间具有预定距离。第二部分结构具有多个第二结构元件，其以对应于存储在曝光工具中的图案的方式形成并且布置在内部区域中。

10. 发明授权

US07401549B2 Arrangement for transferring information/structures to wafers 有权
标题翻译：将信息/结构转移到晶圆的安排
公开(公告)号：US07401549B2
公开(公告)日：2008-07-22
申请号：US10802618
申请日：2004-03-17
申请人： Jens Staecker , Uwe Bruch , Heiko Hommen
发明人： Jens Staecker , Uwe Bruch , Heiko Hommen
IPC分类号： B41F19/02
CPC分类号： B82Y10/00 , B81C99/009 , B82Y40/00 , G03F7/0002 , G03F9/00 , H01L21/0271
摘要： An arrangement for transferring information/structures to wafers uses a stamp on which the information/structures to be transferred have been applied as elevated structures. The wafer is fixed on a chuck and is provided with a plastically deformable auxiliary patterning layer. In various implementations, the dimensions of the stamp approximately correspond to those of the wafer, the stamp is provided with the elevated structures essentially over the whole area, and/or the stamp and the wafer are in each case provided with mutually assigned pairs of alignment marks in such a way that the stamp can be positioned in a predetermined position on the wafer by means of an infrared positioning system and can be pressed into the plastically deformable auxiliary patterning layer.
摘要翻译：用于将信息/结构传送到晶片的布置使用将要传送的信息/结构作为升高结构应用的印记。将晶片固定在卡盘上并且设置有可塑性变形的辅助图案形成层。在各种实施方式中，印模的尺寸大致对应于晶片的尺寸，印模具有基本上在整个区域上的升高的结构，和/或印模和晶片在每种情况下都具有相互分配的对准对标记以这样的方式使得印模可以通过红外定位系统定位在晶片上的预定位置，并且可以被压入可塑性变形的辅助图案形成层中。

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