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1. 发明授权

US07245351B2 Alignment mark for coarse alignment and fine alignment of a semiconductor wafer in an exposure tool 有权
标题翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记
公开(公告)号：US07245351B2
公开(公告)日：2007-07-17
申请号：US10951596
申请日：2004-09-29
申请人： Diana Mattiza , Heiko Hommen , Holger Hasse
发明人： Diana Mattiza , Heiko Hommen , Holger Hasse
IPC分类号： G03B27/52 , G03B27/42 , G03F9/00
CPC分类号： G03F9/7076
摘要： An alignment mark for the coarse alignment and fine alignment of a semiconductor wafer in an exposure tool includes a first partial structure for generating a first reflection pattern in the exposure tool for the fine alignment of the semiconductor wafer, and a second partial structure for generating a second reflection pattern in the exposure tool for the coarse alignment of the semiconductor wafer. The first partial structure has a plurality of first structure elements, which are arranged relatively parallel and in a manner lying next to one another with a predetermined distance between midpoints symmetrically around the center of an inner region. The second partial structure has a plurality of second structure elements, formed in a manner corresponding to a pattern stored in the exposure tool and being arranged in the inner region.
摘要翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记包括用于在曝光工具中产生用于半导体晶片的精细对准的第一反射图案的第一部分结构和用于产生半导体晶片的第二部分结构用于半导体晶片的粗略对准的曝光工具中的第二反射图案。第一部分结构具有多个第一结构元件，这些第一结构元件相对平行地布置并且以彼此相邻的方式相对布置，并且围绕内部区域的中心对称地在中间点之间具有预定距离。第二部分结构具有多个第二结构元件，其以对应于存储在曝光工具中的图案的方式形成并且布置在内部区域中。

2. 发明申请

US20050068508A1 Alignment mark for coarse alignment and fine alignment of a semiconductor wafer in an exposure tool 有权
标题翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记
公开(公告)号：US20050068508A1
公开(公告)日：2005-03-31
申请号：US10951596
申请日：2004-09-29
申请人： Diana Mattiza , Heiko Hommen , Holger Hasse
发明人： Diana Mattiza , Heiko Hommen , Holger Hasse
IPC分类号： G03F9/00 , G03B27/52
CPC分类号： G03F9/7076
摘要： An alignment mark for the coarse alignment and fine alignment of a semiconductor wafer in an exposure tool includes a first partial structure for generating a first reflection pattern in the exposure tool for the fine alignment of the semiconductor wafer, and a second partial structure for generating a second reflection pattern in the exposure tool for the coarse alignment of the semiconductor wafer. The first partial structure has a plurality of first structure elements, which are arranged relatively parallel and in a manner lying next to one another with a predetermined distance between midpoints symmetrically around the center of an inner region. The second partial structure has a plurality of second structure elements, formed in a manner corresponding to a pattern stored in the exposure tool and being arranged in the inner region.
摘要翻译：用于曝光工具中的半导体晶片的粗略对准和精细对准的对准标记包括用于在曝光工具中产生用于半导体晶片的精细对准的第一反射图案的第一部分结构和用于产生半导体晶片的第二部分结构用于半导体晶片的粗略对准的曝光工具中的第二反射图案。第一部分结构具有多个第一结构元件，这些第一结构元件相对平行地布置并且以彼此相邻的方式相对布置，并且围绕内部区域的中心对称地在中间点之间具有预定距离。第二部分结构具有多个第二结构元件，其以对应于存储在曝光工具中的图案的方式形成并且布置在内部区域中。

3. 发明授权

US06980304B2 Method for measuring a characteristic dimension of at least one pattern on a disc-shaped object in a measuring instrument 失效
标题翻译：用于测量测量仪器中的盘形物体上的至少一个图案的特征尺寸的方法
公开(公告)号：US06980304B2
公开(公告)日：2005-12-27
申请号：US10802728
申请日：2004-03-18
申请人： Oliver Broermann , Diana Mattiza , Sebastian Schmidt
发明人： Oliver Broermann , Diana Mattiza , Sebastian Schmidt
IPC分类号： G01N21/956 , G03F7/20 , G01B11/02
CPC分类号： G03F7/70591 , G01N21/95607 , G03F7/70625 , G03F7/70633 , G03F7/70641
摘要： The measurement of the width of a pattern on a semiconductor wafer or a flat panel is carried out in an optical microscope or a scanning electron microscope in a number of measuring steps, By a computing rule, the quality of the correlation between the measured data obtained in the individual measurement steps, as well as reference data taken from the design, the value for the parameter is calculated and compared with a limiting value obtained from experience. In the event of violation of the limiting value, a signal is generated and the further processing of the object is interrupted.
摘要翻译：在多个测量步骤中，在光学显微镜或扫描电子显微镜中进行半导体晶片或平板上的图案的宽度的测量。通过计算规则，获得的测量数据之间的相关性的质量在各个测量步骤以及从设计中获取的参考数据中，计算参数值并将其与从经验中获得的极限值进行比较。在违反限制值的情况下，产生信号并中断对象的进一步处理。

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