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1. 发明授权

US07459705B2 Charged particle beam exposure method of character projection system, charged particle beam exposure device of character projection system, program for use in charged particle beam exposure device, and manufacturing method of semiconductor device 失效
标题翻译：字符投影系统的带电粒子束曝光方法，字符投影系统的带电粒子束曝光装置，带电粒子束曝光装置中的使用程序和半导体装置的制造方法
公开(公告)号：US07459705B2
公开(公告)日：2008-12-02
申请号：US11583114
申请日：2006-10-19
申请人： Tetsuro Nakasugi , Ryoichi Inanami , Takumi Ota , Takeshi Koshiba
发明人： Tetsuro Nakasugi , Ryoichi Inanami , Takumi Ota , Takeshi Koshiba
IPC分类号： G03F9/00 , G21K5/10 , H01J37/20
CPC分类号： G03F1/20 , B82Y10/00 , B82Y40/00 , H01J37/3174
摘要： A charged particle beam exposure method is disclosed, which includes preparing an aperture mask having character apertures, correcting dimensions of designed patterns in design data in consideration of at least one of factors such as a forward scattering distance of a charged particle, a rearward scattering distance of the charged particle, a blurring of a beam of the charged particle, a dimension conversion difference of the designed patterns due to a denseness/coarseness difference of the designed patterns caused when the underlayer is processed while using the resist as a mask, and the like, allocating at least a part of a specified character aperture of the plurality of character apertures of the aperture mask to the corrected designed patterns to produce writing data, and exposing the resist to the beams of the charged particle passed through the at least a part of the specified character aperture based on the writing data.
摘要翻译：公开了一种带电粒子束曝光方法，其包括制备具有字符孔的孔径掩模，考虑至少一个因素，校正设计数据中设计图案的尺寸，例如带电粒子的前向散射距离，向后散射距离带电粒子的模糊，带电粒子束的模糊，由于当使用抗蚀剂作为掩模时在底层被处理时引起的设计图案的致密度/粗糙度差造成的设计图案的尺寸转换差，以及类似地，将孔径掩模的多个字符孔径的指定字符孔径的至少一部分分配给经校正的设计图案以产生写入数据，并将抗蚀剂暴露于穿过至少一部分的带电粒子的束基于写入数据的指定字符孔径。

2. 发明申请

US20070114463A1 Charged particle beam exposure method of character projection system, charged particle beam exposure device of character projection system, program for use in charged particle beam exposure device, and manufacturing method of semiconductor device 失效
标题翻译：字符投影系统的带电粒子束曝光方法，字符投影系统的带电粒子束曝光装置，带电粒子束曝光装置中的使用程序和半导体装置的制造方法
公开(公告)号：US20070114463A1
公开(公告)日：2007-05-24
申请号：US11583114
申请日：2006-10-19
申请人： Tetsuro Nakasugi , Ryoichi Inanami , Takumi Ota , Takeshi Koshiba
发明人： Tetsuro Nakasugi , Ryoichi Inanami , Takumi Ota , Takeshi Koshiba
IPC分类号： G21K5/10
CPC分类号： G03F1/20 , B82Y10/00 , B82Y40/00 , H01J37/3174
摘要： A charged particle beam exposure method is disclosed, which includes preparing an aperture mask having character apertures, correcting dimensions of designed patterns in design data in consideration of at least one of factors such as a forward scattering distance of a charged particle, a rearward scattering distance of the charged particle, a blurring of a beam of the charged particle, a dimension conversion difference of the designed patterns due to a denseness/coarseness difference of the designed patterns caused when the underlayer is processed while using the resist as a mask, and the like, allocating at least a part of a specified character aperture of the plurality of character apertures of the aperture mask to the corrected designed patterns to produce writing data, and exposing the resist to the beams of the charged particle passed through the at least a part of the specified character aperture based on the writing data.
摘要翻译：公开了一种带电粒子束曝光方法，其包括制备具有字符孔的孔径掩模，考虑至少一个因素，校正设计数据中设计图案的尺寸，例如带电粒子的前向散射距离，向后散射距离带电粒子的模糊，带电粒子束的模糊，由于当使用抗蚀剂作为掩模时在底层被处理时引起的设计图案的致密度/粗糙度差造成的设计图案的尺寸转换差，以及类似地，将孔径掩模的多个字符孔径的指定字符孔径的至少一部分分配给经校正的设计图案以产生写入数据，并将抗蚀剂暴露于穿过至少一部分的带电粒子的束基于写入数据的指定字符孔径。

3. 发明申请

US20060289805A1 Electron beam lithography apparatus, lithography method, lithography program, and manufacturing method of a semiconductor device 失效
公开(公告)号：US20060289805A1
公开(公告)日：2006-12-28
申请号：US11430044
申请日：2006-05-09
申请人： Tetsuro Nakasugi , Noriaki Sasaki , Takeshi Koshiba , Takumi Ota
发明人： Tetsuro Nakasugi , Noriaki Sasaki , Takeshi Koshiba , Takumi Ota
IPC分类号： G21G5/00
CPC分类号： H01J37/3026 , H01J2237/31761
摘要： According to an aspect of the invention, there is provided an electron beam lithography apparatus including a first setting unit configured to set a drawing position on a semiconductor substrate based on layout information of the semiconductor substrate, a second setting unit configured to set a valid range on the semiconductor substrate based on shape information of the semiconductor substrate, a determination unit configured to determine whether or not the drawing position falls within the valid range, and an irradiation unit configured to irradiate the semiconductor substrate with an electron beam when the determination unit determines that the drawing position falls within the valid range.

4. 发明授权

US07889910B2 Character pattern extracting method, charged particle beam drawing method, and character pattern extracting program 失效
标题翻译：字符图案提取方法，带电粒子束绘制方法和字符图案提取程序
公开(公告)号：US07889910B2
公开(公告)日：2011-02-15
申请号：US11797531
申请日：2007-05-04
申请人： Tetsuro Nakasugi , Takumi Ota , Takeshi Koshiba , Noriaki Sasaki
发明人： Tetsuro Nakasugi , Takumi Ota , Takeshi Koshiba , Noriaki Sasaki
IPC分类号： G06K9/00
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00
摘要： A character pattern extracting method includes ranking character patterns whose number is larger than a maximum number of character patterns in an aperture, depending on the number of reference times in design data of a semiconductor device, extracting first extraction patterns whose number is smaller than the maximum number from the large number of read character patterns in a descending order of the reference time number, defining character patterns except the first extraction patterns out of the larger number of character patterns as candidate patterns, selecting from the candidate patterns a plurality of candidate patterns whose number corresponds to a difference between the number of extracted patterns from the maximum number, and creating combinations of the selected candidate patterns, and extracting second extraction patterns included in a combination among the combinations of candidate patterns, in which a manufacturing time of the semiconductor device is most shortened.
摘要翻译：字符图案提取方法包括根据半导体器件的设计数据中的参考时间的数量来排列数量大于孔径中的最大字符图案数量的字符图案，提取数量小于最大值的第一提取图案以大量的读取字符图案的数量以参考时间数字的降序排列，将除了较大数量的字符图案之外的第一提取模式除外的字符图案作为候选图案，从候选图案中选择多个候选图案，数字对应于从最大数量提取的图案的数量之间的差异，以及创建所选择的候选图案的组合，以及提取包括在候选图案的组合中的组合中的第二提取图案，其中半导体器件的制造时间最缩短。

5. 发明授权

US07482604B2 Electron beam lithography apparatus, lithography method, lithography program, and manufacturing method of a semiconductor device 失效
标题翻译：电子束光刻设备，光刻方法，光刻程序和半导体器件的制造方法
公开(公告)号：US07482604B2
公开(公告)日：2009-01-27
申请号：US11430044
申请日：2006-05-09
申请人： Tetsuro Nakasugi , Noriaki Sasaki , Takeshi Koshiba , Takumi Ota
发明人： Tetsuro Nakasugi , Noriaki Sasaki , Takeshi Koshiba , Takumi Ota
IPC分类号： G21G5/00
CPC分类号： H01J37/3026 , H01J2237/31761
摘要： According to an aspect of the invention, there is provided an electron beam lithography apparatus including a first setting unit configured to set a drawing position on a semiconductor substrate based on layout information of the semiconductor substrate, a second setting unit configured to set a valid range on the semiconductor substrate based on shape information of the semiconductor substrate, a determination unit configured to determine whether or not the drawing position falls within the valid range, and an irradiation unit configured to irradiate the semiconductor substrate with an electron beam when the determination unit determines that the drawing position falls within the valid range.
摘要翻译：根据本发明的一个方面，提供了一种电子束光刻设备，包括：第一设定单元，被配置为基于半导体衬底的布局信息来设置半导体衬底上的绘制位置;第二设置单元，被配置为设置有效范围基于所述半导体衬底的形状信息在所述半导体衬底上，确定单元，被配置为确定所述绘制位置是否在所述有效范围内;以及照射单元，被配置为当所述确定单元确定时照射所述半导体衬底电子束绘图位置在有效范围内。

6. 发明申请

US20070263921A1 Character pattern extracting method, charged particle beam drawing method, and character pattern extracting program 失效
标题翻译：字符图案提取方法，带电粒子束绘制方法和字符图案提取程序
公开(公告)号：US20070263921A1
公开(公告)日：2007-11-15
申请号：US11797531
申请日：2007-05-04
申请人： Tetsuro Nakasugi , Takumi Ota , Takeshi Koshiba , Noriaki Sasaki
发明人： Tetsuro Nakasugi , Takumi Ota , Takeshi Koshiba , Noriaki Sasaki
IPC分类号： G06K9/00
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00
摘要： A character pattern extracting method includes ranking character patterns whose number is larger than a maximum number of character patterns in an aperture, depending on the number of reference times in design data of a semiconductor device, extracting first extraction patterns whose number is smaller than the maximum number from the large number of read character patterns in a descending order of the reference time number, defining character patterns except the first extraction patterns out of the larger number of character patterns as candidate patterns, selecting from the candidate patterns a plurality of candidate patterns whose number corresponds to a difference between the number of extracted patterns from the maximum number, and creating combinations of the selected candidate patterns, and extracting second extraction patterns included in a combination among the combinations of candidate patterns, in which a manufacturing time of the semiconductor device is most shortened.
摘要翻译：字符图案提取方法包括根据半导体器件的设计数据中的参考时间的数量来排列数量大于孔径中的最大字符图案数量的字符图案，提取数量小于最大值的第一提取图案以大量的读取字符图案的数量以参考时间数字的降序排列，将除了较大数量的字符图案之外的第一提取模式除外的字符图案作为候选图案，从候选图案中选择多个候选图案，数字对应于从最大数量提取的图案的数量之间的差异，以及创建所选择的候选图案的组合，以及提取包括在候选图案的组合中的组合中的第二提取图案，其中半导体器件的制造时间最缩短。

7. 发明授权

US07985958B2 Electron beam drawing apparatus, deflection amplifier, deflection control device, electron beam drawing method, method of manufacturing semiconductor device, and electron beam drawing program 有权
标题翻译：电子束描绘装置，偏转放大器，偏转控制装置，电子束描绘法，半导体装置的制造方法以及电子束绘制程序
公开(公告)号：US07985958B2
公开(公告)日：2011-07-26
申请号：US11268603
申请日：2005-11-08
申请人： Tetsuro Nakasugi , Kazuo Tawarayama , Hiroyuki Mizuno , Takumi Ota , Noriaki Sasaki , Tatsuhiko Higashiki , Takeshi Koshiba , Shunko Magoshi
发明人： Tetsuro Nakasugi , Kazuo Tawarayama , Hiroyuki Mizuno , Takumi Ota , Noriaki Sasaki , Tatsuhiko Higashiki , Takeshi Koshiba , Shunko Magoshi
IPC分类号： H01J37/153
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , H01J37/304 , H01J2237/15 , H01J2237/30433
摘要： According to an aspect of the invention, there is provided an electron beam drawing apparatus comprising at least one stage of a deflection amplifier and a deflection unit, a first storage section which stores shot information at a drawing time, a second storage section which stores a correction table indicating a relation between the shot information and an output voltage of the deflection amplifier, and an adjusting section which adjusts an output of the deflection amplifier based on the correction table stored in the second storage section and the shot information stored in the first storage section.
摘要翻译：根据本发明的一个方面，提供了一种电子束描绘装置，其包括偏转放大器和偏转单元的至少一个级，在绘制时存储镜头信息的第一存储部分，指示拍摄信息和偏转放大器的输出电压之间的关系的校正表以及基于存储在第二存储部中的校正表来调整偏转放大器的输出的调节部和存储在第一存储部部分。

8. 发明申请

US20060151721A1 Electron beam drawing apparatus, deflection amplifier, deflection control device, electron beam drawing method, method of manufacturing semiconductor device, and electron beam drawing program 有权
标题翻译：电子束描绘装置，偏转放大器，偏转控制装置，电子束描绘法，半导体装置的制造方法以及电子束绘制程序
公开(公告)号：US20060151721A1
公开(公告)日：2006-07-13
申请号：US11268603
申请日：2005-11-08
申请人： Tetsuro Nakasugi , Kazuo Tawarayama , Hiroyuki Mizuno , Takumi Ota , Noriaki Sasaki , Tatsuhiko Higashiki , Takeshi Koshiba , Shunko Magoshi
发明人： Tetsuro Nakasugi , Kazuo Tawarayama , Hiroyuki Mizuno , Takumi Ota , Noriaki Sasaki , Tatsuhiko Higashiki , Takeshi Koshiba , Shunko Magoshi
IPC分类号： G21K5/10
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , H01J37/304 , H01J2237/15 , H01J2237/30433
摘要： According to an aspect of the invention, there is provided an electron beam drawing apparatus comprising at least one stage of a deflection amplifier and a deflection unit, a first storage section which stores shot information at a drawing time, a second storage section which stores a correction table indicating a relation between the shot information and an output voltage of the deflection amplifier, and an adjusting section which adjusts an output of the deflection amplifier based on the correction table stored in the second storage section and the shot information stored in the first storage section.
摘要翻译：根据本发明的一个方面，提供了一种电子束描绘装置，其包括偏转放大器和偏转单元的至少一个级，在绘制时存储镜头信息的第一存储部分，指示拍摄信息和偏转放大器的输出电压之间的关系的校正表以及基于存储在第二存储部中的校正表来调整偏转放大器的输出的调节部和存储在第一存储部部分。

9. 发明授权

US08560977B2 Drop recipe creating method, database creating method and medium 有权
标题翻译：删除配方创建方法，数据库创建方法和介质
公开(公告)号：US08560977B2
公开(公告)日：2013-10-15
申请号：US13238615
申请日：2011-09-21
申请人： Yasuo Matsuoka , Takumi Ota , Ryoichi Inanami
发明人： Yasuo Matsuoka , Takumi Ota , Ryoichi Inanami
IPC分类号： G06F17/50 , H01L21/302
CPC分类号： G06F17/30289 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.
摘要翻译：根据一个实施例，首先基于半导体集成电路上的设计数据创建多个测试投影配方。基于硬化树脂材料的图案的缺陷检查结果，其通过将形成有半导体集成电路的图案的模板按压到通过使用测试滴的待处理基板上的硬化树脂材料上而形成根据测试液滴配方，每个按压位置在待处理的基板上选择最少缺陷的落料配方。根据构成半导体集成电路的功能电路块收集各个按压位置的所选择的放置配方，从而生成放置配方创建辅助数据库。

10. 发明申请

US20120131056A1 DROP RECIPE CREATING METHOD, DATABASE CREATING METHOD AND MEDIUM 有权
标题翻译： DROP RECIPE CREATING METHOD，DATABASE CREATING METHOD AND MEDIUM
公开(公告)号：US20120131056A1
公开(公告)日：2012-05-24
申请号：US13238615
申请日：2011-09-21
申请人： Yasuo Matsuoka , Takumi Ota , Ryoichi Inanami
发明人： Yasuo Matsuoka , Takumi Ota , Ryoichi Inanami
IPC分类号： G06F17/30
CPC分类号： G06F17/30289 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.
摘要翻译：根据一个实施例，首先基于半导体集成电路上的设计数据创建多个测试投影配方。基于硬化树脂材料的图案的缺陷检查结果，其通过将形成有半导体集成电路的图案的模板按压到通过使用测试滴的待处理基板上的硬化树脂材料上而形成根据测试液滴配方，每个按压位置在待处理的基板上选择最少缺陷的落料配方。根据构成半导体集成电路的功能电路块收集各个按压位置的所选择的放置配方，从而生成放置配方创建辅助数据库。

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