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1. 发明授权

US07851279B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07851279B2
公开(公告)日：2010-12-14
申请号：US12213727
申请日：2008-06-24
申请人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
发明人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L27/1157 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/1214 , H01L27/1251 , H01L27/13 , H01L29/4234 , H01L29/792 , H01L29/7923
摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
摘要翻译：本发明提供一种半导体器件及其制造方法，其中在衬底上制造具有不同厚度的栅极绝缘膜的存储晶体管和多个薄膜晶体管。本发明的特征在于存储晶体管与多个薄膜晶体管之间的结构差异。具体地，存储晶体管和多个薄膜晶体管中的一些被设置为具有底栅结构，而另一个薄膜晶体管被设置为具有顶栅结构，这使得能够减小晶体管的特性缺陷并简化其制造工艺。

2. 发明授权

US08581332B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08581332B2
公开(公告)日：2013-11-12
申请号：US13207450
申请日：2011-08-11
申请人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
发明人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
IPC分类号： H01L29/792
CPC分类号： H01L27/1157 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/1214 , H01L27/1251 , H01L27/13 , H01L29/4234 , H01L29/792 , H01L29/7923
摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.

3. 发明授权

US08022469B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08022469B2
公开(公告)日：2011-09-20
申请号：US12963847
申请日：2010-12-09
申请人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
发明人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
IPC分类号： H01L29/792
CPC分类号： H01L27/1157 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/1214 , H01L27/1251 , H01L27/13 , H01L29/4234 , H01L29/792 , H01L29/7923
摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
摘要翻译：本发明提供一种半导体器件及其制造方法，其中在衬底上制造具有不同厚度的栅极绝缘膜的存储晶体管和多个薄膜晶体管。本发明的特征在于存储晶体管与多个薄膜晶体管之间的结构差异。具体地，存储晶体管和多个薄膜晶体管中的一些被设置为具有底栅结构，而另一个薄膜晶体管被设置为具有顶栅结构，这使得能够减小晶体管的特性缺陷并简化其制造工艺。

4. 发明申请

US20110291173A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110291173A1
公开(公告)日：2011-12-01
申请号：US13207450
申请日：2011-08-11
申请人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
发明人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
IPC分类号： H01L29/788
CPC分类号： H01L27/1157 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/1214 , H01L27/1251 , H01L27/13 , H01L29/4234 , H01L29/792 , H01L29/7923
摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
摘要翻译：本发明提供一种半导体器件及其制造方法，其中在衬底上制造具有不同厚度的栅极绝缘膜的存储晶体管和多个薄膜晶体管。本发明的特征在于存储晶体管与多个薄膜晶体管之间的结构差异。具体地，存储晶体管和多个薄膜晶体管中的一些被设置为具有底栅结构，而另一个薄膜晶体管被设置为具有顶栅结构，这使得能够减小晶体管的特性缺陷并简化其制造工艺。

5. 发明申请

US20090001452A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090001452A1
公开(公告)日：2009-01-01
申请号：US12213727
申请日：2008-06-24
申请人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
发明人： Tamae Takano , Tetsuya Kakehata , Shunpei Yamazaki
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L27/1157 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/1214 , H01L27/1251 , H01L27/13 , H01L29/4234 , H01L29/792 , H01L29/7923
摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.
摘要翻译：本发明提供一种半导体器件及其制造方法，其中在衬底上制造具有不同厚度的栅极绝缘膜的存储晶体管和多个薄膜晶体管。本发明的特征在于存储晶体管与多个薄膜晶体管之间的结构差异。具体地，存储晶体管和多个薄膜晶体管中的一些被设置为具有底栅结构，而另一个薄膜晶体管被设置为具有顶栅结构，这使得能够减小晶体管的特性缺陷并简化其制造工艺。

6. 发明授权

US08604547B2 Memory element and semiconductor device 有权
标题翻译：存储元件和半导体器件
公开(公告)号：US08604547B2
公开(公告)日：2013-12-10
申请号：US11795476
申请日：2006-02-07
申请人： Mikio Yukawa , Tamae Takano , Yoshinobu Asami , Shunpei Yamazaki , Takehisa Sato
发明人： Mikio Yukawa , Tamae Takano , Yoshinobu Asami , Shunpei Yamazaki , Takehisa Sato
IPC分类号： H01L27/12 , H01L21/70
CPC分类号： H01L27/112 , G11C17/146 , G11C17/16
摘要： It is an object of the present invention to provide a nonvolatile memory device, in which additional writing is possible other than in manufacturing and forgery and the like due to rewriting can be prevented, and a semiconductor device having the memory device. It is another object of the present invention to provide an inexpensive and nonvolatile memory device with high reliability and a semiconductor device. According to one feature of the present invention, a memory device includes a first conductive layer formed over an insulating surface, a second conductive layer, a first insulating layer interposed between the first conductive layer and the second conductive layer, and a second insulating layer which covers a part of the first conductive layer, wherein the first insulating layer covers an edge portion of the first conductive layer, the insulating surface, and the second insulating layer.
摘要翻译：本发明的一个目的是提供一种非易失性存储器件，其中可以除了制造和伪造等以外的其他写入可能被改写，以及具有存储器件的半导体器件。本发明的另一个目的是提供一种具有高可靠性的廉价且非易失性的存储器件和半导体器件。根据本发明的一个特征，一种存储器件包括：在绝缘表面上形成的第一导电层，第二导电层，介于第一导电层和第二导电层之间的第一绝缘层;以及第二绝缘层，覆盖第一导电层的一部分，其中第一绝缘层覆盖第一导电层，绝缘表面和第二绝缘层的边缘部分。

7. 发明授权

US08526216B2 Memory device and manufacturing method the same 有权
公开(公告)号：US08526216B2
公开(公告)日：2013-09-03
申请号：US13546013
申请日：2012-07-11
申请人： Yoshinobu Asami , Tamae Takano , Masayuki Sakakura , Ryoji Nomura , Shunpei Yamazaki
发明人： Yoshinobu Asami , Tamae Takano , Masayuki Sakakura , Ryoji Nomura , Shunpei Yamazaki
IPC分类号： G11C11/34 , G11C11/00 , H01L29/12
CPC分类号： H01L27/1082 , B82Y10/00 , G11C11/34 , G11C13/0014 , G11C2213/79 , H01L23/4828 , H01L27/105 , H01L27/1203 , H01L27/1244 , H01L27/28 , H01L29/458 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

8. 发明授权

US08242988B2 Device substrate, light emitting device and driving method of light emitting device 有权
标题翻译：装置基板，发光装置及发光装置的驱动方法
公开(公告)号：US08242988B2
公开(公告)日：2012-08-14
申请号：US12915086
申请日：2010-10-29
申请人： Shunpei Yamazaki , Masayuki Sakakura , Mitsuaki Osame , Takashi Hamada , Tamae Takano , Yu Yamazaki , Aya Anzai
发明人： Shunpei Yamazaki , Masayuki Sakakura , Mitsuaki Osame , Takashi Hamada , Tamae Takano , Yu Yamazaki , Aya Anzai
IPC分类号： G09G3/30
CPC分类号： H01L27/1214 , G09G3/3233 , G09G3/3266 , G09G3/3291 , G09G2300/0426 , G09G2300/0814 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , H01L27/3262 , H01L2251/5323
摘要： A light emitting device comprising a light emitting element and a first transistor and a second transistor controlling current to be supplied to the light emitting element in a pixel; the first transistor is normally-on; the second transistor is normally-off; a channel length of the first transistor is longer than a channel width thereof; a channel length of the second transistor is equal to or shorter than a channel length thereof; gate electrodes of the first transistor and the second transistor are connected to each other; the first transistor and the second transistor have the same polarity; and the light emitting element, the first transistor and the second transistor are all connected in series.
摘要翻译：一种发光器件，包括发光元件和第一晶体管，以及第二晶体管，控制要在像素中提供给所述发光元件的电流; 第一个晶体管正常工作; 第二晶体管正常断开; 第一晶体管的沟道长度比沟道宽度长; 第二晶体管的沟道长度等于或短于其沟道长度; 第一晶体管和第二晶体管的栅电极彼此连接; 第一晶体管和第二晶体管具有相同的极性; 并且发光元件，第一晶体管和第二晶体管都全部串联连接。

9. 发明授权

US07326961B2 Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07326961B2
公开(公告)日：2008-02-05
申请号：US11107822
申请日：2005-04-18
申请人： Shunpei Yamazaki , Atsuo Isobe , Tamae Takano , Hidekazu Miyairi
发明人： Shunpei Yamazaki , Atsuo Isobe , Tamae Takano , Hidekazu Miyairi
IPC分类号： H01L29/72
CPC分类号： H01L21/02691 , H01L21/02678 , H01L21/02683 , H01L21/2022 , H01L27/12 , H01L27/1281
摘要： To provide devices relating to a manufacturing method for a semiconductor device using a laser crystallization method, which is capable of reducing a cost involved in a design change, preventing a grain boundary from developing in a channel formation region of a TFT, and preventing a remarkable reduction in mobility of the TFT, a decrease in an ON current, and an increase in an OFF current due to the grain boundary and to a semiconductor device formed by using the manufacturing method. In a semiconductor device according to the present invention, among a plurality of TFTs formed on a base film, some TFTs are electrically connected to form logic elements. The plurality of logic elements are used to form a circuit. The base film has a plurality of projective portions having a rectangular or stripe shape. Island-like semiconductor films included in each of the plurality of TFTs are formed between the plurality of projective portions and also, are crystallized by a laser light scanned in a longitudinal direction of the projective portions.
摘要翻译：为了提供与使用激光结晶法的半导体器件的制造方法相关的装置，其能够降低设计变化中涉及的成本，防止晶界在TFT的沟道形成区域中发展，并且防止显着 TFT的迁移率的降低，导通电流的降低以及由于晶界引起的关断电流的增加以及通过使用该制造方法形成的半导体器件。在根据本发明的半导体器件中，在形成在基膜上的多个TFT中，一些TFT电连接形成逻辑元件。多个逻辑元件用于形成电路。基膜具有多个具有矩形或条状的突出部分。包含在多个TFT中的多个TFT中的岛状半导体膜形成在多个投影部之间，并且通过沿着投影部的纵向扫描的激光而结晶化。

10. 发明申请

US20070228420A1 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20070228420A1
公开(公告)日：2007-10-04
申请号：US11727042
申请日：2007-03-23
申请人： Tamae Takano , Shunpei Yamazaki
发明人： Tamae Takano , Shunpei Yamazaki
IPC分类号： H01L27/10
CPC分类号： H01L27/12 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode is provided over the charge accumulating layer with a second insulating layer interposed therebetween. The semiconductor layer includes a channel formation region provided in a region overlapping with the gate electrode, a first impurity region for forming a source region or drain region, which is provided to be adjacent to the channel formation region, and a second impurity region provided to be adjacent to the channel formation region and the first impurity region. A conductivity type of the first impurity region is different from that of the second impurity region.
摘要翻译：以半导体层形成在基板上的方式设置非易失性半导体存储元件，在半导体层上形成电荷累积层，其间插入有第一绝缘层，在电荷累积层之上设置栅电极其间插入有第二绝缘层。半导体层包括设置在与栅电极重叠的区域中的沟道形成区域，用于形成与沟道形成区域相邻的源极区域或漏极区域的第一杂质区域和设置成与沟道形成区域相邻的第二杂质区域与沟道形成区域和第一杂质区域相邻。第一杂质区的导电类型与第二杂质区不同。

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