专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09496406B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09496406B2
公开(公告)日：2016-11-15
申请号：US13547377
申请日：2012-07-12
申请人： Shunpei Yamazaki , Hidekazu Miyairi , Akiharu Miyanaga , Kengo Akimoto , Kojiro Shiraishi
发明人： Shunpei Yamazaki , Hidekazu Miyairi , Akiharu Miyanaga , Kengo Akimoto , Kojiro Shiraishi
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/78618 , G02F1/133345 , G02F1/133528 , G02F1/134336 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F1/167 , G02F2201/123 , G09G3/3674 , G09G2310/0286 , H01L27/1225 , H01L27/3262 , H01L29/247 , H01L29/66969 , H01L29/78648 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
摘要翻译：一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间电极层。有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

2. 发明授权

US09401396B2 Method for manufacturing semiconductor device and plasma oxidation treatment method 有权
标题翻译：半导体器件制造方法及等离子体氧化处理方法
公开(公告)号：US09401396B2
公开(公告)日：2016-07-26
申请号：US13433563
申请日：2012-03-29
申请人： Kanta Abe , Hidekazu Miyairi , Tetsuhiro Tanaka , Takashi Ienaga , Yoshitaka Yamamoto
发明人： Kanta Abe , Hidekazu Miyairi , Tetsuhiro Tanaka , Takashi Ienaga , Yoshitaka Yamamoto
IPC分类号： H01L21/20 , H01L21/36 , H01L29/04 , H01L29/66 , H01L21/28 , H01L29/786
CPC分类号： H01L29/04 , H01L21/28008 , H01L29/66765 , H01L29/786 , H01L29/78648 , H01L29/78678 , H01L29/78696
摘要： Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.
摘要翻译：提供一种半导体器件的制造方法，其中通过对含有氮的栅极绝缘膜进行等离子体氧化处理可以抑制薄膜晶体管的特性的劣化。本发明的一个实施例是一种半导体器件的制造方法，该半导体器件包括薄膜晶体管，该薄膜晶体管包括栅电极，含氮的栅绝缘膜和微晶半导体膜中的沟道区。该方法包括以下步骤：在包含氢的氧化气体气氛和含有氧原子的氧化气体的栅极绝缘膜上进行等离子体处理，并在栅极绝缘膜上形成微晶半导体膜。满足式（1），a /b≥2和式（2），b> 0，其中，氢和氧化气体气氛中的氧化气体量分别为a和b。

3. 发明授权

US09176353B2 Liquid crystal display device 有权
公开(公告)号：US09176353B2
公开(公告)日：2015-11-03
申请号：US12213728
申请日：2008-06-24
申请人： Shunpei Yamazaki , Yukie Suzuki , Hideaki Kuwabara , Hajime Kimura , Hidekazu Miyairi , Yoshiyuki Kurokawa , Satoshi Kobayashi
发明人： Shunpei Yamazaki , Yukie Suzuki , Hideaki Kuwabara , Hajime Kimura , Hidekazu Miyairi , Yoshiyuki Kurokawa , Satoshi Kobayashi
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/67
CPC分类号： G02F1/1368 , G02F1/133345 , H01L21/67207 , H01L29/41733 , H01L29/66765 , H01L29/78678 , H01L29/78696
摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

4. 发明授权

US09069202B2 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US09069202B2
公开(公告)日：2015-06-30
申请号：US13407891
申请日：2012-02-29
申请人： Hidekazu Miyairi , Tetsuji Ishitani , Daisuke Kubota , Toshiyuki Isa , Kouhei Toyotaka , Susumu Kawashima
发明人： Hidekazu Miyairi , Tetsuji Ishitani , Daisuke Kubota , Toshiyuki Isa , Kouhei Toyotaka , Susumu Kawashima
IPC分类号： G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/136
CPC分类号： G02F1/133345 , G02F1/134363 , G02F1/136209 , G02F1/136213 , G02F1/136286 , G02F2001/13606 , G02F2001/13629 , G02F2001/136295 , G02F2201/124
摘要： Provided are a liquid crystal display device with horizontal electric field mode, in which a decrease in driving speed can be suppressed by reducing the resistance of a wiring even when the number of pixels is increased, and a manufacturing method thereof. One of a scan wiring and a signal wiring is divided in an intersection portion where the scan wiring and the signal wiring intersect with each other, and the separated wirings are connected with a connection electrode positioned over a thick insulating film. Accordingly, parasitic capacitance at the intersection portion can be reduced, preventing the decrease in the driving speed. The connection electrode is formed at the same time as formation of a pixel electrode and a common electrode using a low-resistance metal, which contributes to the reduction in manufacturing process of the liquid crystal display device.
摘要翻译：提供一种具有水平电场模式的液晶显示装置及其制造方法，其中即使增加像素数也可以通过降低布线的电阻来抑制驱动速度的降低。扫描布线和信号布线之一被划分在扫描布线和信号布线彼此相交的交叉部分中，并且分离的布线与位于厚绝缘膜上的连接电极连接。因此，可以减少交叉部分处的寄生电容，防止驱动速度的降低。连接电极与使用低电阻金属的像素电极和公共电极的形成同时形成，这有助于液晶显示装置的制造工艺的减少。

5. 发明授权

US09018109B2 Thin film transistor including silicon nitride layer and manufacturing method thereof 有权
标题翻译：包括氮化硅层的薄膜晶体管及其制造方法
公开(公告)号：US09018109B2
公开(公告)日：2015-04-28
申请号：US12715629
申请日：2010-03-02
申请人： Hidekazu Miyairi , Erika Kato , Kunihiko Suzuki
发明人： Hidekazu Miyairi , Erika Kato , Kunihiko Suzuki
IPC分类号： H01L21/31 , H01L21/469 , H01L29/49 , H01L29/66 , H01L29/786 , H01L27/12
CPC分类号： H01L29/4908 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose uppermost surface is a silicon nitride layer, a semiconductor layer over the gate insulating layer, and a buffer layer over the semiconductor layer and in which the concentration of nitrogen in the vicinity of an interface between the semiconductor layer and the gate insulating layer, which is in the semiconductor layer is lower than that of the buffer layer and other parts of the semiconductor layer. Such a thin film transistor can be manufactured by exposing the gate insulating layer to an air atmosphere and performing plasma treatment on the gate insulating layer before the semiconductor layer is formed.
摘要翻译：其中不可能引起初始操作劣化的薄膜晶体管及其制造方法。一种晶体管，其至少具有栅极绝缘层，其最上表面是氮化硅层，栅极绝缘层上的半导体层，以及半导体层上的缓冲层，其中，在界面附近的氮浓度半导体层中的半导体层和栅极绝缘层比缓冲层和半导体层的其它部分低。这样的薄膜晶体管可以通过将栅极绝缘层暴露于空气气氛中，并且在形成半导体层之前对栅极绝缘层进行等离子体处理来制造。

6. 发明授权

US09000441B2 Semiconductor device and display device 有权
标题翻译：半导体器件和显示器件
公开(公告)号：US09000441B2
公开(公告)日：2015-04-07
申请号：US12504897
申请日：2009-07-17
申请人： Daisuke Kawae , Yoshiyuki Kurokawa , Hidekazu Miyairi
发明人： Daisuke Kawae , Yoshiyuki Kurokawa , Hidekazu Miyairi
IPC分类号： H01L27/14 , H01L29/786 , H01L27/12 , H01L29/04 , H01L29/66
CPC分类号： H01L29/78696 , H01L27/1214 , H01L27/1288 , H01L29/04 , H01L29/66765 , H01L29/78645
摘要： A thin film transistor whose threshold voltage can be controlled and which has a favorable switching characteristic is provided. The thin film transistor includes a first gate electrode layer; a semiconductor layer; a first gate insulating layer provided between the first gate electrode layer and the semiconductor layer; source electrode and drain electrode layers which are provided over the semiconductor layer; a conductive layer covered by the first gate insulating layer and the semiconductor layer and provided so as to overlap with part of the first gate electrode layer; a second gate insulating layer provided so as to cover at least a back channel portion of the semiconductor layer; and a second gate electrode layer provided over the second gate insulating layer so as to overlap with the back channel portion of the semiconductor layer.
摘要翻译：提供了可以控制阈值电压并具有良好的开关特性的薄膜晶体管。薄膜晶体管包括第一栅电极层; 半导体层; 设置在所述第一栅极电极层和所述半导体层之间的第一栅极绝缘层; 源电极和漏极电极层，设置在半导体层上; 由第一栅极绝缘层和半导体层覆盖的导电层，并且设置成与第一栅极电极层的一部分重叠; 第二栅极绝缘层，设置成覆盖半导体层的至少后沟道部分; 以及第二栅极电极层，设置在所述第二栅极绝缘层上方以与所述半导体层的所述后部沟道部重叠。

7. 发明授权

US08884297B2 Microcrystalline silicon film, manufacturing method thereof, semiconductor device, and manufacturing method thereof 有权
标题翻译：微晶硅膜及其制造方法，半导体装置及其制造方法
公开(公告)号：US08884297B2
公开(公告)日：2014-11-11
申请号：US13696865
申请日：2011-05-06
申请人： Sachiaki Tezuka , Yasuhiro Jinbo , Toshinari Sasaki , Hidekazu Miyairi , Yosuke Kanzaki , Masao Moriguchi
发明人： Sachiaki Tezuka , Yasuhiro Jinbo , Toshinari Sasaki , Hidekazu Miyairi , Yosuke Kanzaki , Masao Moriguchi
IPC分类号： H01L21/336 , H01L21/205 , H01L29/04 , H01L29/786 , H01L21/02 , C23C16/50 , C23C16/455 , C23C16/24 , H01L29/66
CPC分类号： H01L21/02513 , C23C16/24 , C23C16/45523 , C23C16/50 , H01L21/02422 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.
摘要翻译：微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

8. 发明授权

US08709836B2 Method for manufacturing thin film transistor and method for manufacturing display device 失效
标题翻译：薄膜晶体管的制造方法及显示装置的制造方法
公开(公告)号：US08709836B2
公开(公告)日：2014-04-29
申请号：US13175990
申请日：2011-07-05
申请人： Hidekazu Miyairi , Takafumi Mizoguchi
发明人： Hidekazu Miyairi , Takafumi Mizoguchi
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214
摘要： An object is to provide a method for manufacturing a thin film transistor and a display device with reduced number of masks, in which adverse effects of optical current are suppressed. A manufacturing method comprises forming a stack including, from bottom to top, a light-blocking film, a base film, a first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film; performing first etching on the whole thickness of the stack using a first resist mask formed over it; forming a gate electrode layer by side etching the first conductive film in a second etching; forming a second resist mask over the stack; and performing third etching down to the semiconductor film, and partially etching it, using the second resist mask to form a source and drain electrode layer, a source and drain region, and a semiconductor layer.
摘要翻译：本发明的目的是提供一种制造薄膜晶体管的方法和减少数量的掩模的显示装置，其中抑制了光电流的不利影响。一种制造方法，包括从底部到顶部形成包括遮光膜，基底膜，第一导电膜，第一绝缘膜，半导体膜，杂质半导体膜和第二导电膜的堆叠体; 使用形成在其上的第一抗蚀剂掩模对堆叠的整个厚度执行第一蚀刻; 在第二蚀刻中通过侧蚀刻所述第一导电膜形成栅极电极; 在堆叠上形成第二抗蚀剂掩模; 并且使用第二抗蚀剂掩模对半导体膜执行第三蚀刻并部分蚀刻，以形成源极和漏极电极层，源极和漏极区域以及半导体层。

9. 发明授权

US08637866B2 Thin film transistor 有权
标题翻译：薄膜晶体管
公开(公告)号：US08637866B2
公开(公告)日：2014-01-28
申请号：US12490447
申请日：2009-06-24
申请人： Toshiyuki Isa , Yasuhiro Jinbo , Sachiaki Tezuka , Koji Dairiki , Hidekazu Miyairi , Shunpei Yamazaki , Takuya Hirohashi
发明人： Toshiyuki Isa , Yasuhiro Jinbo , Sachiaki Tezuka , Koji Dairiki , Hidekazu Miyairi , Shunpei Yamazaki , Takuya Hirohashi
IPC分类号： H01L29/72
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

10. 发明授权

US08569120B2 Method for manufacturing thin film transistor 有权
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US08569120B2
公开(公告)日：2013-10-29
申请号：US12617406
申请日：2009-11-12
申请人： Erika Takahashi , Takayuki Kato , Hidekazu Miyairi , Yasuhiro Jinbo , Mitsuhiro Ichijo , Tomokazu Yokoi
发明人： Erika Takahashi , Takayuki Kato , Hidekazu Miyairi , Yasuhiro Jinbo , Mitsuhiro Ichijo , Tomokazu Yokoi
IPC分类号： H01L21/336
CPC分类号： H01L27/1288 , C23C16/0272 , C23C16/24 , C23C16/50 , H01L27/1214 , H01L29/66765 , H01L29/78669 , H01L29/78678
摘要： An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.
摘要翻译：本发明的目的在于提供一种制造具有良好的电特性，高生产率的薄膜晶体管的方法。在基板上形成栅电极，在栅电极上形成栅极绝缘层。通过使用包含硅或锗，氢气和稀有气体的沉积气体产生等离子体，在栅绝缘层上形成第一半导体层。接下来，以这样的方式形成包括非晶半导体和微晶半导体的第二半导体层，使得通过使用包含硅或锗的沉积气体，氢气和含有气体的气体产生等离子体，将第一半导体层部分地生长为晶种氮。然后，形成添加有赋予一种导电性的杂质的半导体层，形成导电膜。因此，制造薄膜晶体管。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式