会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • Semiconductor device and method for fabricating the same
    • 半导体装置及其制造方法
    • US20060292816A1
    • 2006-12-28
    • US11415069
    • 2006-05-02
    • Takumi MikawaToru Nasu
    • Takumi MikawaToru Nasu
    • H01L21/20H01L29/00
    • H01L28/55H01L27/11502H01L27/11507H01L28/65H01L28/91
    • A semiconductor device comprises: an insulating film formed over a semiconductor substrate and having a first recess; a plurality of capacitor elements each of which is composed of a capacitor lower electrode formed on wall and bottom portions of the first recess and having a second recess, a capacitor insulating film of a dielectric film formed on wall and bottom portions of the second recess and having a third recess, and a capacitor upper electrode formed on wall and bottom portions of the third recess; and a conductive layer (referred hereinafter to as a low-resistance conductive layer) which is formed to cover at least portions of the respective capacitor upper electrodes constituting the plurality of capacitor elements and to extend across the plurality of capacitor elements and which has a lower resistance than the capacitor upper electrode.
    • 半导体器件包括:形成在半导体衬底上并具有第一凹槽的绝缘膜; 多个电容器元件,每个电容器元件由形成在第一凹部的壁和底部上的电容器下电极组成,并具有第二凹部,形成在第二凹部的壁和底部上的电介质膜的电容绝缘膜, 具有第三凹部和形成在第三凹部的壁部和底部上的电容器上电极; 以及形成为覆盖构成多个电容器元件的各个电容器上电极的至少一部分并且跨越多个电容器元件并且具有较低电容器元件的导电层(以下称为低电阻导电层) 电阻比电容器上电极。
    • 3. 发明授权
    • Semiconductor device and method for fabricating the same
    • 半导体装置及其制造方法
    • US07304341B2
    • 2007-12-04
    • US11415069
    • 2006-05-02
    • Takumi MikawaToru Nasu
    • Takumi MikawaToru Nasu
    • H01L27/108H01L29/76H01L29/94H01L31/119
    • H01L28/55H01L27/11502H01L27/11507H01L28/65H01L28/91
    • A semiconductor device comprises: an insulating film formed over a semiconductor substrate and having a first recess; a plurality of capacitor elements each of which is composed of a capacitor lower electrode formed on wall and bottom portions of the first recess and having a second recess, a capacitor insulating film of a dielectric film formed on wall and bottom portions of the second recess and having a third recess, and a capacitor upper electrode formed on wall and bottom portions of the third recess; and a conductive layer (referred hereinafter to as a low-resistance conductive layer) which is formed to cover at least portions of the respective capacitor upper electrodes constituting the plurality of capacitor elements and to extend across the plurality of capacitor elements and which has a lower resistance than the capacitor upper electrode.
    • 半导体器件包括:形成在半导体衬底上并具有第一凹槽的绝缘膜; 多个电容器元件,每个电容器元件由形成在第一凹部的壁和底部上的电容器下电极组成,并具有第二凹部,形成在第二凹部的壁和底部上的电介质膜的电容绝缘膜, 具有第三凹部和形成在第三凹部的壁部和底部上的电容器上电极; 以及形成为覆盖构成多个电容器元件的各个电容器上电极的至少一部分并且跨越多个电容器元件并且具有较低电容器元件的导电层(以下称为低电阻导电层) 电阻比电容器上电极。
    • 8. 发明授权
    • Nonvolatile memory element comprising a resistance variable element and a diode
    • 非易失性存储元件包括电阻可变元件和二极管
    • US08796660B2
    • 2014-08-05
    • US12375881
    • 2007-09-21
    • Takeshi TakagiTakumi Mikawa
    • Takeshi TakagiTakumi Mikawa
    • H01L29/02H01L47/00H01L29/04H01L29/06H01L29/08H01L31/0352H01L45/00H01L27/24H01L27/10H01L21/00G11C11/00
    • H01L45/04H01L27/101H01L27/2409H01L27/2418H01L27/2463H01L45/1233H01L45/1273H01L45/146H01L45/1683
    • A nonvolatile memory element (20) of the present invention comprises a resistance variable element (14) and a diode (18) which are formed on a substrate (10) such that the resistance variable element (14) has a resistance variable layer (11) sandwiched between a lower electrode (12) and an upper electrode (13), and the diode (18) which is connected in series with the resistance variable element (14) in the laminating direction and has an insulating layer or semiconductor layer (15) sandwiched between a first electrode (16) at the lower side and a second electrode (17) at the upper side. The resistance variable layer (11) is embedded in a first contact hole (21) formed on the lower electrode (12). A first area (22) where insulating layer or semiconductor layer (15) of the diode (18) is in contact with a first electrode (16) of the diode (18) is larger than at least one of a second area (23) where the resistance variable layer (11) is in contact with the upper electrode (13) and a third area (24) where the resistance variable layer (11) is in contact with the lower electrode (12).
    • 本发明的非易失性存储元件(20)包括形成在基板(10)上的电阻可变元件(14)和二极管(18),使得电阻可变元件(14)具有电阻变化层(11 )和位于下电极(12)和上电极(13)之间的二极管(18),以及与电阻可变元件(14)在层叠方向上串联连接并具有绝缘层或半导体层(15)的二极管 )夹在下侧的第一电极(16)和上侧的第二电极(17)之间。 电阻变化层(11)嵌入形成在下电极(12)上的第一接触孔(21)中。 二极管(18)的绝缘层或半导体层(15)与二极管(18)的第一电极(16)接触的第一区域(22)大于第二区域(23)中的至少一个, 其中电阻变化层(11)与上电极(13)接触,电阻变化层(11)与下电极(12)接触的第三区域(24)。