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1. 发明授权

US06468917B1 Method for modifying a C4 semiconductor device 失效
标题翻译：修改C4半导体器件的方法
公开(公告)号：US06468917B1
公开(公告)日：2002-10-22
申请号：US09502916
申请日：2000-02-10
申请人： Susan Xia Li , Arnold Louie , Maria Guardado
发明人： Susan Xia Li , Arnold Louie , Maria Guardado
IPC分类号： H01L21302
CPC分类号： H01L24/81 , H01L21/76892 , H01L24/11 , H01L2224/13099 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01033 , H01L2924/01074 , H01L2924/014 , H01L2924/15312 , H01L2224/0401
摘要： The present invention provides a method for modifying a C4 device, the device including a circuit, a polyimide layer, and a plurality of solder bumps in the active region of the C4 device. The method includes removing the polyimide layer using a plasma etch, the plasma etch comprising a mixture of oxygen and an inert gas; modifying the circuit; and cleaning the modified C4 device with a reactive flux. By mixing the oxygen with an inert gas, the oxidation of the solder bumps due to the plasma etch are reduced. Because the top layer features are now readily visible, circuit structures are more easily located, and modification can be more easily performed and with more accuracy. In the preferred embodiment, the device is then cleaned with a reactive flux, which removes any oxidation layer which has formed on the solder bumps. In this manner, circuit modification may be performed more quickly while also minimizing the oxidation of the solder bumps. The reduced oxidation of the solder bumps will help the C4 packaging process to be successful for electrical testing after focused beam ion (FIB) modification. Also, since the costly FIB process is not required to locally remove the polyimide layer for locating circuit structures, the cost of device fabrication is reduced.
摘要翻译：本发明提供一种在C4器件的有源区中修改C4器件的方法，该器件包括电路，聚酰亚胺层和多个焊料凸块。该方法包括使用等离子体蚀刻去除聚酰亚胺层，等离子体蚀刻包括氧和惰性气体的混合物; 修改电路; 并用反应通量清洗改性的C4装置。通过将氧气与惰性气体混合，由于等离子体蚀刻引起的焊料凸块的氧化降低。因为顶层特征现在容易可见，电路结构更容易定位，并且可以更准确地进行修改。在优选实施例中，然后用反应性焊剂清洁器件，其去除在焊料凸块上形成的任何氧化层。以这种方式，可以更快地执行电路修改，同时还使焊料凸块的氧化最小化。焊料凸块的减少的氧化将有助于C4封装工艺在聚焦光束离子（FIB）修改后的电气测试中成功。此外，由于不需要昂贵的FIB工艺来局部去除用于定位电路结构的聚酰亚胺层，因此减少了器件制造的成本。

2. 发明授权

US06806198B1 Gas-assisted etch with oxygen 失效
标题翻译：用氧气气辅助蚀刻
公开(公告)号：US06806198B1
公开(公告)日：2004-10-19
申请号：US09864666
申请日：2001-05-23
申请人： Rosalinda M. Ring , Susan Xia Li , Richard Blish, II
发明人： Rosalinda M. Ring , Susan Xia Li , Richard Blish, II
IPC分类号： H01L21302
CPC分类号： H01L21/32135 , C23F4/00 , H01J2237/31744
摘要： Gas-assisted etching (GAE) for integrated circuit dies is enhanced via a method and system that enable halide-assisted etching of dies having copper material. According to an example embodiment of the present invention, an integrated circuit die having copper is etched using a focused ion beam (FIB) and a halide etch gas, such as chlorine. A selected amount of oxygen-containing gas is supplied to the die to react with the halide and prevent the corrosion of exposed copper material in the die. In this manner, the benefits of halide-assisted etching are realized while inhibiting the corrosion of copper that typically occurs with integrated circuit dies having copper material.
摘要翻译：用于集成电路管芯的气体辅助蚀刻（GAE）通过能够对具有铜材料的模具进行卤化物辅助蚀刻的方法和系统得到增强。根据本发明的示例性实施例，使用聚焦离子束（FIB）和诸如氯的卤化物蚀刻气体蚀刻具有铜的集成电路管芯。将一定量的含氧气体供应到模具中以与卤化物反应，并防止裸露的铜材料的腐蚀。以这种方式，实现了卤化物辅助蚀刻的优点，同时抑制了通常在具有铜材料的集成电路模具中发生的铜的腐蚀。

3. 发明授权

US07319623B1 Method for isolating a failure site in a wordline in a memory array 有权
标题翻译：隔离存储器阵列中的字线中的故障位置的方法
公开(公告)号：US07319623B1
公开(公告)日：2008-01-15
申请号：US10981026
申请日：2004-11-04
申请人： Caiwen Yuan , Susan Xia Li , Andy Gray
发明人： Caiwen Yuan , Susan Xia Li , Andy Gray
IPC分类号： G11C7/00
CPC分类号： H01L27/1052
摘要： According to one exemplary embodiment, a method for isolating a failure site in a leaky wordline in a memory array includes dividing said leaky wordline into an initial leaky wordline portion and an initial non-leaky wordline portion, where the initial leaky wordline portion has wordline-to-substrate leakage. The initial leaky wordline portion can be determined by using a passive voltage contrast procedure to illuminate the initial leaky wordline portion. The method further includes performing a number of division and identification cycles on the initial leaky wordline portion to determine a final leaky wordline portion. According to this exemplary embodiment, the final leaky wordline portion comprises a predetermined number of memory cells. The method further includes performing a cutting and imaging procedure on the final leaky wordline portion to isolate the failure site.
摘要翻译：根据一个示例性实施例，一种用于隔离存储器阵列中的泄漏字线中的故障位置的方法包括将所述泄漏字线划分为初始泄漏字线部分和初始非泄露字线部分，其中初始泄漏字线部分具有字线 - 到基板泄漏。初始泄漏字线部分可以通过使用被动电压对比程序来确定来照亮初始泄漏字线部分。该方法还包括在初始泄漏字线部分上执行多个分割和识别周期以确定最终的泄漏字线部分。根据该示例性实施例，最终的泄漏字线部分包括预定数量的存储单元。该方法还包括对最终的泄漏字线部分执行切割和成像过程以隔离故障部位。

4. 发明授权

US06751294B1 Prevention of parametic or functional changes to silicon semiconductor device properties during x-ray inspection 有权
标题翻译：在x射线检查期间防止硅半导体器件性质的参数或功能变化
公开(公告)号：US06751294B1
公开(公告)日：2004-06-15
申请号：US10215075
申请日：2002-08-08
申请人： Richard C. Blish II , Susan Xia Li , David S. Lehtonen , J. Courtney Black , Don C. Darling
发明人： Richard C. Blish II , Susan Xia Li , David S. Lehtonen , J. Courtney Black , Don C. Darling
IPC分类号： G21K300
CPC分类号： G21K1/10 , G01N23/04 , G21K5/04
摘要： An apparatus for x-raying a semiconductor device which includes semiconductor material and conductive material, the apparatus including a source of x-rays, a filter for receiving x-rays from the source of x-rays and allowing transmission of x-rays to the device, the filter having an atomic number greater than the atomic number of the conductive material of the device, and an x-ray imager for receiving x-rays from the device.
摘要翻译：一种用于对包括半导体材料和导电材料的半导体器件进行x射线的装置，该装置包括x射线源，用于从X射线源接收x射线并允许x射线向器件，具有大于器件的导电材料的原子序数的原子序数的滤光器和用于从器件接收x射线的x射线成像器。

5. 发明授权

US06358852B1 Decapsulation techniques for multi-chip (MCP) devices 失效
标题翻译：多芯片（MCP）器件的解封装技术
公开(公告)号：US06358852B1
公开(公告)日：2002-03-19
申请号：US09574580
申请日：2000-05-17
申请人： Susan Xia Li , Mohammad Massoodi , Daniel Yim
发明人： Susan Xia Li , Mohammad Massoodi , Daniel Yim
IPC分类号： H01L2100
CPC分类号： H01L21/56 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2924/01019 , H01L2924/15311 , H01L2924/00014 , H01L2924/00
摘要： Aspects for performing decapsulation of multi-chip devices are presented. One aspect includes removing a top die of the multi-chip device without employing a wet chemical etch and removing residual attach and package materials to expose a bottom die of the multi-chip device. An alternate aspect includes utilizing mechanical polishing and wet chemical etching to remove a top die of the multi-chip device, and exposing a bottom die through chemical decapsulation to allow failure analysis of the bottom die. A Flash memory die as a top die and a static random access memory (SRAM) die as a bottom die are included as a multi-chip device capable of decapsulation through these aspects.
摘要翻译：提出了执行多芯片器件解封装的方面。一个方面包括去除多芯片器件的顶部管芯而不采用湿式化学蚀刻并去除残留的附着和封装材料以暴露多芯片器件的底部裸片。另一方面包括利用机械抛光和湿法化学蚀刻去除多芯片器件的顶模，以及通过化学解封装使底模暴露以允许底模的故障分析。作为顶模的闪速存储器管芯和作为底管芯的静态随机存取存储器（SRAM）裸片被包括为能够通过这些方面进行解封装的多芯片器件。

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