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1. 发明授权

US5342796A Method for controlling gate size for semiconduction process 失效
标题翻译：控制半导体栅极尺寸的方法
公开(公告)号：US5342796A
公开(公告)日：1994-08-30
申请号：US887753
申请日：1992-05-27
申请人： Sung T. Ahn , Shigeki Hayashida
发明人： Sung T. Ahn , Shigeki Hayashida
IPC分类号： H01L21/336 , H01L21/265
CPC分类号： H01L29/66613
摘要： A method for preparing a semiconductor device comprises the following steps: (I) depositing at least nitride film on the whole surface of a semiconductor substrate having a field oxide film, (II) removing a portion of the nitride film from a gate-formation region to form an opening at the nitride film up to the substrate, (III) thereafter forming by selective oxidation a vertically projecting oxide film on the substrate at the opening portion, (IV) then removing all the films including the oxide film and the nitride film each covering the substrate to form a dug part of the substrate at the gate formation region, (V) providing on the dug part a gate oxide film and a gate electrode in the order, (VI) doping an impurity ion into the substrate in a manner of self-alignment using the gate electrode as a mask, and (VII) applying heat treatment to the substrate to form an impurity-diffused region.
摘要翻译：一种制备半导体器件的方法包括以下步骤：（I）在具有场氧化膜的半导体衬底的整个表面上至少沉积氮化物膜，（II）从栅极形成区域去除一部分氮化物膜在氮化膜上形成直到基板的开口，（III）然后通过选择性氧化在开口部分的基板上形成垂直突出的氧化膜，（IV），然后除去包括氧化物膜和氮化物膜的所有膜每个覆盖衬底以在栅极形成区域形成衬底的挖出部分，（V）按顺序在栅极氧化膜和栅电极上提供栅极氧化物膜和栅电极;（VI）以杂质离子掺杂到衬底中使用栅电极作为掩模的自对准方式，（VII）对基板进行热处理以形成杂质扩散区域。

2. 发明授权

US06747316B2 Surface-channel metal-oxide semiconductor transistors, their complementary field-effect transistors and method of producing the same 失效
标题翻译：表面沟道金属氧化物半导体晶体管，它们的互补场效应晶体管及其制造方法
公开(公告)号：US06747316B2
公开(公告)日：2004-06-08
申请号：US08678394
申请日：1996-07-02
申请人： Toshimasa Matsuoka , Seizou Kakimoto , Shigeki Hayashida , Hiroshi Iwata
发明人： Toshimasa Matsuoka , Seizou Kakimoto , Shigeki Hayashida , Hiroshi Iwata
IPC分类号： H01L2976
CPC分类号： H01L21/28052 , H01L21/823814 , H01L21/823842 , H01L29/665 , H01L29/6659
摘要： A surface-channel MOS transistor comprising; a gate electrode formed on a semiconductor substrate with a gate dielectric film therebetween and source/drain regions formed in the semiconductor substrate wherein the gate electrode is formed at least a polysilicon layer of a thickness of 100 to 200 nm uniformly doped with an impurity and the source/drain regions contains the same impurity in self-alignment with the gate electrode.
摘要翻译：一种表面沟道MOS晶体管，包括：形成在半导体衬底上的栅极电极，其栅极电介质膜和在半导体衬底中形成的源极/漏极区，其中栅电极至少形成均匀掺杂有杂质的厚度为100至200nm的多晶硅层，源/漏区包含与栅电极自对准相同的杂质。

3. 发明授权

US06720627B1 Semiconductor device having junction depths for reducing short channel effect 失效
标题翻译：具有用于降低短沟道效应的结深度的半导体器件
公开(公告)号：US06720627B1
公开(公告)日：2004-04-13
申请号：US09698097
申请日：2000-10-30
申请人： Hiroshi Iwata , Masayuki Nakano , Shigeki Hayashida , Seizou Kakimoto , Toshimasa Matsuoka
发明人： Hiroshi Iwata , Masayuki Nakano , Shigeki Hayashida , Seizou Kakimoto , Toshimasa Matsuoka
IPC分类号： H01L31113
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译：公开了一种半导体器件及其制造方法。在硅半导体衬底上形成氮化硅膜。然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。

4. 发明授权

US07098489B2 Split type light receiving element and circuit-built-in light-receiving element and optical disk drive 失效
标题翻译：分体式光接收元件和电路内置光接收元件和光盘驱动器
公开(公告)号：US07098489B2
公开(公告)日：2006-08-29
申请号：US10483493
申请日：2002-07-03
申请人： Tatsuya Morioka , Shigeki Hayashida , Yoshihiko Tani , Isamu Ohkubo
发明人： Tatsuya Morioka , Shigeki Hayashida , Yoshihiko Tani , Isamu Ohkubo
IPC分类号： H01L29/205
CPC分类号： H01L31/103
摘要： A plurality of N-type diffusion layers are formed a specified distance apart on a P-type semiconductor layer. A P-type leak prevention layer formed between at least N-type diffusion layers prevents leaking between the diffusion layers. A dielectric film is formed in at least a light incident area on a P-type semiconductor layer including the diffusion layers and the leak prevention layer. Accordingly, provided are a split type light receiving element positively functioning as a split type light receiving element even when charge is accumulated in the dielectric film and having a uniform sensitivity throughout the entire area on a light receiving surface, and a circuit-built-in light receiving element and an optical disk device using the split type light receiving element.
摘要翻译：多个N型扩散层在P型半导体层上分开规定距离地形成。形成在至少N型扩散层之间的P型防漏层防止了扩散层之间的泄漏。在包括扩散层和防漏层的P型半导体层的至少入射光区域中形成介电膜。因此，即使在电介质膜中积累电荷并且在光接收表面上的整个区域具有均匀的灵敏度的情况下，提供了作为分割型光接收元件的分体式光接收元件，并且电路内置光接收元件和使用分离式光接收元件的光盘装置。

5. 发明授权

US06873025B2 Photodiode device including window defined in passivation layer for removing electrostatic charge 失效
标题翻译：光电二极管器件包括在钝化层中定义的窗口，用于去除静电电荷
公开(公告)号：US06873025B2
公开(公告)日：2005-03-29
申请号：US09984657
申请日：2001-10-30
申请人： Hideo Wada , Isamu Ohkubo , Kazuhiro Natsuaki , Naoki Fukunaga , Shigeki Hayashida
发明人： Hideo Wada , Isamu Ohkubo , Kazuhiro Natsuaki , Naoki Fukunaga , Shigeki Hayashida
IPC分类号： H01L27/14 , H01L29/40 , H01L29/88 , H01L31/0216 , H01L31/06 , H01L31/10
CPC分类号： H01L31/02161
摘要： A photodiode includes a first conductivity type semiconductor substrate or a first conductivity type semiconductor layer; a second conductivity type semiconductor layer provided on the first conductivity type semiconductor substrate or the first conductivity type semiconductor layer; an anti-reflection film provided on a surface of a portion of the second conductivity type semiconductor layer which is in a light receiving area; a first conductive layer provided in an area in the vicinity of the light receiving area; and a passivation layer provided on the first conductive layer. Light incident on the photodiode is detected by a junction of the one of the first conductivity type semiconductor substrate and the first conductivity type semiconductor layer, and the second conductivity type semiconductor layer. The area in the vicinity of the light receiving area includes a window area having an opening in the passivation layer for partially exposing the first conductive layer.
摘要翻译：光电二极管包括第一导电类型半导体衬底或第一导电类型半导体层; 设置在所述第一导电型半导体基板或所述第一导电型半导体层上的第二导电型半导体层; 设置在所述第二导电型半导体层的位于光接收区域的部分的表面上的防反射膜; 设置在所述光接收区域附近的区域中的第一导电层; 以及设置在第一导电层上的钝化层。通过第一导电类型半导体衬底和第一导电类型半导体层之一以及第二导电类型半导体层的接合来检测入射在光电二极管上的光。光接收区域附近的区域包括在钝化层中具有用于部分地暴露第一导电层的开口的窗口区域。

6. 发明申请

US20050045979A1 Light receiving device circuit-built-in type light receiving unit and optical disk unit 审中-公开
标题翻译：光接收装置电路内置型光接收单元和光盘单元
公开(公告)号：US20050045979A1
公开(公告)日：2005-03-03
申请号：US10497242
申请日：2002-11-29
申请人： Tatsuya Morioka , Shigeki Hayashida , Yoshihiko Tani , Isamu Ohkubo , Hideo Wada
发明人： Tatsuya Morioka , Shigeki Hayashida , Yoshihiko Tani , Isamu Ohkubo , Hideo Wada
IPC分类号： H01L31/0216 , H01L31/103 , H01L27/14
CPC分类号： H01L31/02161 , H01L31/103 , H01L31/1035
摘要： A first P-type diffusion layer and a P-type semiconductor layer are provided on a silicon substrate, and two N-type diffusion layers are provided on a front surface of this P-type semiconductor layer to form two light receiving units. Three-layer translucent films, a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are disposed on the N-type diffusion layers and on the P-type semiconductor layer between the two diffusion layers. Holes produced during a production process and distributed and captured in two interfaces between the three-layer translucent films can reduce a field intensity in the vicinity of the surface of the P-type semiconductor layer to below a conventional level and an inversion of a conductive type to reduce a leak current between the light receiving units accordingly.
摘要翻译：在硅衬底上设置第一P型扩散层和P型半导体层，在该P型半导体层的前表面上设置两个N型扩散层，以形成两个光接收单元。三层半透膜，第一氧化硅膜，氮化硅膜和第二氧化硅膜设置在两个扩散层之间的N型扩散层和P型半导体层上。在生产过程中产生的并且在三层半透明膜之间的两个界面中分布和捕获的孔可以将P型半导体层的表面附近的场强降低到传统水平以下并导致导通型以相应地减小光接收单元之间的泄漏电流。

7. 发明申请

US20050045962A1 Semiconductor device having junction depths for reducing short channel effect 审中-公开
标题翻译：具有用于降低短沟道效应的结深度的半导体器件
公开(公告)号：US20050045962A1
公开(公告)日：2005-03-03
申请号：US10421713
申请日：2003-04-24
申请人： Hiroshi Iwata , Masayuki Nakano , Shigeki Hayashida , Seizou Kakimoto , Toshimasa Matsuoka
发明人： Hiroshi Iwata , Masayuki Nakano , Shigeki Hayashida , Seizou Kakimoto , Toshimasa Matsuoka
IPC分类号： H01L21/265 , H01L21/28 , H01L21/285 , H01L21/336 , H01L21/8238 , H01L29/76
CPC分类号： H01L21/26506 , H01L21/2652 , H01L21/26526 , H01L21/2658 , H01L21/28052 , H01L21/28518 , H01L21/823807 , H01L29/665 , H01L29/6659
摘要： A semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.
摘要翻译：公开了一种半导体器件及其制造方法。在硅半导体衬底上形成氮化硅膜。然后将杂质离子注入到硅半导体衬底的所需区域中，使得氮化硅膜的氮原子和硅原子与杂质离子的引入一起并入到硅半导体衬底的表面中。硅半导体衬底具有混入其中的最小化的氧含量，并且在注入杂质离子时恢复由氮原子填充的晶体缺陷。制造的半导体器件没有栅极电极耗尽和结电流泄漏之间的折衷关系以及短沟道效应。

8. 发明授权

US5362670A Semiconductor device producing method requiring only two masks for completion of element isolation regions and P- and N-wells 失效
标题翻译：半导体器件制造方法仅需要两个掩模来完成元件隔离区和P-阱和N阱
公开(公告)号：US5362670A
公开(公告)日：1994-11-08
申请号：US103250
申请日：1993-08-09
申请人： Katsuji Iguchi , Shigeki Hayashida , Akio Kawamura , Shinichi Sato , Tomohiko Tateyama
发明人： Katsuji Iguchi , Shigeki Hayashida , Akio Kawamura , Shinichi Sato , Tomohiko Tateyama
IPC分类号： H01L21/762 , H01L21/8238 , H01L27/092 , H01L21/76
CPC分类号： H01L21/76218 , H01L21/823892 , Y10S148/117
摘要： Element isolation regions are first formed on a silicon substrate. Active regions other than the isolation regions are formed with an oxide film. Then, a first oxidization prevention layer, a semiconductor layer and a second oxidization prevention layer are formed on the substrate in that order. A resist pattern having a hole in a P-channel MOS transistor formation region is formed. The second oxidization prevention layer in the P-channel MOS transistor formation region is removed and an impurity is ion-implanted using the resist pattern as a mask. After removing the resist pattern, the substrate is thermally treated in the presence of an oxidizer substance to transform an exposed portion of the semiconductor layer into an oxidized semiconductor layer and at the same time to diffuse the implanted impurity in the substrate to thereby form an N-well. After removing the remaining second oxidization prevention layer and the semiconductor layer located under the remaining second oxidization prevention layer, an impurity is ion-implanted into the substrate using the oxidized semiconductor layer as a mask, to thereby form a P-well in a N-channel MOS transistor formation region of the substrate. Then the P-channel and N-channel MOS transistors are formed in respective regions.
摘要翻译：元件隔离区首先形成在硅衬底上。除了隔离区域之外的有源区域形成有氧化物膜。然后，依次在基板上形成第一氧化防止层，半导体层和第二防氧化层。形成在P沟道MOS晶体管形成区域中具有孔的抗蚀剂图案。去除P沟道MOS晶体管形成区域中的第二氧化防止层，并使用抗蚀剂图案作为掩模来离子注入杂质。在除去抗蚀剂图案之后，在氧化剂物质的存在下对衬底进行热处理，以将半导体层的暴露部分转变为氧化半导体层，同时将注入的杂质扩散到衬底中，从而形成N -好。在除去剩余的第二氧化防止层和位于剩余的第二氧化防止层下方的半导体层之后，使用氧化半导体层作为掩模将杂质离子注入到衬底中，从而在N- 沟道MOS晶体管形成区域。然后在相应的区域中形成P沟道和N沟道MOS晶体管。

9. 发明申请

US20050001231A1 Light receiving element and light receiving device incorporating circuit and optical disc drive 审中-公开
标题翻译：光接收元件和光接收装置并入电路和光盘驱动器
公开(公告)号：US20050001231A1
公开(公告)日：2005-01-06
申请号：US10497202
申请日：2002-12-10
申请人： Shigeki Hayashida , Tatsuya Morioka , Yoshihiko Tani , Isamu Ohkubo , Hideo Wada
发明人： Shigeki Hayashida , Tatsuya Morioka , Yoshihiko Tani , Isamu Ohkubo , Hideo Wada
IPC分类号： G11B7/12 , G11B7/123 , G11B7/13 , H01L27/14 , H01L31/0216 , H01L31/10 , H01L31/103 , H01L33/00
CPC分类号： G11B7/123 , G11B7/13 , H01L27/14 , H01L31/02161 , H01L31/103
摘要： A light receiving device includes a P type diffusion layer (101), a P type semiconductor layer (102), an N type diffusion layer (103) serving as a light receiving part, and a light transmitting film (104), all formed on a p type silicon substrate (100). The N type diffusion layer (103) has a thickness of 0.8 μm to 1.0 μm which is larger than an absorption length of incident light having wavelength of 400 nm, and such a concentration profile that a impurity concentration is not higher than 1E19 cm−3 on a surface and has a peak in a vicinity of the surface. Since recombination of carriers generated by the incident light is prevented in the vicinity of the surface of the N type diffusion layer (103), sensitivity of the light receiving device is enhanced and response speed is increased by the low-resistance N type diffusion layer (103) having a larger junction depth.
摘要翻译：光接收装置包括：P型扩散层（101），P型半导体层（102），用作光接收部分的N型扩散层（103）和透光膜（104），全部形成在 ap型硅衬底（100）。 N型扩散层（103）的厚度为0.8μm〜1.0μm，比波长400nm的入射光的吸收长度大，杂质浓度不高于1E19cm -1的浓度分布， 3>在表面附近具有峰值。由于在N型扩散层（103）的表面附近防止了由入射光产生的载流子的复合，因此通过低电阻N型扩散层提高了光接收装置的灵敏度和响应速度（ 103）具有较大的结深度。

10. 发明授权

US06580095B2 Circuit-containing photodetector, method of manufacturing the same, and optical device using circuit-containing photodetector 失效
公开(公告)号：US06580095B2
公开(公告)日：2003-06-17
申请号：US09874997
申请日：2001-06-07
申请人： Yoshihiko Tani , Shigeki Hayashida , Tatsuya Morioka , Seizo Kakimoto , Toshihiko Fukushima
发明人： Yoshihiko Tani , Shigeki Hayashida , Tatsuya Morioka , Seizo Kakimoto , Toshihiko Fukushima
IPC分类号： H01L2715
CPC分类号： H01L27/14698 , H01L27/14609 , H01L27/14689
摘要： A circuit-containing photodetector is provided which can have a high sensitivity and response to light of a short wavelength and can be manufactured in a good yield. The circuit-containing photodetector includes a semiconductor substrate, a semiconductor layer formed thereon, and a conductive impurity region formed in the semiconductor layer for transmitting a signal. In the semiconductor layer, a trench is formed to have a depth to reach the substrate. An impurity region of a photodetector element is formed at the surface of the semiconductor substrate exposed at the bottom of the trench. A signal processing circuit for processing an electric signal from the photodetector element is formed on the semiconductor layer. The conductive impurity region for transmitting the electric signal from the photodetector element is formed to extend from the bottom of the trench to the upper surface of the semiconductor layer.

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