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1. 发明申请

US20060267090A1 Trenched-gate field effect transistors and methods of forming the same 有权
标题翻译：斜沟栅场效应晶体管及其形成方法
公开(公告)号：US20060267090A1
公开(公告)日：2006-11-30
申请号：US11398467
申请日：2006-04-04
申请人： Steven Sapp , Hamza Yilmaz , Christopher Rexer , Daniel Calafut
发明人： Steven Sapp , Hamza Yilmaz , Christopher Rexer , Daniel Calafut
IPC分类号： H01L29/76
CPC分类号： H01L29/7827 , H01L21/26586 , H01L27/0629 , H01L29/0619 , H01L29/0847 , H01L29/0869 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/66666 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7828 , H01L29/872 , H01L2924/13091
摘要： A monolithically integrated field effect transistor and Schottky diode includes gate trenches extending into a semiconductor region. Source regions having a substantially triangular shape flank each side of the gate trenches. A contact opening extends into the semiconductor region between adjacent gate trenches. A conductor layer fills the contact opening to electrically contact: (a) the source regions along at least a portion of a slanted sidewall of each source region, and (b) the semiconductor region along a bottom portion of the contact opening, wherein the conductor layer forms a Schottky contact with the semiconductor region.
摘要翻译：单片集成场效应晶体管和肖特基二极管包括延伸到半导体区域的栅极沟槽。源极区域具有位于栅极沟槽的每一侧的大致三角形形状。接触开口延伸到相邻栅极沟槽之间的半导体区域中。导体层填充接触开口以电接触：（a）源区域沿着每个源极区域的倾斜侧壁的至少一部分，以及（b）沿接触开口底部的半导体区域，其中导体层与半导体区形成肖特基接触。

2. 发明申请

US20050199918A1 Optimized trench power MOSFET with integrated schottky diode 审中-公开
标题翻译：具有集成肖特基二极管的优化沟槽功率MOSFET
公开(公告)号：US20050199918A1
公开(公告)日：2005-09-15
申请号：US10801499
申请日：2004-03-15
申请人： Daniel Calafut , Christopher Rexer
发明人： Daniel Calafut , Christopher Rexer
IPC分类号： H01L29/80
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/407 , H01L29/7806 , H01L29/8725
摘要： In accordance with the present invention, a monolithically integrated structure combines a field effect transistor and a Schottky structure in an active area of a semiconductor substrate. The field effect transistor includes a first trench extending into the substrate and substantially filled by conductive material forming a gate electrode of the field effect transistor. A pair of doped source regions are positioned adjacent to and on opposite sides of the trench and inside a doped body region. The Schottky structure includes a pair of adjacent trenches extending into the substrate. Each of the pair of adjacent trenches is substantially filled by a conductive material which is separated from trench side-walls by a thin layer of dielectric. The Schottky structure consumes 2.5% to 5.0% of the active area, and the field effect transistor consumes the remaining portion of the active area.
摘要翻译：根据本发明，单片集成结构在半导体衬底的有源区域中组合场效应晶体管和肖特基结构。场效应晶体管包括延伸到衬底中并且基本上由形成场效应晶体管的栅电极的导电材料填充的第一沟槽。一对掺杂源极区域邻近沟槽的相对侧并且位于掺杂体区域的内侧。肖特基结构包括延伸到衬底中的一对相邻沟槽。一对相邻沟槽中的每一个基本上由导电材料填充，导电材料通过薄的电介质层与沟槽侧壁分离。肖特基结构消耗有源面积的2.5％至5.0％，场效应晶体管消耗有源区的剩余部分。

3. 发明申请

US20060214222A1 Power semiconductor devices and methods of manufacture 有权
公开(公告)号：US20060214222A1
公开(公告)日：2006-09-28
申请号：US11445111
申请日：2006-05-31
申请人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J. Lee , Peter Wilson , Joseph Yedinak , J. Jung , H. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J. Lee , Peter Wilson , Joseph Yedinak , J. Jung , H. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
IPC分类号： H01L29/76
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

4. 发明申请

US20050167742A1 Power semiconductor devices and methods of manufacture 有权
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US20050167742A1
公开(公告)日：2005-08-04
申请号：US11026276
申请日：2004-12-29
申请人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter Wilson , Joseph Yedinak , J.Y. Jung , H.C. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter Wilson , Joseph Yedinak , J.Y. Jung , H.C. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
IPC分类号： G06F1/26 , H01L21/265 , H01L21/3065 , H01L21/311 , H01L21/336 , H01L21/68 , H01L23/495 , H01L23/498 , H01L29/06 , H01L29/165 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/78 , H02M3/00 , H02M3/335
CPC分类号： H01L29/7802 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66734 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2224/16245 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.
摘要翻译：公开了用于改进的功率器件的各种实施例及其制造方法，封装和结合其的用于各种功率电子应用的电路。本发明的一个方面结合了许多电荷平衡技术和用于减小寄生电容的其它技术，以获得具有改进的电压性能，较高开关速度和较低导通电阻的功率器件的不同实施例。本发明的另一方面提供了用于低，中和高电压装置的改进的端接结构。根据本发明的其它方面提供了改进的功率器件制造方法。提出了具体的处理步骤的改进，例如沟槽的形成，沟槽内的电介质层的形成，台面结构的形成以及用于降低衬底厚度的工艺等。根据本发明的另一方面，电荷平衡功率器件在同一管芯上并入温度和电流检测元件，例如二极管。本发明的其它方面改进了用于功率器件的等效串联电阻（ESR），在与功率器件相同的芯片上并入附加电路，并提供对电荷平衡功率器件的封装的改进。

5. 发明申请

US20060214221A1 Power semiconductor devices and methods of manufacture 有权
公开(公告)号：US20060214221A1
公开(公告)日：2006-09-28
申请号：US11445020
申请日：2006-05-31
申请人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter Wilson , Joseph Yedinak , J.Y. Jung , H.C. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
发明人： Ashok Challa , Alan Elbanhawy , Thomas Grebs , Nathan Kraft , Dean Probst , Rodney Ridley , Steven Sapp , Qi Wang , Chongman Yun , J.G. Lee , Peter Wilson , Joseph Yedinak , J.Y. Jung , H.C. Jang , Babak Sani , Richard Stokes , Gary Dolny , John Mytych , Becky Losee , Adam Selsley , Robert Herrick , James Murphy , Gordon Madson , Bruce Marchant , Christopher Rexer , Christopher Kocon , Debra Woolsey
IPC分类号： H01L29/76
CPC分类号： H01L29/407 , H01L21/26586 , H01L21/3065 , H01L21/30655 , H01L21/31116 , H01L21/6835 , H01L23/4952 , H01L23/49816 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/165 , H01L29/402 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/4933 , H01L29/495 , H01L29/66348 , H01L29/66734 , H01L29/7396 , H01L29/7802 , H01L29/7804 , H01L29/7805 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7815 , H01L29/7828 , H01L29/7831 , H01L2221/6834 , H01L2221/68363 , H01L2224/16 , H01L2924/01012 , H01L2924/01019 , H01L2924/01078 , H01L2924/10253 , H01L2924/12032 , H01L2924/1301 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15311 , H01L2924/1532 , H01L2924/19041 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H02M3/00 , H02M3/33592 , H02M7/48 , Y02B70/1475 , H01L2924/00 , H01L2924/00014
摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

6. 发明申请

US20080042143A1 AVALANCHE PROTECTION FOR WIDE BANDGAP DEVICES 有权
标题翻译： AVALANCHE保护宽带配置
公开(公告)号：US20080042143A1
公开(公告)日：2008-02-21
申请号：US11828283
申请日：2007-07-25
申请人： Joseph Yedinak , Richard Woodin , Christopher Rexer , Praveen Shenoy , Kwanghoon Oh , Chongman Yun
发明人： Joseph Yedinak , Richard Woodin , Christopher Rexer , Praveen Shenoy , Kwanghoon Oh , Chongman Yun
IPC分类号： H01L31/0312 , H01L21/00
CPC分类号： H01L29/872 , H01L27/0248 , H01L29/1608 , H01L29/8618 , H01L29/87
摘要： A method and device for protecting wide bandgap devices from failing during suppression of voltage transients. An improvement in avalanche capability is achieved by placing one or more diodes, or a PNP transistor, across the blocking junction of the wide bandgap device.
摘要翻译：一种用于在抑制电压瞬变期间保护宽带隙器件不发生故障的方法和装置。通过在宽带隙器件的阻塞结上放置一个或多个二极管或PNP晶体管来实现雪崩能力的改善。

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