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1. 发明授权

US07737021B1 Resist trim process to define small openings in dielectric layers 有权
标题翻译：抵抗修整过程以限定电介质层中的小开口
公开(公告)号：US07737021B1
公开(公告)日：2010-06-15
申请号：US10261613
申请日：2002-09-30
申请人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
发明人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
IPC分类号： H01L21/4763
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises defining a photoresist feature having a first size in a layer of photoresist that is formed above a layer of dielectric material. The method further comprises reducing the first size of the photoresist feature to produce a reduced size photoresist feature, forming an opening in the layer of dielectric material under the reduced size photoresist feature, and forming a conductive material in the opening in the layer of dielectric material.
摘要翻译：本发明涉及一种形成半导体器件的方法。在一个说明性实施例中，该方法包括在形成在电介质材料层上方的光致抗蚀剂层中限定具有第一尺寸的光致抗蚀剂特征。该方法还包括减小光致抗蚀剂特征的第一尺寸以产生减小尺寸的光致抗蚀剂特征，在减小尺寸的光致抗蚀剂特征下的电介质材料层中形成开口，以及在电介质材料层中的开口中形成导电材料。

2. 发明授权

US06500755B2 Resist trim process to define small openings in dielectric layers 有权
标题翻译：抵抗修整过程以限定电介质层中的小开口
公开(公告)号：US06500755B2
公开(公告)日：2002-12-31
申请号：US09731577
申请日：2000-12-06
申请人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
发明人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas John Kepler
IPC分类号： H01L214763
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144
摘要： The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises defining a photoresist feature having a first size in a layer of photoresist that is formed above a layer of dielectric material. The method further comprises reducing the first size of the photoresist feature to produce a reduced size photoresist feature, forming an opening in the layer of dielectric material under the reduced size photoresist feature, and forming a conductive material in the opening in the layer of dielectric material.
摘要翻译：本发明涉及一种形成半导体器件的方法。在一个说明性实施例中，该方法包括在形成在电介质材料层上方的光致抗蚀剂层中限定具有第一尺寸的光致抗蚀剂特征。该方法还包括减小光致抗蚀剂特征的第一尺寸以产生减小尺寸的光致抗蚀剂特征，在减小尺寸的光致抗蚀剂特征下的电介质材料层中形成开口，以及在电介质材料层中的开口中形成导电材料。

3. 发明授权

US06406993B1 Method of defining small openings in dielectric layers 有权
标题翻译：定义介电层中小开口的方法
公开(公告)号：US06406993B1
公开(公告)日：2002-06-18
申请号：US09523439
申请日：2000-03-10
申请人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas J. Kepler
发明人： Srikanteswara Dakshina-Murthy , Paul R. Besser , Jonathan B. Smith , Eric M. Apelgren , Christian Zistl , Jeremy I. Martin , Lie Larry Zhao , Nicholas J. Kepler
IPC分类号： H01L214763
CPC分类号： H01L21/76816 , H01L21/76831
摘要： The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises forming a layer of dielectric material, forming a hard mask layer above the layer of dielectric material, and forming an opening in the hard mask layer. The method further comprises forming a sidewall spacer in the opening in the hard mask layer that defines a reduced opening, forming an opening in the layer of dielectric material below the reduced opening, and forming a conductive interconnection in the opening in the dielectric layer.
摘要翻译：本发明涉及一种形成半导体器件的方法。在一个说明性实施例中，该方法包括形成电介质材料层，在介电材料层之上形成硬掩模层，并在硬掩模层中形成开口。所述方法还包括在所述硬掩模层中的所述开口中形成侧壁间隔物，所述开口限定缩小的开口，在所述还原开口下方的介电材料层中形成开口，以及在所述电介质层的所述开口中形成导电互连。

4. 发明授权

US06514844B1 Sidewall treatment for low dielectric constant (low K) materials by ion implantation 失效
标题翻译：通过离子注入对低介电常数（低K）材料进行侧壁处理
公开(公告)号：US06514844B1
公开(公告)日：2003-02-04
申请号：US09840598
申请日：2001-04-23
申请人： Jeremy I. Martin , Eric M. Apelgren , Christian Zistl , Paul R. Besser , Srikantewara Dakshina-Murthy , Jonathan B. Smith , Nick Kepler , Fred Cheung
发明人： Jeremy I. Martin , Eric M. Apelgren , Christian Zistl , Paul R. Besser , Srikantewara Dakshina-Murthy , Jonathan B. Smith , Nick Kepler , Fred Cheung
IPC分类号： H01L2144
CPC分类号： H01L21/76825 , H01L21/31155 , H01L21/76801 , H01L21/76807 , H01L21/7681 , H01L21/76877
摘要： A method is provided, the method comprising forming a first conductive structure, and forming a first dielectric layer above the first conductive structure. The method also comprises densifying a portion of the first dielectric layer above at least a portion of the first conductive structure, and forming a first opening in the densified portion of the first dielectric layer.
摘要翻译：提供了一种方法，该方法包括形成第一导电结构，以及在第一导电结构之上形成第一电介质层。该方法还包括在第一导电结构的至少一部分上方致密化第一电介质层的一部分，以及在第一介电层的致密部分中形成第一开口。

5. 发明授权

US06261963B1 Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices 有权
标题翻译：阻挡金属层反向电镀以提高铜互连器件的电迁移性能
公开(公告)号：US06261963B1
公开(公告)日：2001-07-17
申请号：US09611729
申请日：2000-07-07
申请人： Larry Zhao , Paul R. Besser , Eric M. Apelgren , Christian Zistl , Jonathan B. Smith
发明人： Larry Zhao , Paul R. Besser , Eric M. Apelgren , Christian Zistl , Jonathan B. Smith
IPC分类号： H01L21302
CPC分类号： H01L21/76873 , H01L21/2885 , H01L21/76829 , H01L21/76835 , H01L21/7684 , H01L21/76843 , H01L21/76844 , H01L21/76877 , Y10S438/927
摘要： A method is provided for forming a conductive interconnect, the method comprising forming a first dielectric layer above a structure layer, forming a first opening in the first dielectric layer, and forming a first conductive structure in the first opening. The method also comprises forming a second dielectric layer above the first dielectric layer and above the first conductive structure, forming a second opening in the second dielectric layer above at least a portion of the first conductive structure, the second opening having a side surface and a bottom surface, and forming at least one barrier metal layer in the second opening on the side surface and on the bottom surface. In addition, the method comprises removing a portion of the at least one barrier metal layer from the bottom surface, and forming a second conductive structure in the second opening, the second conductive structure contacting the at least the portion of the first conductive structure. The method further comprises forming the conductive interconnect by annealing the second conductive structure and the first conductive structure.
摘要翻译：提供了一种用于形成导电互连的方法，所述方法包括在结构层上形成第一介电层，在第一介电层中形成第一开口，并在第一开口中形成第一导电结构。该方法还包括在第一介电层之上和第一导电结构之上形成第二电介质层，在第二导电结构的至少一部分上方的第二电介质层中形成第二开口，第二开口具有侧表面和并且在侧表面和底表面上的第二开口中形成至少一个阻挡金属层。此外，该方法包括从底表面去除至少一个阻挡金属层的一部分，以及在第二开口中形成第二导电结构，第二导电结构与第一导电结构的至少一部分接触。该方法还包括通过使第二导电结构和第一导电结构退火来形成导电互连。

6. 发明授权

US06315637B1 Photoresist removal using a polishing tool 有权
标题翻译：使用抛光工具去除光刻胶
公开(公告)号：US06315637B1
公开(公告)日：2001-11-13
申请号：US09484601
申请日：2000-01-18
申请人： Eric M. Apelgren , Jonathan B. Smith , Paul R. Besser
发明人： Eric M. Apelgren , Jonathan B. Smith , Paul R. Besser
IPC分类号： B24B100
CPC分类号： H01L21/31058 , B24B37/042
摘要： The present invention is directed to semiconductor processing operations. In one illustrative embodiment, the invention comprises providing a wafer having a layer of photoresist formed thereabove, positioning the layer of photoresist in contact with a polishing pad or a polishing tool, and rotating at least one of the wafer and the polishing pad to remove substantially all of the layers of photoresist.
摘要翻译：本发明涉及半导体处理操作。在一个说明性实施例中，本发明包括提供具有在其上形成的光致抗蚀剂层的晶片，将光致抗蚀剂层定位成与抛光垫或抛光工具接触，并且旋转晶片和抛光垫中的至少一个，以基本上去除所有的光刻胶层。

7. 发明授权

US06294472B1 Dual slurry particle sizes for reducing microscratching of wafers 有权
标题翻译：用于减少晶片显微镜的双重浆料粒径
公开(公告)号：US06294472B1
公开(公告)日：2001-09-25
申请号：US09576750
申请日：2000-05-23
申请人： Jonathan B. Smith , Paul R. Besser , Jeremy I. Martin
发明人： Jonathan B. Smith , Paul R. Besser , Jeremy I. Martin
IPC分类号： H01L2100
CPC分类号： C09G1/02 , B24B37/044 , B24B57/02 , H01L21/30625
摘要： A method includes providing at least one wafer having a process layer formed thereon for polishing. The process layer is polished using a first polishing process that is associated with a slurry having a first abrasive particle size. The process layer is polished using a second polishing process that is associated with a slurry having a second abrasive particle size that is different from the first abrasive particle size. A system includes a polishing tool and a process controller. The polishing tool is adapted to receive at least one wafer having a process layer formed thereon for polishing. The polishing tool is adapted to polish the process layer using a first polishing process that is associated with a slurry having a first abrasive particle size. The polishing tool is adapted to polish the process layer using a second polishing process that is associated with a slurry having a second abrasive particle size that is different from the first abrasive particle size. The process controller is coupled to the polishing tool and adapted to communicate with at least one of a slurry controller and the polishing tool.
摘要翻译：一种方法包括提供至少一个晶片，其上形成有用于抛光的工艺层。使用与具有第一研磨粒度的浆料相关联的第一抛光工艺来抛光工艺层。使用与具有不同于第一磨料颗粒尺寸的第二磨料颗粒尺寸的浆料相关联的第二抛光方法来抛光工艺层。系统包括抛光工具和过程控制器。抛光工具适于接收至少一个晶片，其上形成有用于抛光的工艺层。抛光工具适于使用与具有第一研磨粒度的浆料相关联的第一抛光工艺来抛光工艺层。抛光工具适于使用与具有不同于第一磨料颗粒尺寸的第二磨料颗粒尺寸的浆料相关联的第二抛光工艺来抛光工艺层。过程控制器耦合到抛光工具并且适于与浆料控制器和抛光工具中的至少一个连通。

8. 发明授权

US5985364A Method of exhaust control for spin-on films with reduced defects 失效
标题翻译：具有减少缺陷的旋涂膜的排气控制方法
公开(公告)号：US5985364A
公开(公告)日：1999-11-16
申请号：US55258
申请日：1998-04-06
申请人： Jonathan B. Smith , C. Bradford Hopper
发明人： Jonathan B. Smith , C. Bradford Hopper
IPC分类号： B05D1/00 , B05D3/04 , H01L21/00 , B05D3/12
CPC分类号： H01L21/6715 , B05D1/005 , B05D3/0493
摘要： Spin-on coatings are applied by ramping-up the exhaust level in the spin coating chamber to achieve a predetermined minimum exhaustion level prior to accelerating rotation of the coating substrate to a high speed to effect spreading of the coating fluid. The resulting spun-on coatings exhibit reduced defect formation and reduced aerosol particle redeposition thereon.
摘要翻译：旋涂涂层通过在旋转涂层室中升高废气水平来施加，以在涂覆基材加速旋转之前达到预定的最小消耗水平以实现涂布液的扩散。所得的旋涂涂层表现出减少的缺陷形成和减少的气溶胶颗粒再沉积。

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