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1. 发明授权

US4951123A Integrated circuit chip assembly utilizing selective backside deposition 失效
标题翻译：利用选择性背面沉积的集成电路芯片组件
公开(公告)号：US4951123A
公开(公告)日：1990-08-21
申请号：US252234
申请日：1988-09-30
申请人： Soong H. Lee , Chun L. Lau , Daniel C. Buck , Dale E. Dawson
发明人： Soong H. Lee , Chun L. Lau , Daniel C. Buck , Dale E. Dawson
IPC分类号： H01L23/64 , H01L29/06
CPC分类号： H01L23/64 , H01L29/0657 , H01L2924/0002 , H01L2924/3011
摘要： The invention is an improved integrated circuit chip assembly which provides enhanced heat transfer from active electronic devices of the integrated circuit by significantly reducing the thickness of the substrate and providing the necessary structural support through a thermally conducting spacing segment between the substrate and a ground plane in the region of the active electronic devices. This improvement further permits added flexibility in the design of transmission lines by permitting adjustment of the distance between the transmission line and the ground plane and furthermore by permitting the introduction of a second dielectric material such that the impedance of the transmission line may be controlled.
摘要翻译：本发明是一种改进的集成电路芯片组件，其通过显着减小基板的厚度并通过基板和接地平面之间的导热间隔部分提供必要的结构支撑，从而提供从集成电路的有源电子器件增强的热传递有源电子设备的区域。这种改进进一步允许通过允许调节传输线和接地平面之间的距离并且还允许引入第二电介质材料从而可以控制传输线的阻抗来增加传输线设计的灵活性。

2. 发明授权

US5252842A Low-loss semiconductor device and backside etching method for manufacturing same 失效
标题翻译：低损耗半导体器件及其制造的背面蚀刻方法
公开(公告)号：US5252842A
公开(公告)日：1993-10-12
申请号：US736670
申请日：1991-07-26
申请人： Daniel C. Buck , James E. Degenford , Soong H. Lee , Scott A. Imhoff , Dale E. Dawson
发明人： Daniel C. Buck , James E. Degenford , Soong H. Lee , Scott A. Imhoff , Dale E. Dawson
IPC分类号： H01L21/338 , H01L29/417 , H01L29/812 , H01L29/80 , H01L29/06 , H01L29/205 , H01L29/64
CPC分类号： H01L29/66863 , H01L29/41733 , H01L29/8124 , H01L29/8126
摘要： A semiconductor device has material removed from the back of the substrate and a manufacturing process is provided for manufacturing these devices. In the exemplary embodiment, a GaAs FET chip is formed by a process including the step of etching the GaAs substrate from the back of the chip in a defined removal region to reduce the dielectric constant in the region of the source-to-drain path. A buffer layer of differing material provided between the active layers and the substrate prevents etching of the active layers during the removal process. To allow simplified etching patterns, the source-to-drain path may be laid out on the surface of the chip in a variety of patterns, including "packed" patterns concentrating a large path area in a small surface area of the chip. Optionally, this buffer layer may also be etched away in a further processing step. An insulating layer of material may be added to the back side of the chip in the etched region to increase structural strength, and a pressure relief ventilation path may be provided connecting the removal region to the outside at an edge or at the surface of the chip.
摘要翻译：半导体器件具有从衬底的背面去除的材料，并且提供制造这些器件的制造工艺。在示例性实施例中，通过包括在限定的去除区域中从芯片背面蚀刻GaAs衬底以降低源极 - 漏极路径区域中的介电常数的步骤的方法形成GaAs FET芯片。提供在有源层和衬底之间的不同材料的缓冲层防止在去除过程期间蚀刻活性层。为了允许简化的蚀刻图案，源到漏极路径可以以各种图案布置在芯片的表面上，包括将芯片的小表面区域中的大路径区域集中的“封装”图案。任选地，该缓冲层也可以在另外的处理步骤中被蚀刻掉。可以在蚀刻区域中的芯片的背面添加绝缘层材料，以增加结构强度，并且可以提供在芯片的边缘或表面处将去除区域连接到外部的减压通气路径。

3. 发明授权

US4638269A Wide band microwave analog phase shifter 失效
标题翻译：宽带微波模拟移相器
公开(公告)号：US4638269A
公开(公告)日：1987-01-20
申请号：US738794
申请日：1985-05-28
申请人： Dale E. Dawson , Anthony L. Conti , Soong H. Lee , Gary F. Shade , Lawrence E. Dickens
发明人： Dale E. Dawson , Anthony L. Conti , Soong H. Lee , Gary F. Shade , Lawrence E. Dickens
IPC分类号： H01P1/185
CPC分类号： H01P1/185
摘要： A reflective hybrid analog phase shifter is detailed which is operable in the X-band, and which exhibits minimal phase shift variation with higher power loadings. A pair of back-to-back connected Schottky varactor diodes are serially connected to each of the phase shifting ports of a 3 dB coupler. The Scottky varactor diodes are reverse biased to permit continuous variation of the phase shift as a function of analog bias potential. A monolithically fabricated implementation of this circuit design is detailed.
摘要翻译：详细描述了一种可在X波段工作的反射混合模拟移相器，并且其具有较高的功率负载的最小相移变化。一对背对背连接的肖特基变容二极管串联连接到3 dB耦合器的每个相移端口。 Scottky变容二极管被反向偏置，以允许作为模拟偏置电位的函数的相移的连续变化。详细描述了该电路设计的单片制造实现。

4. 发明授权

US09035704B2 High impedance microwave electronics 有权
标题翻译：高阻抗微波电子
公开(公告)号：US09035704B2
公开(公告)日：2015-05-19
申请号：US12896349
申请日：2010-10-01
申请人： Aaron A. Pesetski , Hong Z. Pesetski , James E. Baumgardner, II , Dale E. Dawson
发明人： Aaron A. Pesetski , Hong Z. Pesetski , James E. Baumgardner, II , Dale E. Dawson
IPC分类号： H03F3/04 , B82Y10/00
CPC分类号： B82Y10/00 , H01L2223/6655 , H03F3/04
摘要： High impedance, high frequency nanoscale device electronics configured to interface with low impedance loads include an impedance transforming stage constructed of multiple nanoscale devices, such as carbon nanotube field-effect transistors. In an embodiment of the present invention, an impedance transforming output stage of a multistage amplifier is configured to drive a 50 ohm transmission line with unity voltage gain using multiple carbon nanotube field-effect transistors in parallel. In a further embodiment, a receiver provided for an electronically steered receive array is a monolithic, lumped-element system formed from nanoscale devices and configured to interface with the external electrical systems via a single transmission line.
摘要翻译：配置为与低阻抗负载相连接的高阻抗，高频纳米级器件电子器件包括由多个纳米尺度器件（例如碳纳米管场效应晶体管）构成的阻抗变换级。在本发明的一个实施例中，多级放大器的阻抗变换输出级配置为并联使用多个碳纳米管场效应晶体管驱动具有单位电压增益的50欧姆传输线。在另一个实施例中，为电子转向接收阵列提供的接收器是由纳米级器件形成的单片式集总元件系统，并被配置为经由单个传输线与外部电气系统接口。

5. 发明申请

US20100203726A1 Method of Forming a Through Substrate Via in a Compound Semiconductor 有权
标题翻译：在复合半导体中形成通孔基板通孔的方法
公开(公告)号：US20100203726A1
公开(公告)日：2010-08-12
申请号：US12369423
申请日：2009-02-11
申请人： Harlan C. Cramer , Dale E. Dawson
发明人： Harlan C. Cramer , Dale E. Dawson
IPC分类号： H01L21/44
CPC分类号： H01L21/76898
摘要： A method is provided for forming a through substrate via in a compound semiconductor having a transistor on a front side of the substrate. The method comprises forming a protective stop pad over a contact area on the front side of the substrate, forming a contact pad overlying the protective stop pad, such that the contact pad is in contact with a terminal of the transistor and plasma etching a backside of the substrate to form a contact coupling via to the protective stop pad. The method further comprises performing a chemical wet etch to remove the protective stop pad and depositing a conductive contact layer in the contact coupling via to provide a conductive contact to the contact pad.
摘要翻译：提供一种用于在具有在基板的正面上的晶体管的化合物半导体中形成贯穿基板通孔的方法。该方法包括在衬底的正面上的接触区域上形成保护停止焊盘，形成覆盖保护停止焊盘的接触焊盘，使得接触焊盘与晶体管的端子接触，等离子体蚀刻位于基板，以形成接触耦合通孔到保护止动垫。该方法还包括执行化学湿法蚀刻以去除保护性止动垫并在接触耦合通孔中沉积导电接触层，以向接触垫提供导电接触。

6. 发明授权

US5351163A High Q monolithic MIM capacitor 失效
标题翻译：高Q单片MIM电容
公开(公告)号：US5351163A
公开(公告)日：1994-09-27
申请号：US998219
申请日：1992-12-30
申请人： Dale E. Dawson , Albert A. Burk, Jr. , Harlan C. Cramer , Ronald C. Brooks , Howell G. Henry
发明人： Dale E. Dawson , Albert A. Burk, Jr. , Harlan C. Cramer , Ronald C. Brooks , Howell G. Henry
IPC分类号： H01G4/08 , H01L21/02 , H01L29/92 , H01G4/10
CPC分类号： H01L28/40 , H01G4/08
摘要： A high Q monolithic metal-insulator-metal (MIM) capacitor utilizing a single crystal dielectric material. A dielectric membrane is epitaxially grown on a substrate. The membrane acts as an etch-stop when a backside etch is used to form a cavity in the substrate, resulting in a single crystal dielectric membrane spanning the cavity. Electrodes are formed on opposite surfaces of the membrane at the cavity location. For a shunt capacitor application, the bottom electrode is connected to the backside substrate metallization. For a series capacitor application, the bottom electrode is isolated from the backside metallization, but is connected to the topside circuitry through a via formed in the membrane. The membrane may consist of two dielectric layers, where the first layer is an etchstop material. In one embodiment the substrate and second dielectric layer are gallium arsenide and the first dielectric layer is aluminum gallium arsenide.
摘要翻译：使用单晶介质材料的高Q单片金属 - 绝缘体 - 金属（MIM）电容器。电介质膜在衬底上外延生长。当使用背面蚀刻在基板中形成空腔时，膜用作蚀刻停止，导致跨越空腔的单晶介质膜。在腔的位置处的膜的相对表面上形成电极。对于并联电容器应用，底部电极连接到背面基板金属化。对于串联电容器应用，底部电极与背面金属化隔离，但是通过形成在膜中的通孔连接到顶部电路。膜可以由两个介电层组成，其中第一层是蚀刻阻挡材料。在一个实施例中，衬底和第二电介质层是砷化镓，第一电介质层是砷化铝镓。

7. 发明授权

US08043965B2 Method of forming a through substrate via in a compound semiconductor 有权
标题翻译：在化合物半导体中形成贯通基板通孔的方法
公开(公告)号：US08043965B2
公开(公告)日：2011-10-25
申请号：US12369423
申请日：2009-02-11
申请人： Harlan C. Cramer , Dale E. Dawson
发明人： Harlan C. Cramer , Dale E. Dawson
IPC分类号： H01L21/44
CPC分类号： H01L21/76898
摘要： A method is provided for forming a through substrate via in a compound semiconductor having a transistor on a front side of the substrate. The method comprises forming a protective stop pad over a contact area on the front side of the substrate, forming a contact pad overlying the protective stop pad, such that the contact pad is in contact with a terminal of the transistor and plasma etching a backside of the substrate to form a contact coupling via to the protective stop pad. The method further comprises performing a chemical wet etch to remove the protective stop pad and depositing a conductive contact layer in the contact coupling via to provide a conductive contact to the contact pad.
摘要翻译：提供一种用于在具有在基板的正面上的晶体管的化合物半导体中形成贯穿基板通孔的方法。该方法包括在衬底的正面上的接触区域上形成保护停止焊盘，形成覆盖保护停止焊盘的接触焊盘，使得接触焊盘与晶体管的端子接触，等离子体蚀刻位于基板，以形成接触耦合通孔到保护止动垫。该方法还包括执行化学湿法蚀刻以去除保护性止动垫并在接触耦合通孔中沉积导电接触层，以向接触垫提供导电接触。

8. 发明授权

US5194836A Thin film, microwave frequency manifolded filter bank 失效
标题翻译：薄膜，微波频率歧管滤波器组
公开(公告)号：US5194836A
公开(公告)日：1993-03-16
申请号：US750694
申请日：1991-08-20
申请人： Christopher R. Vale , Dale E. Dawson , David M. Krafcsik
发明人： Christopher R. Vale , Dale E. Dawson , David M. Krafcsik
IPC分类号： H03H9/54 , H03H9/58
CPC分类号： H03H9/588 , H03H9/542
摘要： A miniature thin film microwave frequency acoustic filter device comprising acoustic resonators formed on the same dielectric membrane so that their frequency responses are identical. Because the filters are miniature, they can be manifolded without manifolding circuitry that normally causes significant filter losses.
摘要翻译：微型薄膜微波频率声滤波器装置包括形成在同一电介质膜上的声谐振器，使得其频率响应相同。因为过滤器是微型的，所以它们可以是歧管的，没有通常导致显着的过滤器损失的歧管电路。

9. 发明授权

US08559906B2 System and method for providing a carbon nanotube mixer 有权
标题翻译：用于提供碳纳米管混合器的系统和方法
公开(公告)号：US08559906B2
公开(公告)日：2013-10-15
申请号：US13168684
申请日：2011-06-24
申请人： Dale E. Dawson , John X. Przybysz , Maaz Aziz
发明人： Dale E. Dawson , John X. Przybysz , Maaz Aziz
IPC分类号： H04B1/26 , H04B1/28 , G06G7/16
CPC分类号： H03D7/1491 , B82Y30/00 , H01L27/283 , H01L51/057 , H03D7/1458
摘要： An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.
摘要翻译：一种系统和方法的实施例提供了一种具有低本地振荡器功率需求并且没有互调产物的碳纳米管晶体管（CNT）混频器。具体地说，该系统和方法的一个实施例在同一集成电路上提供两种器件电流 - 电压（I-V）特性：指数和线性。 CNT I-V特性支持理想指数控制特性（由物理常数确定）和理想线性控制特性（也由物理常数确定），从而产生理想的乘数。换句话说，CNT混合器在数学上等于理想乘数。这种理想的乘法器可以用作具有低本地振荡器功率需求的混频器，并且实际上没有互调产物。

10. 发明申请

US20120326763A1 SYSTEM AND METHOD FOR PROVIDING A CARBON NANOTUBE MIXER 有权
标题翻译：用于提供碳纳米管混合器的系统和方法
公开(公告)号：US20120326763A1
公开(公告)日：2012-12-27
申请号：US13168684
申请日：2011-06-24
申请人： Dale E. Dawson , John X. Przybysz , Maaz Aziz
发明人： Dale E. Dawson , John X. Przybysz , Maaz Aziz
IPC分类号： G06G7/16
CPC分类号： H03D7/1491 , B82Y30/00 , H01L27/283 , H01L51/057 , H03D7/1458
摘要： An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.
摘要翻译：一种系统和方法的实施例提供了一种具有低本地振荡器功率需求并且没有互调产物的碳纳米管晶体管（CNT）混频器。具体地说，该系统和方法的一个实施例在同一集成电路上提供两种器件电流 - 电压（I-V）特性：指数和线性。 CNT I-V特性支持理想指数控制特性（由物理常数确定）和理想线性控制特性（也由物理常数确定），从而产生理想的乘数。换句话说，CNT混合器在数学上等于理想乘数。这种理想的乘法器可以用作具有低本地振荡器功率需求的混频器，并且实际上没有互调产物。

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