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1. 发明授权

US07396708B2 Etching method for metal layer of display panel 有权
标题翻译：显示面板金属层蚀刻方法
公开(公告)号：US07396708B2
公开(公告)日：2008-07-08
申请号：US11690137
申请日：2007-03-23
申请人： Shiun-Chang Jan , Yi Lu , Yi-Ming Shan , Yi-Chun Chen
发明人： Shiun-Chang Jan , Yi Lu , Yi-Ming Shan , Yi-Chun Chen
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L21/32139 , H01L21/32134 , H01L27/1244
摘要： An etching process of a metal layer of a display panel is provided. First, a substrate with at least one display panel region, a testing device region, and a non-device region is provided. Then, a metal layer is formed over the substrate to cover the display panel region, the testing device region, and the non-device region. Next, a mask is formed on the metal layer to expose a portion of the metal layer. The area of the metal layer exposed by the mask substantially occupies 70%˜88% of the total area of the metal layer. Thereafter, a wet etching process is performed to remove the metal layer exposed by the mask.
摘要翻译：提供了显示面板的金属层的蚀刻工艺。首先，提供具有至少一个显示面板区域的基板，测试装置区域和非装置区域。然后，在基板上形成金属层以覆盖显示面板区域，测试装置区域和非装置区域。接下来，在金属层上形成掩模以暴露金属层的一部分。由掩模露出的金属层的面积基本上占金属层总面积的70％〜88％。此后，进行湿蚀刻处理以去除由掩模暴露的金属层。

2. 发明申请

US20080121617A1 ETCHING METHOD FOR METAL LAYER OF DISPLAY PANEL 有权
标题翻译：显示面板金属层蚀刻方法
公开(公告)号：US20080121617A1
公开(公告)日：2008-05-29
申请号：US11690137
申请日：2007-03-23
申请人： Shiun-Chang Jan , Yi LU , Yi-Ming Shan , Yi-Chun Chen
发明人： Shiun-Chang Jan , Yi LU , Yi-Ming Shan , Yi-Chun Chen
IPC分类号： C23F1/00 , H01L21/302
CPC分类号： H01L21/32139 , H01L21/32134 , H01L27/1244
摘要： An etching process of a metal layer of a display panel is provided. First, a substrate with at least one display panel region, a testing device region, and a non-device region is provided. Then, a metal layer is formed over the substrate to cover the display panel region, the testing device region, and the non-device region. Next, a mask is formed on the metal layer to expose a portion of the metal layer. The area of the metal layer exposed by the mask substantially occupies 70%˜88% of the total area of the metal layer. Thereafter, a wet etching process is performed to remove the metal layer exposed by the mask.
摘要翻译：提供了显示面板的金属层的蚀刻工艺。首先，提供具有至少一个显示面板区域的基板，测试装置区域和非装置区域。然后，在基板上形成金属层以覆盖显示面板区域，测试装置区域和非装置区域。接下来，在金属层上形成掩模以暴露金属层的一部分。由掩模露出的金属层的面积基本上占金属层总面积的70％〜88％。此后，进行湿蚀刻处理以去除由掩模暴露的金属层。

3. 发明授权

US08349631B2 Method for fabricating thin film transistor array substrate 有权
标题翻译：薄膜晶体管阵列基板的制造方法
公开(公告)号：US08349631B2
公开(公告)日：2013-01-08
申请号：US13225568
申请日：2011-09-06
申请人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
发明人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
IPC分类号： H01L21/338 , H01L31/112
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.
摘要翻译：制造TFT阵列基板的方法包括以下步骤。在基板上形成栅极图案和第一焊盘图案。依次形成覆盖这两个图案的栅绝缘层和半导体层。形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

4. 发明授权

US07935583B2 Fabrication method of pixel structure 有权
标题翻译：像素结构的制作方法
公开(公告)号：US07935583B2
公开(公告)日：2011-05-03
申请号：US11951321
申请日：2007-12-05
申请人： Shiun-Chang Jan , Han-Tu Lin
发明人： Shiun-Chang Jan , Han-Tu Lin
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/1288 , H01L27/1214
摘要： A fabrication method of a pixel structure includes utilizing only a single photomask in two different lithographic processes for defining patterns of the source/drain and passivation layer respectively. Therefore, the total amount of photomasks of the fabrication process can be decreased.
摘要翻译：像素结构的制造方法包括仅在两个不同的光刻工艺中使用单个光掩模来分别限定源极/漏极和钝化层的图案。因此，可以减少制造工艺的光掩模的总量。

5. 发明申请

US20110318856A1 METHOD FOR FABRICATING THIN FILM TRANSISTOR ARRAY SUBSTRATE 有权
标题翻译：用于制造薄膜晶体管阵列基板的方法
公开(公告)号：US20110318856A1
公开(公告)日：2011-12-29
申请号：US13225568
申请日：2011-09-06
申请人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
发明人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
IPC分类号： H01L21/336
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.
摘要翻译：制造TFT阵列基板的方法包括以下步骤。在基板上形成栅极图案和第一焊盘图案。依次形成覆盖这两个图案的栅绝缘层和半导体层。形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

6. 发明授权

US07816159B2 Method for fabricating pixel structure 有权
标题翻译：制造像素结构的方法
公开(公告)号：US07816159B2
公开(公告)日：2010-10-19
申请号：US12105279
申请日：2008-04-18
申请人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
发明人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1255 , H01L27/1288
摘要： A method for fabricating a pixel structure includes following steps. First, a substrate is provided. Next, a first conductive layer is formed on the substrate. Next, a first shadow mask is disposed over the first conductive layer. Next, a laser is applied through the first shadow mask to irradiate the first conductive layer to form a gate. Next, a gate dielectric layer is formed on the substrate to cover the gate. After that, a channel layer, a source and a drain are simultaneously formed on the gate dielectric layer over the gate, wherein the gate, the channel layer, the source and the drain together form a thin film transistor. A patterned passivation layer is formed on the thin film transistor and the patterned passivation layer exposes a part of the drain. Furthermore, a pixel electrode electrically connecting to the drain is formed.
摘要翻译：一种用于制造像素结构的方法包括以下步骤。首先，提供基板。接下来，在基板上形成第一导电层。接下来，在第一导电层上设置第一荫罩。接下来，通过第一荫罩施加激光以照射第一导电层以形成栅极。接下来，在基板上形成栅电介质层以覆盖栅极。之后，沟道层，源极和漏极同时形成在栅极上的栅极电介质层上，其中栅极，沟道层，源极和漏极一起形成薄膜晶体管。图案化的钝化层形成在薄膜晶体管上，并且图案化的钝化层露出一部分漏极。此外，形成电连接到漏极的像素电极。

7. 发明申请

US20090108280A1 PIXEL STRUCTURE AND FABRICATION METHOD THEREOF 有权
标题翻译：像素结构和制造方法
公开(公告)号：US20090108280A1
公开(公告)日：2009-04-30
申请号：US11951321
申请日：2007-12-05
申请人： Shiun-Chang Jan , Han-Tu Lin
发明人： Shiun-Chang Jan , Han-Tu Lin
IPC分类号： H01L33/00 , H01L21/02
CPC分类号： H01L27/1288 , H01L27/1214
摘要： A fabrication method of a pixel structure includes utilizing only a single photomask in two different lithographic processes for defining patterns of the source/drain and passivation layer respectively. Therefore, the total amount of photomasks of the fabrication process can be decreased.
摘要翻译：像素结构的制造方法包括仅在两个不同的光刻工艺中使用单个光掩模来分别限定源极/漏极和钝化层的图案。因此，可以减少制造工艺的光掩模的总量。

8. 发明申请

US20090148972A1 METHOD FOR FABRICATING PIXEL STRUCTURE 有权
标题翻译：制造像素结构的方法
公开(公告)号：US20090148972A1
公开(公告)日：2009-06-11
申请号：US12105279
申请日：2008-04-18
申请人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
发明人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1255 , H01L27/1288
摘要： A method for fabricating a pixel structure includes following steps. First, a substrate is provided. Next, a first conductive layer is formed on the substrate. Next, a first shadow mask is disposed over the first conductive layer. Next, a laser is applied through the first shadow mask to irradiate the first conductive layer to form a gate. Next, a gate dielectric layer is formed on the substrate to cover the gate. After that, a channel layer, a source and a drain are simultaneously formed on the gate dielectric layer over the gate, wherein the gate, the channel layer, the source and the drain together form a thin film transistor. A patterned passivation layer is formed on the thin film transistor and the patterned passivation layer exposes a part of the drain. Furthermore, a pixel electrode electrically connecting to the drain is formed.
摘要翻译：一种用于制造像素结构的方法包括以下步骤。首先，提供基板。接下来，在基板上形成第一导电层。接下来，在第一导电层上设置第一荫罩。接下来，通过第一荫罩施加激光以照射第一导电层以形成栅极。接下来，在基板上形成栅电介质层以覆盖栅极。之后，沟道层，源极和漏极同时形成在栅极上的栅极电介质层上，其中栅极，沟道层，源极和漏极一起形成薄膜晶体管。图案化的钝化层形成在薄膜晶体管上，并且图案化的钝化层露出一部分漏极。此外，形成电连接到漏极的像素电极。

9. 发明申请

US20090101902A1 Display device and method of manufacturing the same 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20090101902A1
公开(公告)日：2009-04-23
申请号：US12076297
申请日：2008-03-17
申请人： Han-Tu Lin , Chien-Hung Chen , Shiun-Chang Jan
发明人： Han-Tu Lin , Chien-Hung Chen , Shiun-Chang Jan
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/124 , H01L27/1255
摘要： A substrate comprising a thin-film-transistor (TFT) region, a pixel region, a gate-line region and a data-line region is provided. A transparent conductive layer and a first metal layer are orderly formed on the substrate. A conductive stack layer is formed within each of the TFT/pixel/gate-line regions and the end of the data-line region. Next, a first insulating layer and a semiconductor layer are orderly formed, and a patterned first insulating layer and a patterned semiconductor layer are formed above the conductive stack layer within the TFT region. Then, a second metal layer and a first photoresist layer are respectively formed. Afterwards, the second and the first metal layers are patterned by using the first photoresist layer as a photomask. Finally, the first photoresist layer is reflowed by heat, and part of the reflowed first photoresist layer covers a channel formed within the TFT region.
摘要翻译：提供了包括薄膜晶体管（TFT）区域，像素区域，栅极线区域和数据线区域的衬底。在衬底上有序地形成透明导电层和第一金属层。在每个TFT /像素/栅极线区域和数据线区域的末端中形成导电堆叠层。接下来，有序地形成第一绝缘层和半导体层，并且在TFT区域内的导电堆叠层的上方形成图案化的第一绝缘层和图案化半导体层。然后，分别形成第二金属层和第一光致抗蚀剂层。之后，通过使用第一光致抗蚀剂层作为光掩模来对第二和第一金属层进行构图。最后，第一光致抗蚀剂层通过热回流，并且回流的第一光致抗蚀剂层的一部分覆盖形成在TFT区域内的沟道。

10. 发明申请

US20120115265A1 DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20120115265A1
公开(公告)日：2012-05-10
申请号：US13354618
申请日：2012-01-20
申请人： Han-Tu LIN , Chien-Hung Chen , Shiun-Chang Jan
发明人： Han-Tu LIN , Chien-Hung Chen , Shiun-Chang Jan
IPC分类号： H01L31/18
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/124 , H01L27/1255
摘要： A substrate comprising a thin-film-transistor (TFT) region, a pixel region, a gate-line region and a data-line region is provided. A transparent conductive layer and a first metal layer are orderly formed on the substrate. A conductive stack layer is formed within each of the TFT/pixel/gate-line regions and the end of the data-line region. Next, a first insulating layer and a semiconductor layer are orderly formed, and a patterned first insulating layer and a patterned semiconductor layer are formed above the conductive stack layer within the TFT region. Then, a second metal layer and a first photoresist layer are respectively formed. Afterwards, the second and the first metal layers are patterned by using the first photoresist layer as a photomask. Finally, the first photoresist layer is reflowed by heat, and part of the reflowed first photoresist layer covers a channel formed within the TFT region.
摘要翻译：提供了包括薄膜晶体管（TFT）区域，像素区域，栅极线区域和数据线区域的衬底。在衬底上有序地形成透明导电层和第一金属层。在每个TFT /像素/栅极线区域和数据线区域的末端中形成导电堆叠层。接下来，有序地形成第一绝缘层和半导体层，并且在TFT区域内的导电堆叠层的上方形成图案化的第一绝缘层和图案化半导体层。然后，分别形成第二金属层和第一光致抗蚀剂层。之后，通过使用第一光致抗蚀剂层作为光掩模来对第二和第一金属层进行构图。最后，第一光致抗蚀剂层通过热回流，并且回流的第一光致抗蚀剂层的一部分覆盖形成在TFT区域内的沟道。

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