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1. 发明授权

US07816159B2 Method for fabricating pixel structure 有权
标题翻译：制造像素结构的方法
公开(公告)号：US07816159B2
公开(公告)日：2010-10-19
申请号：US12105279
申请日：2008-04-18
申请人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
发明人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1255 , H01L27/1288
摘要： A method for fabricating a pixel structure includes following steps. First, a substrate is provided. Next, a first conductive layer is formed on the substrate. Next, a first shadow mask is disposed over the first conductive layer. Next, a laser is applied through the first shadow mask to irradiate the first conductive layer to form a gate. Next, a gate dielectric layer is formed on the substrate to cover the gate. After that, a channel layer, a source and a drain are simultaneously formed on the gate dielectric layer over the gate, wherein the gate, the channel layer, the source and the drain together form a thin film transistor. A patterned passivation layer is formed on the thin film transistor and the patterned passivation layer exposes a part of the drain. Furthermore, a pixel electrode electrically connecting to the drain is formed.
摘要翻译：一种用于制造像素结构的方法包括以下步骤。首先，提供基板。接下来，在基板上形成第一导电层。接下来，在第一导电层上设置第一荫罩。接下来，通过第一荫罩施加激光以照射第一导电层以形成栅极。接下来，在基板上形成栅电介质层以覆盖栅极。之后，沟道层，源极和漏极同时形成在栅极上的栅极电介质层上，其中栅极，沟道层，源极和漏极一起形成薄膜晶体管。图案化的钝化层形成在薄膜晶体管上，并且图案化的钝化层露出一部分漏极。此外，形成电连接到漏极的像素电极。

2. 发明申请

US20090148972A1 METHOD FOR FABRICATING PIXEL STRUCTURE 有权
标题翻译：制造像素结构的方法
公开(公告)号：US20090148972A1
公开(公告)日：2009-06-11
申请号：US12105279
申请日：2008-04-18
申请人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
发明人： Kuo-Lung Fang , Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Shiun-Chang Jan , Chia-Chi Tsai
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1255 , H01L27/1288
摘要： A method for fabricating a pixel structure includes following steps. First, a substrate is provided. Next, a first conductive layer is formed on the substrate. Next, a first shadow mask is disposed over the first conductive layer. Next, a laser is applied through the first shadow mask to irradiate the first conductive layer to form a gate. Next, a gate dielectric layer is formed on the substrate to cover the gate. After that, a channel layer, a source and a drain are simultaneously formed on the gate dielectric layer over the gate, wherein the gate, the channel layer, the source and the drain together form a thin film transistor. A patterned passivation layer is formed on the thin film transistor and the patterned passivation layer exposes a part of the drain. Furthermore, a pixel electrode electrically connecting to the drain is formed.
摘要翻译：一种用于制造像素结构的方法包括以下步骤。首先，提供基板。接下来，在基板上形成第一导电层。接下来，在第一导电层上设置第一荫罩。接下来，通过第一荫罩施加激光以照射第一导电层以形成栅极。接下来，在基板上形成栅电介质层以覆盖栅极。之后，沟道层，源极和漏极同时形成在栅极上的栅极电介质层上，其中栅极，沟道层，源极和漏极一起形成薄膜晶体管。图案化的钝化层形成在薄膜晶体管上，并且图案化的钝化层露出一部分漏极。此外，形成电连接到漏极的像素电极。

3. 发明申请

US20100055853A1 METHOD FOR MANUFACTURING PIXEL STRUCTURE 有权
标题翻译：制造像素结构的方法
公开(公告)号：US20100055853A1
公开(公告)日：2010-03-04
申请号：US12617712
申请日：2009-11-12
申请人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
发明人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
IPC分类号： H01L21/336
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for manufacturing a pixel structure is provided. A gate and a gate insulating layer are sequentially formed on a substrate. A semiconductor layer and a second metal layer are sequentially formed on the gate insulating layer. The semiconductor layer and the second metal layer are patterned to form a channel layer, a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and drain are disposed on a portion of the channel layer. The gate, channel, source and drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.
摘要翻译：提供了一种用于制造像素结构的方法。栅极和栅极绝缘层依次形成在基板上。半导体层和第二金属层依次形成在栅极绝缘层上。通过使用形成在其上的图案化光致抗蚀剂层，将半导体层和第二金属层图案化以形成沟道层，源极和漏极，其中源极和漏极设置在沟道层的一部分上。栅极，沟道，源极和漏极形成薄膜晶体管。在图案化的光致抗蚀剂层，栅极绝缘层和薄膜晶体管上形成钝化层。然后，去除图案化的光致抗蚀剂层，使得其上的钝化层被同时去除以形成图案化的钝化层，并且漏极被暴露。在图案化的钝化层和漏极上形成像素电极。

4. 发明申请

US20090325331A1 METHOD FOR MANUFACTURING PIXEL STRUCTURE 有权
标题翻译：制造像素结构的方法
公开(公告)号：US20090325331A1
公开(公告)日：2009-12-31
申请号：US12233607
申请日：2008-09-19
申请人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
发明人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
IPC分类号： H01L21/00 , H01L21/84 , H01L21/44
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for manufacturing a pixel structure is provided. First, a gate and a gate insulating layer are sequentially formed on the substrate. A channel layer and a second metal layer are sequentially formed on the gate insulating layer. The second metal layer is patterned to form a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and the drain are disposed on a portion of the channel layer. The gate, the channel, the source and the drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.
摘要翻译：提供了一种用于制造像素结构的方法。首先，在基板上依次形成栅极和栅极绝缘层。沟道层和第二金属层依次形成在栅极绝缘层上。图案化第二金属层以通过使用其上形成的图案化光致抗蚀剂层来形成源极和漏极，其中源极和漏极设置在沟道层的一部分上。栅极，沟道，源极和漏极形成薄膜晶体管。在图案化的光致抗蚀剂层，栅极绝缘层和薄膜晶体管上形成钝化层。然后，去除图案化的光致抗蚀剂层，使得其上的钝化层被同时去除以形成图案化的钝化层，并且漏极被暴露。在图案化的钝化层和漏极上形成像素电极。

5. 发明授权

US07648865B1 Method for manufacturing pixel structure 有权
标题翻译：像素结构制造方法
公开(公告)号：US07648865B1
公开(公告)日：2010-01-19
申请号：US12233607
申请日：2008-09-19
申请人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
发明人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for manufacturing a pixel structure is provided. First, a gate and a gate insulating layer are sequentially formed on the substrate. A channel layer and a second metal layer are sequentially formed on the gate insulating layer. The second metal layer is patterned to form a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and the drain are disposed on a portion of the channel layer. The gate, the channel, the source and the drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.
摘要翻译：提供了一种用于制造像素结构的方法。首先，在基板上依次形成栅极和栅极绝缘层。沟道层和第二金属层依次形成在栅极绝缘层上。图案化第二金属层以通过使用其上形成的图案化光致抗蚀剂层来形成源极和漏极，其中源极和漏极设置在沟道层的一部分上。栅极，沟道，源极和漏极形成薄膜晶体管。在图案化的光致抗蚀剂层，栅极绝缘层和薄膜晶体管上形成钝化层。然后，去除图案化的光致抗蚀剂层，使得其上的钝化层被同时去除以形成图案化的钝化层，并且漏极被暴露。在图案化的钝化层和漏极上形成像素电极。

6. 发明申请

US20080213951A1 Method of fabricating pixel structure 审中-公开
标题翻译：制作像素结构的方法
公开(公告)号：US20080213951A1
公开(公告)日：2008-09-04
申请号：US11953878
申请日：2007-12-11
申请人： Chih-Hung Shih , Ming-Yuan Huang , Chih-Chun Yang , Han-Tu Lin , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
发明人： Chih-Hung Shih , Ming-Yuan Huang , Chih-Chun Yang , Han-Tu Lin , Ta-Wen Liao , Kuo-Lung Fang , Chia-Chi Tsai
IPC分类号： H01L21/84
CPC分类号： H01L27/1288 , G02F1/13439 , H01L27/1214
摘要： A method of fabricating a pixel structure including the following procedures is provided. First, a substrate having an active device thereon is provided. A patterned passivation layer is formed on the substrate and the active device, and the patterned passivation layer exposes a portion of the active device. Then, a conductive layer is formed over the patterned passivation layer, and the conductive layer is electrically connected to the active device. A mask exposing a portion of the conductive layer is provided above the conductive layer. A laser is used to irradiate the conductive layer via the mask to remove the portion of the conductive layer exposed by the mask. As a result, the remained portion of the conductive layer constitutes a pixel electrode, and the pixel electrode is electrically connected to the active device. The method simplifies the fabrication process of a pixel structure, and thus reduces the fabrication cost.
摘要翻译：提供了一种制造包括以下步骤的像素结构的方法。首先，提供其上具有有源器件的衬底。图案化的钝化层形成在衬底和有源器件上，并且图案化的钝化层露出有源器件的一部分。然后，在图案化的钝化层上形成导电层，并且导电层电连接到有源器件。暴露导电层的一部分的掩模设置在导电层的上方。激光用于通过掩模照射导电层以去除由掩模暴露的导电层的部分。结果，导电层的残留部分构成像素电极，像素电极与有源器件电连接。该方法简化了像素结构的制造工艺，从而降低了制造成本。

7. 发明授权

US07811867B2 Method for manufacturing pixel structure 有权
标题翻译：像素结构制造方法
公开(公告)号：US07811867B2
公开(公告)日：2010-10-12
申请号：US12617712
申请日：2009-11-12
申请人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang
发明人： Chih-Chun Yang , Ming-Yuan Huang , Han-Tu Lin , Chih-Hung Shih , Ta-Wen Liao , Kuo-Lung Fang
IPC分类号： H01L21/00
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for manufacturing a pixel structure is provided. A gate and a gate insulating layer are sequentially formed on a substrate. A semiconductor layer and a second metal layer are sequentially formed on the gate insulating layer. The semiconductor layer and the second metal layer are patterned to form a channel layer, a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and drain are disposed on a portion of the channel layer. The gate, channel, source and drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.
摘要翻译：提供了一种用于制造像素结构的方法。栅极和栅极绝缘层依次形成在基板上。半导体层和第二金属层依次形成在栅极绝缘层上。通过使用形成在其上的图案化光致抗蚀剂层，将半导体层和第二金属层图案化以形成沟道层，源极和漏极，其中源极和漏极设置在沟道层的一部分上。栅极，沟道，源极和漏极形成薄膜晶体管。在图案化的光致抗蚀剂层，栅极绝缘层和薄膜晶体管上形成钝化层。然后，去除图案化的光致抗蚀剂层，使得其上的钝化层被同时去除以形成图案化的钝化层，并且漏极被暴露。在图案化的钝化层和漏极上形成像素电极。

8. 发明授权

US08349631B2 Method for fabricating thin film transistor array substrate 有权
标题翻译：薄膜晶体管阵列基板的制造方法
公开(公告)号：US08349631B2
公开(公告)日：2013-01-08
申请号：US13225568
申请日：2011-09-06
申请人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
发明人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
IPC分类号： H01L21/338 , H01L31/112
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.
摘要翻译：制造TFT阵列基板的方法包括以下步骤。在基板上形成栅极图案和第一焊盘图案。依次形成覆盖这两个图案的栅绝缘层和半导体层。形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

9. 发明申请

US20110318856A1 METHOD FOR FABRICATING THIN FILM TRANSISTOR ARRAY SUBSTRATE 有权
标题翻译：用于制造薄膜晶体管阵列基板的方法
公开(公告)号：US20110318856A1
公开(公告)日：2011-12-29
申请号：US13225568
申请日：2011-09-06
申请人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
发明人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
IPC分类号： H01L21/336
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.
摘要翻译：制造TFT阵列基板的方法包括以下步骤。在基板上形成栅极图案和第一焊盘图案。依次形成覆盖这两个图案的栅绝缘层和半导体层。形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

10. 发明授权

US08058087B2 Method for fabricating thin film transistor array substrate 有权
标题翻译：薄膜晶体管阵列基板的制造方法
公开(公告)号：US08058087B2
公开(公告)日：2011-11-15
申请号：US12356090
申请日：2009-01-20
申请人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
发明人： Shine-Kai Tseng , Han-Tu Lin , Shiun-Chang Jan , Kuo-Lung Fang
IPC分类号： H01L21/338 , H01L31/112
CPC分类号： H01L27/1248 , H01L27/1288
摘要： A method for fabricating a TFT array substrate includes following steps. A gate pattern and a first pad pattern are formed on a substrate. A gate insulation layer and a semiconductor layer covering the two patterns are sequentially formed. A patterned photoresist layer having different resist blocks is formed, and patterns and thicknesses of the resist blocks in different regions are adjusted. The semiconductor layer and the gate insulation layer above the first pad pattern are removed through performing an etching process and reducing a thickness of the patterned photoresist layer. After removing the patterned photoresist layer, a source pattern, a drain pattern, and a second pad pattern electrically connected to the first pad pattern are formed. A patterned passivation layer is formed on the gate insulation layer and has a second opening exposing the source pattern or the drain pattern and a third opening exposing the second pad pattern.
摘要翻译：制造TFT阵列基板的方法包括以下步骤。在基板上形成栅极图案和第一焊盘图案。依次形成覆盖这两个图案的栅绝缘层和半导体层。形成具有不同抗蚀剂块的图案化光致抗蚀剂层，并且调整不同区域中的抗蚀剂块的图案和厚度。通过执行蚀刻工艺并减小图案化光致抗蚀剂层的厚度来去除第一焊盘图案上方的半导体层和栅极绝缘层。在去除图案化的光致抗蚀剂层之后，形成电连接到第一焊盘图案的源图案，漏极图案和第二焊盘图案。图案化的钝化层形成在栅极绝缘层上，并且具有暴露源图案或漏极图案的第二开口和暴露第二焊盘图案的第三开口。

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