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1. 发明授权

US6039811A Apparatus for fabricating polysilicon film for semiconductor device 失效
标题翻译：用于制造用于半导体器件的多晶硅膜的装置
公开(公告)号：US6039811A
公开(公告)日：2000-03-21
申请号：US871452
申请日：1997-06-09
申请人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
发明人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
IPC分类号： H01L21/28 , C23C16/24 , C23C16/44 , C23C16/54 , H01L21/205 , H01L21/677 , C23C16/00
CPC分类号： C23C16/54 , C23C16/24 , C23C16/4401
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas from being exuded in a reaction chamber, thereby minimizing the generation of contaminating particles. The apparatus includes a reaction chamber having four cooling jackets respectively mounted on a first side wall adjacent to a wafer transfer chamber, a second side wall opposite to the first side wall, an upper wall and a bottom wall. A gate valve is disposed between the reaction chamber and the wafer transfer chamber and has a fifth cooling jacket. While fabricating a polysilicon film using the above apparatus, a pressure of a cassette chamber is controlled to be less than about 0.05 mtorr. Alternatively, a pressure of a cooling chamber and the wafer transfer are both controlled to be less than about 1.0 .mu.torr.
摘要翻译：一种用于制造具有用于防止气体渗透到反应室中的冷却夹套的半导体器件的装置，从而使污染颗粒的产生最小化。该装置包括具有分别安装在与晶片传送室相邻的第一侧壁上的四个冷却夹套的反应室，与第一侧壁相对的第二侧壁，上壁和底壁。闸阀设置在反应室和晶片传送室之间，并具有第五冷却套。在使用上述装置制造多晶硅膜的同时，将盒室的压力控制在小于约0.05毫托。或者，冷却室和晶片转移的压力都被控制为小于约1.0乇。

2. 发明授权

US5960281A Methods of fabricating microelectronic electrode structures using hemispherical grained (HSG) silicon 失效
标题翻译：使用半球晶粒（HSG）硅制造微电子电极结构的方法
公开(公告)号：US5960281A
公开(公告)日：1999-09-28
申请号：US861607
申请日：1997-05-22
申请人： Seung-hee Nam , Young-sun Kim , Young-wook Park
发明人： Seung-hee Nam , Young-sun Kim , Young-wook Park
IPC分类号： H01L29/41 , H01L21/02 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/1085 , H01L28/84 , Y10S438/964
摘要： An electrode structure is fabricated on a microelectronic substrate by forming an amorphous silicon electrode on the microelectronic substrate and cleaning the surface of the amorphous silicon electrode to remove contaminants and surface oxides therefrom. A thin amorphous silicon layer is formed on the clean surface of the amorphous silicon electrode. Silicon crystal nuclei are then formed and grown on the thin amorphous silicon layer. The electrode structure may be used as a bottom electrode for an integrated circuit capacitor, such as the storage capacitor for an integrated circuit DRAM.
摘要翻译：通过在微电子衬底上形成非晶硅电极并清洁非晶硅电极的表面以除去其中的污染物和表面氧化物，在微电子衬底上制造电极结构。在非晶硅电极的清洁表面上形成薄的非晶硅层。然后在薄的非晶硅层上形成并生长硅晶核。电极结构可以用作集成电路电容器的底部电极，例如用于集成电路DRAM的存储电容器。

3. 发明授权

US06221742B1 Method for fabricating polysilicon film for semiconductor device 失效
标题翻译：制造半导体器件用多晶硅膜的方法
公开(公告)号：US06221742B1
公开(公告)日：2001-04-24
申请号：US09146260
申请日：1998-09-03
申请人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
发明人： Young-wook Park , Cha-young Yoo , Young-sun Kim , Seung-hee Nam
IPC分类号： H01L2120
CPC分类号： C23C16/54 , C23C16/24 , C23C16/4401
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas from being exuded in a reaction chamber, thereby minimizing the generation of contaminating particles. The apparatus includes a reaction chamber having four cooling jackets respectively mounted on a first side wall adjacent to a wafer transfer chamber, a second side wall opposite to the first side wall, an upper wall and a bottom wall. A gate valve is disposed between the reaction chamber and the wafer transfer chamber and has a fifth cooling jacket. While fabricating a polysilicon film using the above apparatus, a pressure of a cassette chamber is controlled to be less than about 0.05 mtorr. Alternatively, a pressure of a cooling chamber and the wafer transfer are both controlled to be less than about 1.0 &mgr;torr.
摘要翻译：一种用于制造具有用于防止气体渗透到反应室中的冷却夹套的半导体器件的装置，从而使污染颗粒的产生最小化。该装置包括具有分别安装在与晶片传送室相邻的第一侧壁上的四个冷却夹套的反应室，与第一侧壁相对的第二侧壁，上壁和底壁。闸阀设置在反应室和晶片传送室之间，并具有第五冷却套。在使用上述装置制造多晶硅膜的同时，将盒室的压力控制在小于约0.05毫托。或者，冷却室和晶片转移的压力都被控制为小于约1.0倍。

4. 发明授权

US5943570A Methods of forming capacitor electrodes containing HSG semiconductor layers therein 失效
标题翻译：形成其中包含HSG半导体层的电容器电极的方法
公开(公告)号：US5943570A
公开(公告)日：1999-08-24
申请号：US780636
申请日：1997-01-08
申请人： Young-wook Park , Young-sun Kim , Seung-hee Nam , Se-jin Shim , Cha-young Yoo , Kwan-young Oh
发明人： Young-wook Park , Young-sun Kim , Seung-hee Nam , Se-jin Shim , Cha-young Yoo , Kwan-young Oh
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L27/10852 , H01L28/82
摘要： A capacitor for a semiconductor memory device and a method for manufacturing the same are provided. A lower electrode of a capacitor according to the present invention has a structure in which a first conductive layer and a second conductive layer are sequentially deposited and an HSG is selectively formed on the surface thereof. The first conductive layer is composed of an amorphous or a polycrystalline silicon film having a low concentration of impurities. The second conductive layer is composed of an amorphous silicon film having a high concentration of impurities. According to the present invention, it is possible to obtain a desirable Cmin/Cmax ratio in the lower electrode of the capacitor having an HSG silicon layer and to prevent diffusion of impurities from the lower electrode of the capacitor.
摘要翻译：提供了一种用于半导体存储器件的电容器及其制造方法。根据本发明的电容器的下电极具有顺序地沉积第一导电层和第二导电层并且在其表面上选择性地形成HSG的结构。第一导电层由具有低浓度杂质的无定形或多晶硅膜构成。第二导电层由具有高浓度杂质的非晶硅膜构成。根据本发明，可以在具有HSG硅层的电容器的下电极中获得所需的Cmin / Cmax比，并且防止杂质从电容器的下电极扩散。

5. 发明授权

US5970312A Method for evaluating HSG silicon film of semiconductor device by atomic force microscopy 失效
标题翻译：用原子力显微镜评估半导体器件的HSG硅膜的方法
公开(公告)号：US5970312A
公开(公告)日：1999-10-19
申请号：US12119
申请日：1998-01-22
申请人： Seung-hee Nam , Young-sun Kim
发明人： Seung-hee Nam , Young-sun Kim
IPC分类号： G01R31/265 , H01L21/66
CPC分类号： G01R31/265 , B82Y15/00 , H01L22/12
摘要： An evaluating method of an HSG silicon film using atomic force microscopy (AFM). The characteristics of the HSG silicon film are measured and expressed with quantitative values using AFM. The above values are compared to values written in the working specification, to thereby evaluate the HSG silicon film and control the conditions of forming the HSG silicon film. Also, the capacitor where the HSG silicon film is interposed is formed, and then the capacitance of the capacitor is measured to determine the HSG height of the HSG silicon film for ensuring desired capacitance and conditions of forming the HSG silicon film. Accordingly, the characteristics of the HSG silicon film may be analyzed without damaging the semiconductor substrate and a preferred working specification for forming the HSG silicon film may be realized, to thereby increase the reproducibility of the HSG silicon film. Also, when the conditions of forming the HSG silicon film are determined, it is checked whether the apparatus for forming the HSG silicon film operates normally.
摘要翻译：使用原子力显微镜（AFM）的HSG硅膜的评估方法。使用AFM测量HSG硅膜的特性并用定量值表达。将上述值与工作规范中写入的值进行比较，从而评估HSG硅膜并控制形成HSG硅膜的条件。此外，形成插入HSG硅膜的电容器，然后测量电容器的电容，以确定HSG硅膜的HSG高度，以确保所需的电容和形成HSG硅膜的条件。因此，可以分析HSG硅膜的特性而不损坏半导体衬底，并且可以实现用于形成HSG硅膜的优选工作规范，从而提高HSG硅膜的再现性。此外，当确定形成HSG硅膜的条件时，检查用于形成HSG硅膜的装置是否正常工作。

6. 发明授权

US6087226A Methods of forming capacitors including electrodes with hemispherical grained silicon layers on sidewalls thereof and related structures 失效
标题翻译：形成电容器的方法，其包括在其侧壁上具有半球形硅层的电极和相关结构
公开(公告)号：US6087226A
公开(公告)日：2000-07-11
申请号：US48501
申请日：1998-03-26
申请人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
发明人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8234
CPC分类号： H01L28/82 , H01L27/10852 , H01L28/84 , H01L28/90
摘要： A method of forming an integrated circuit device includes forming a conductive layer on an integrated circuit substrate, and forming a buffer layer on the conductive layer opposite the integrated circuit substrate. The buffer layer and the conductive layer are patterned to provide a mesa structure including the patterned buffer and conductive layers. A conductive spacer is formed along a sidewall of the mesa structure, and a hemispherical grained silicon layer is formed on the conductive spacer opposite the sidewall of the mesa structure. The patterned buffer layer is then removed after the step of forming the hemispherical grained silicon layer. Related structures are also discussed.
摘要翻译：形成集成电路器件的方法包括在集成电路衬底上形成导电层，并在与集成电路衬底相对的导电层上形成缓冲层。将缓冲层和导电层图案化以提供包括图案化缓冲层和导电层的台面结构。沿着台面结构的侧壁形成导电间隔物，并且在与台面结构的侧壁相对的导电间隔物上形成半球状的硅层。然后在形成半球形颗粒硅层的步骤之后去除图案化的缓冲层。还讨论了相关结构。

7. 发明授权

US06194263B1 Methods for forming capacitor structures including etching pits 失效
标题翻译：用于形成包括蚀刻坑的电容器结构的方法
公开(公告)号：US06194263B1
公开(公告)日：2001-02-27
申请号：US08729232
申请日：1996-10-09
申请人： Young-sun Kim , Young-wook Park
发明人： Young-sun Kim , Young-wook Park
IPC分类号： H01L218242
CPC分类号： H01L28/84 , H01L27/10852 , H01L28/90
摘要： A method for forming an electrode structure includes the steps of forming a conductive electrode on the microelectronic substrate, forming HSG-silicon seeds on the surface of the conductive electrode, and etching the conductive electrode using the HSG-silicon seeds as a mask so that pits are formed between the HSG-silicon seeds. In addition, the HSG-silicon seeds on the conductive electrode can be grown to form enlarged HSG-silicon bumps on the conductive electrode further increasing the surface area thereof. Related structures are also discussed.
摘要翻译：一种形成电极结构的方法包括以下步骤：在微电子衬底上形成导电电极，在导电电极的表面上形成HSG-硅晶种，并使用HSG-硅晶种作为掩模蚀刻导电电极，使得凹坑形成在HSG-硅种子之间。此外，导电电极上的HSG-硅晶种可以生长以在导电电极上形成扩大的HSG-硅凸块，进一步增加其表面积。还讨论了相关结构。

8. 发明授权

US6004858A Methods of forming hemispherical grained silicon (HSG-Si) capacitor structures including protective layers 失效
标题翻译：形成包括保护层的半球形硅（HSG-Si）电容器结构的方法
公开(公告)号：US6004858A
公开(公告)日：1999-12-21
申请号：US988858
申请日：1997-12-11
申请人： Se-jin Shim , Young-sun Kim , Cha-young Yoo , Young-wook Park
发明人： Se-jin Shim , Young-sun Kim , Cha-young Yoo , Young-wook Park
IPC分类号： H01L21/02 , H01L21/20
CPC分类号： H01L28/84
摘要： A method of forming a capacitor structure includes the steps of forming a conductive layer on a microelectronic substrate, and forming a first hemispherical grained silicon layer on the conductive layer opposite the substrate. A protective layer is formed on the hemispherical grained silicon layer. The protective layer, the first hemispherical grained silicon layer, and the conductive layer are then patterned so that portions of the microelectronic substrate are exposed adjacent the patterned conductive layer. A second hemispherical grained silicon layer is formed on the surface of the protective layer opposite the first hemispherical grained silicon layer, on sidewalls of the patterned conductive layer, and on the exposed portions of the microelectronic substrate. Portions of the second hemispherical grained silicon layer are removed from the exposed portions of the microelectronic substrate, and the patterned protective layer is then removed.
摘要翻译：一种形成电容器结构的方法包括以下步骤：在微电子衬底上形成导电层，并在与衬底相对的导电层上形成第一半球晶粒硅层。在半球状粒状硅层上形成保护层。然后对保护层，第一半球形晶粒硅层和导电层进行构图，使得微电子衬底的部分暴露在图案化导电层附近。在保护层的与第一半球状粒状硅层相对的表面上，在图案化的导电层的侧壁上，以及微电子衬底的露出部分上形成第二半球状粒状硅层。从微电子衬底的暴露部分去除第二半球形硅层的一部分，然后去除图案化的保护层。

9. 发明授权

US6117692A Calibrated methods of forming hemispherical grained silicon layers 失效
标题翻译：形成半球形硅层的校准方法
公开(公告)号：US6117692A
公开(公告)日：2000-09-12
申请号：US7879
申请日：1998-01-14
申请人： Young-sun Kim , Young-wook Park
发明人： Young-sun Kim , Young-wook Park
IPC分类号： H01L21/02 , G01R31/26
CPC分类号： H01L28/84
摘要： A method of forming a silicon layer includes the step of calibrating the heater temperature so that a predetermined temperature is maintained when a microelectronic substrate is subsequently heated despite a number of processing runs previously performed. This calibrating step includes loading a test substrate into the reaction chamber, subjecting the test substrate to the predetermined reaction recipe wherein the test substrate is heated according to the predetermined recipe, measuring the temperature of the substrate, and removing the test substrate from the reaction chamber. The heater temperature is then adjusted according to the measured temperature of the test substrate. A microelectronic substrate is then loaded into the reaction chamber, and a hemispherical grained silicon seed layer is formed on the microelectronic substrate according to the predetermined recipe. The hemispherical grained silicon seed layer is annealed to form a hemispherical grained silicon layer according to the predetermined recipe.
摘要翻译：形成硅层的方法包括校准加热器温度的步骤，使得当微电子基板随后被加热而保持预定温度，而不管先前执行了多个处理运行。该校准步骤包括将测试基板装载到反应室中，使测试基板经受预定的反应配方，其中根据预定配方加热测试基板，测量基板的温度，并将测试基板从反应室。然后根据测试基板的测量温度调节加热器温度。然后将微电子衬底加载到反应室中，并根据预定的配方在微电子衬底上形成半球状晶粒硅籽晶层。根据预定的配方，将半球形晶粒硅层退火以形成半球形的硅层。

10. 发明授权

US07217669B2 Method of forming a metal oxide film 失效
标题翻译：形成金属氧化物膜的方法
公开(公告)号：US07217669B2
公开(公告)日：2007-05-15
申请号：US10888838
申请日：2004-07-12
申请人： Han-mei Choi , Sung-tae Kim , Young-wook Park , Young-sun Kim , Ki-chul Kim , In-sung Park
发明人： Han-mei Choi , Sung-tae Kim , Young-wook Park , Young-sun Kim , Ki-chul Kim , In-sung Park
IPC分类号： H01L21/31
CPC分类号： H01L21/02356 , C23C16/405 , C23C16/452 , C23C16/56 , H01L21/02183 , H01L21/02271 , H01L21/02337 , H01L21/0234 , H01L21/02348 , H01L21/31604
摘要： A method of forming a dielectric film composed of metal oxide under an atmosphere of activated vapor containing oxygen. In the method of forming the dielectric film, a metal oxide film is formed on a semiconductor substrate using a metal organic precursor and O2 gas while the semiconductor substrate is exposed under activated vapor atmosphere containing oxygen, and then, the metal oxide film is annealed while the semiconductor substrate is exposed under activated vapor containing oxygen. The annealing may take place in situ with the formation of the metal oxide film, at the same or substantially the same temperature as the metal oxide forming, and/or at least one of a different pressure, oxygen concentration, or oxygen flow rate as the metal oxide forming.
摘要翻译：在含氧活性蒸气气氛下形成由金属氧化物构成的电介质膜的方法。在形成电介质膜的方法中，使用金属有机前体和O 2 O 2气体在半导体衬底上形成金属氧化物膜，同时半导体衬底在含有氧的活性气氛下暴露，然后在半导体衬底在含有氧气的活性蒸气下暴露的同时对金属氧化物膜进行退火。退火可以在与形成金属氧化物相同或基本上相同的温度下形成金属氧化物膜，和/或至少一种不同的压力，氧浓度或氧气流速的情况下进行，如金属氧化物形成。

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