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1. 发明授权

US6004858A Methods of forming hemispherical grained silicon (HSG-Si) capacitor structures including protective layers 失效
标题翻译：形成包括保护层的半球形硅（HSG-Si）电容器结构的方法
公开(公告)号：US6004858A
公开(公告)日：1999-12-21
申请号：US988858
申请日：1997-12-11
申请人： Se-jin Shim , Young-sun Kim , Cha-young Yoo , Young-wook Park
发明人： Se-jin Shim , Young-sun Kim , Cha-young Yoo , Young-wook Park
IPC分类号： H01L21/02 , H01L21/20
CPC分类号： H01L28/84
摘要： A method of forming a capacitor structure includes the steps of forming a conductive layer on a microelectronic substrate, and forming a first hemispherical grained silicon layer on the conductive layer opposite the substrate. A protective layer is formed on the hemispherical grained silicon layer. The protective layer, the first hemispherical grained silicon layer, and the conductive layer are then patterned so that portions of the microelectronic substrate are exposed adjacent the patterned conductive layer. A second hemispherical grained silicon layer is formed on the surface of the protective layer opposite the first hemispherical grained silicon layer, on sidewalls of the patterned conductive layer, and on the exposed portions of the microelectronic substrate. Portions of the second hemispherical grained silicon layer are removed from the exposed portions of the microelectronic substrate, and the patterned protective layer is then removed.
摘要翻译：一种形成电容器结构的方法包括以下步骤：在微电子衬底上形成导电层，并在与衬底相对的导电层上形成第一半球晶粒硅层。在半球状粒状硅层上形成保护层。然后对保护层，第一半球形晶粒硅层和导电层进行构图，使得微电子衬底的部分暴露在图案化导电层附近。在保护层的与第一半球状粒状硅层相对的表面上，在图案化的导电层的侧壁上，以及微电子衬底的露出部分上形成第二半球状粒状硅层。从微电子衬底的暴露部分去除第二半球形硅层的一部分，然后去除图案化的保护层。

2. 发明授权

US6087226A Methods of forming capacitors including electrodes with hemispherical grained silicon layers on sidewalls thereof and related structures 失效
标题翻译：形成电容器的方法，其包括在其侧壁上具有半球形硅层的电极和相关结构
公开(公告)号：US6087226A
公开(公告)日：2000-07-11
申请号：US48501
申请日：1998-03-26
申请人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
发明人： Young-sun Kim , Se-jin Shim , Cha-young Yoo , Young-wook Park
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8234
CPC分类号： H01L28/82 , H01L27/10852 , H01L28/84 , H01L28/90
摘要： A method of forming an integrated circuit device includes forming a conductive layer on an integrated circuit substrate, and forming a buffer layer on the conductive layer opposite the integrated circuit substrate. The buffer layer and the conductive layer are patterned to provide a mesa structure including the patterned buffer and conductive layers. A conductive spacer is formed along a sidewall of the mesa structure, and a hemispherical grained silicon layer is formed on the conductive spacer opposite the sidewall of the mesa structure. The patterned buffer layer is then removed after the step of forming the hemispherical grained silicon layer. Related structures are also discussed.
摘要翻译：形成集成电路器件的方法包括在集成电路衬底上形成导电层，并在与集成电路衬底相对的导电层上形成缓冲层。将缓冲层和导电层图案化以提供包括图案化缓冲层和导电层的台面结构。沿着台面结构的侧壁形成导电间隔物，并且在与台面结构的侧壁相对的导电间隔物上形成半球状的硅层。然后在形成半球形颗粒硅层的步骤之后去除图案化的缓冲层。还讨论了相关结构。

3. 发明授权

US5943570A Methods of forming capacitor electrodes containing HSG semiconductor layers therein 失效
标题翻译：形成其中包含HSG半导体层的电容器电极的方法
公开(公告)号：US5943570A
公开(公告)日：1999-08-24
申请号：US780636
申请日：1997-01-08
申请人： Young-wook Park , Young-sun Kim , Seung-hee Nam , Se-jin Shim , Cha-young Yoo , Kwan-young Oh
发明人： Young-wook Park , Young-sun Kim , Seung-hee Nam , Se-jin Shim , Cha-young Yoo , Kwan-young Oh
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L27/10852 , H01L28/82
摘要： A capacitor for a semiconductor memory device and a method for manufacturing the same are provided. A lower electrode of a capacitor according to the present invention has a structure in which a first conductive layer and a second conductive layer are sequentially deposited and an HSG is selectively formed on the surface thereof. The first conductive layer is composed of an amorphous or a polycrystalline silicon film having a low concentration of impurities. The second conductive layer is composed of an amorphous silicon film having a high concentration of impurities. According to the present invention, it is possible to obtain a desirable Cmin/Cmax ratio in the lower electrode of the capacitor having an HSG silicon layer and to prevent diffusion of impurities from the lower electrode of the capacitor.
摘要翻译：提供了一种用于半导体存储器件的电容器及其制造方法。根据本发明的电容器的下电极具有顺序地沉积第一导电层和第二导电层并且在其表面上选择性地形成HSG的结构。第一导电层由具有低浓度杂质的无定形或多晶硅膜构成。第二导电层由具有高浓度杂质的非晶硅膜构成。根据本发明，可以在具有HSG硅层的电容器的下电极中获得所需的Cmin / Cmax比，并且防止杂质从电容器的下电极扩散。

4. 发明授权

US5622889A High capacitance capacitor manufacturing method 失效
标题翻译：高容量电容器制造方法
公开(公告)号：US5622889A
公开(公告)日：1997-04-22
申请号：US591391
申请日：1996-01-25
申请人： Cha-young Yoo , Young-sun Kim , Young-wook Park , Se-jin Shim
发明人： Cha-young Yoo , Young-sun Kim , Young-wook Park , Se-jin Shim
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10852 , H01L28/84
摘要： A method for manufacturing a high capacitance capacitor having an HSG film formed on a stack-structured lower storage node, includes the step of forming insulating films for protecting the HSG film. In the present invention the lower storage node and the HSG film formed thereon are not damaged during an etch-back process. The HSG film formed on the lower storage node is protected by means of the insulating films, thereby preventing a decrease in capacitor capacitance.
摘要翻译：一种制造具有形成在叠层结构的下存储节点上的HSG膜的高电容电容器的方法包括形成用于保护HSG膜的绝缘膜的步骤。在本发明中，形成在其上的下存储节点和HSG膜在回蚀处理期间不被损坏。形成在下部存储节点上的HSG膜通过绝缘膜保护，从而防止电容器电容的降低。

5. 发明授权

US06245632B1 Variable temperature methods of forming hemispherical grained silicon (HSG-Si) layers 失效
标题翻译：形成半球状硅（HSG-Si）层的可变温度方法
公开(公告)号：US06245632B1
公开(公告)日：2001-06-12
申请号：US09013504
申请日：1998-01-26
申请人： Young-sun Kim , Se-jin Shim
发明人： Young-sun Kim , Se-jin Shim
IPC分类号： H01L2120
CPC分类号： H01L28/84
摘要： A method of forming a hemispherical grained silicon layer includes the steps of providing a microelectronic substrate including a conductive layer thereon, and heating the conductive layer to a first predetermined temperature. Hemispherical grained silicon seeds are formed on the conductive layer while maintaining the conductive layer and the substrate at a second predetermined temperature higher than the first predetermined temperature. The hemispherical grained silicon seeds are annealed at a third predetermined temperature which is lower than the second predetermined temperature thereby growing the seeds to form a hemispherical grained silicon layer on the conductive layer.
摘要翻译：形成半球形硅层的方法包括以下步骤：在其上提供包括导电层的微电子衬底，并将导电层加热到第一预定温度。在导电层上形成半球形晶粒硅种子，同时将导电层和衬底保持在高于第一预定温度的第二预定温度。半球形晶粒硅种子在低于第二预定温度的第三预定温度下退火，从而生长种子以在导电层上形成半球形晶粒硅层。

6. 发明授权

US5943584A Annealing methods of doping electrode surfaces using dopant gases 失效
标题翻译：使用掺杂气体掺杂电极表面的退火方法
公开(公告)号：US5943584A
公开(公告)日：1999-08-24
申请号：US976338
申请日：1997-11-21
申请人： Se-jin Shim , You-chan Jin , Seung-hee Nam
发明人： Se-jin Shim , You-chan Jin , Seung-hee Nam
IPC分类号： H01L21/22 , H01L21/02 , H01L21/8242
CPC分类号： H01L28/82
摘要： A method of doping a surface portion of a layer of an integrated circuit device includes the steps of forming a layer of a semiconductor material on an integrated circuit substrate and annealing the layer of the semiconductor material at a predetermined temperature while flowing a dopant gas over the layer of the semiconductor material. More particularly, the step of forming the layer of the semiconductor material can include forming a first sub-layer of the semiconductor material on the integrated circuit substrate and forming a second sublayer of the semiconductor material on the first sublayer where the second sublayer has an increased surface area. For example, the second sublayer can be a hemispherical grained silicon layer.
摘要翻译：掺杂集成电路器件层的表面部分的方法包括以下步骤：在集成电路衬底上形成半导体材料层并在预定温度下退火半导体材料层，同时使掺杂剂气体流过半导体材料层。更具体地，形成半导体材料层的步骤可以包括在集成电路基板上形成半导体材料的第一子层，并在第一子层上形成半导体材料的第二子层，其中第二子层具有增加的表面积。例如，第二子层可以是半球形的硅层。

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