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    • 4. 发明申请
    • THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD OF THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20090272980A1
    • 2009-11-05
    • US12272624
    • 2008-11-17
    • Seung-Hwan SHIMKi-Hun JEONGJoo-Han KIMSung-Hoon YANGHong-kee CHIN
    • Seung-Hwan SHIMKi-Hun JEONGJoo-Han KIMSung-Hoon YANGHong-kee CHIN
    • H01L31/036H01L21/84
    • H01L27/1288H01L27/124
    • A semiconductor including a channel, a data line including a source electrode, a drain electrode, and a pixel area definition member is formed on a gate insulating layer, and a passivation layer is deposited on the data line, the pixel area definition member, and the channel of the semiconductor. A first photosensitive film pattern including a first portion disposed at a position corresponding to the drain electrode and a second portion that is thicker than the first portion, and exposing the passivation layer at a position corresponding to the pixel area definition member, is formed on the passivation layer, the passivation layer that is exposed by using the first photosensitive film pattern as an etch mask is etched, and a second photosensitive film pattern is formed by etching the whole surface of the first photosensitive film pattern to remove the first portion. The pixel area definition member exposed by the passivation layer is etched, and the passivation layer exposed by the removal of the first portion and the semiconductor exposed by the removal of the pixel area definition member are etched. A conductor layer for a pixel electrode is formed, and the second photosensitive film pattern is removed to form the pixel electrode.
    • 包括沟道的半导体,包括源电极,漏电极和像素区域定义部件的数据线形成在栅极绝缘层上,钝化层沉积在数据线,像素区域定义部件和 半导体的通道。 第一感光膜图案包括设置在与漏电极相对应的位置处的第一部分和比第一部分更厚的第二部分,并且在与像素区域定义部件对应的位置处曝光钝化层,形成在 钝化层,蚀刻通过使用第一感光膜图案而曝光的钝化层作为蚀刻掩模,并且通过蚀刻第一感光膜图案的整个表面以除去第一部分来形成第二感光膜图案。 蚀刻由钝化层露出的像素区域定义构件,蚀刻通过去除第一部分而露出的钝化层和通过去除像素区域定义构件而暴露的半导体。 形成用于像素电极的导体层,并且去除第二感光膜图案以形成像素电极。
    • 6. 发明申请
    • THIN FILM TRANSISTOR ARRAY AND METHOD OF MANUFACTURING THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20100001277A1
    • 2010-01-07
    • US12498526
    • 2009-07-07
    • Ki-Hun JEONGSeung-Hwan SHIMJoo-Han KIMHong-Kee CHIN
    • Ki-Hun JEONGSeung-Hwan SHIMJoo-Han KIMHong-Kee CHIN
    • H01L27/12H01L21/77
    • H01L27/1214H01L27/1288H01L29/4908
    • A method of manufacturing a thin film transistor array substrate includes: forming a gate pattern on a substrate; forming a first gate insulating film and a second gate insulating film on the substrate; forming a source/drain pattern and a semiconductor pattern on the substrate; forming a passivation film on the substrate; forming a photo-resist pattern on the passivation film; patterning the passivation film using the photo-resist pattern to form a passivation film pattern, the patterning of the passivation film including over-etching the passivation film to form an open region in the passivation film; forming a transparent electrode film on the substrate; removing the photo-resist pattern and a portion of the transparent electrode film on the photo-resist pattern; and forming a pixel electrode on the first gate insulating layer.
    • 制造薄膜晶体管阵列基板的方法包括:在基板上形成栅极图案; 在所述基板上形成第一栅极绝缘膜和第二栅极绝缘膜; 在衬底上形成源极/漏极图案和半导体图案; 在衬底上形成钝化膜; 在钝化膜上形成光刻胶图案; 使用光刻胶图形图案化钝化膜以形成钝化膜图案,钝化膜的图案化包括过蚀刻钝化膜以在钝化膜中形成开放区域; 在基板上形成透明电极膜; 在所述光刻胶图案上除去所述光刻胶图案和所述透明电极膜的一部分; 以及在所述第一栅极绝缘层上形成像素电极。
    • 8. 发明申请
    • THIN FILM TRANSISTOR ARRAY AND METHOD OF MANUFACTURING THE SAME
    • 薄膜晶体管阵列及其制造方法
    • US20120208330A1
    • 2012-08-16
    • US13450643
    • 2012-04-19
    • Ki-Hun JEONGSeung-Hwan SHIMJoo-Han KIMHong-Kee CHIN
    • Ki-Hun JEONGSeung-Hwan SHIMJoo-Han KIMHong-Kee CHIN
    • H01L21/336
    • H01L27/1214H01L27/1288H01L29/4908
    • A method of manufacturing a thin film transistor array substrate includes: forming a gate pattern on a substrate; forming a first gate insulating film and a second gate insulating film on the substrate; forming a source/drain pattern and a semiconductor pattern on the substrate; forming a passivation film on the substrate; forming a photo-resist pattern on the passivation film; patterning the passivation film using the photo-resist pattern to form a passivation film pattern, the patterning of the passivation film including over-etching the passivation film to form an open region in the passivation film; forming a transparent electrode film on the substrate; removing the photo-resist pattern and a portion of the transparent electrode film on the photo-resist pattern; and forming a pixel electrode on the first gate insulating layer.
    • 制造薄膜晶体管阵列基板的方法包括:在基板上形成栅极图案; 在所述基板上形成第一栅极绝缘膜和第二栅极绝缘膜; 在衬底上形成源极/漏极图案和半导体图案; 在衬底上形成钝化膜; 在钝化膜上形成光刻胶图案; 使用光刻胶图形图案化钝化膜以形成钝化膜图案,钝化膜的图案化包括过蚀刻钝化膜以在钝化膜中形成开放区域; 在基板上形成透明电极膜; 在所述光刻胶图案上除去所述光刻胶图案和所述透明电极膜的一部分; 以及在所述第一栅极绝缘层上形成像素电极。