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1. 发明授权

US06300184B1 Method of manufacturing a CMOS transistor 失效
标题翻译：制造CMOS晶体管的方法
公开(公告)号：US06300184B1
公开(公告)日：2001-10-09
申请号：US09609158
申请日：2000-06-30
申请人： Jun Gi Choi , Seon Soon Kim
发明人： Jun Gi Choi , Seon Soon Kim
IPC分类号： H01L218238
CPC分类号： H01L21/823842
摘要： There is disclosed a method of manufacturing a CMOS transistor, by which ion implantation process is selectively performed to the gate formed region of a polysilicon film after a NMOS transistor region and a PMOS transistor region are defined in the process of manufacturing a CMOS transistor. Thus, it can obtain a reliable device by solving the problem occurring when polysilicon films doped with different impurities are simultaneously etched and the problem that a tungsten film is oxidized due to a selective oxidization process after forming a tungsten gate electrode.
摘要翻译：公开了一种制造CMOS晶体管的方法，在制造CMOS晶体管的过程中限定了NMOS晶体管区域和PMOS晶体管区域之后，通过其选择性地对多晶硅膜的栅极形成区域进行离子注入工艺。因此，通过解决在同时蚀刻掺杂有不同杂质的多晶硅膜和在形成钨栅电极之后由于选择性氧化工艺而氧化钨膜的问题，可以获得可靠的器件。

2. 发明授权

US06333249B2 Method for fabricating a semiconductor device 失效
公开(公告)号：US06333249B2
公开(公告)日：2001-12-25
申请号：US09751941
申请日：2001-01-02
申请人： Seon Soon Kim , Jun Gi Choi
发明人： Seon Soon Kim , Jun Gi Choi
IPC分类号： H01L213205
CPC分类号： H01L27/10894 , H01L21/823842 , H01L27/10873
摘要： A method for fabricating a semiconductor device is disclosed. In a process for fabricating a CMOS transistor of a high integrated semiconductor device and a cell of a DRAM, a process for forming a dual gate electrode having a layered structure of a tungsten layer and a polysilicon layer includes the steps of forming a gate electrode shape from an undoped polysilicon layer, forming an insulating film spacer at sidewalls of the polysilicon layer, forming an LDD region, removing a portion of the undoped polysilicon layer to leave a predetermined thickness and to form an opening in which the tungsten layer will be formed, and respectively implanting different impurity ions into the undoped polysilicon layer respectively formed in the PMOS region and the NMOS region before forming the tungsten layer. Thus, it is possible to prevent etching residue from occurring and also prevent the semiconductor substrate from being damaged. In addition, it is possible to prevent the tungsten layer from being oxidized due to a high temperature process such as an ion plantation process for forming the LDD region and the source/drain region, thereby improving operational characteristics of the device and process yield.

3. 发明申请

US20090141572A1 VOLTAGE CONTROL APPARATUS AND METHOD OF CONTROLLING VOLTAGE USING THE SAME 有权
标题翻译：电压控制装置及使用该电压控制装置的电压控制方法
公开(公告)号：US20090141572A1
公开(公告)日：2009-06-04
申请号：US12364670
申请日：2009-02-03
申请人： Jun Gi Choi , Yoon Jae Shin
发明人： Jun Gi Choi , Yoon Jae Shin
IPC分类号： G11C7/00 , G11C29/00 , G11C8/00 , G11C5/14
CPC分类号： G11C29/12 , G11C11/401 , G11C11/4074 , G11C2029/1202
摘要： A voltage control apparatus and a method of controlling a voltage using the same. A voltage control apparatus includes a signal generator configured to output a burn-in control signal and a burn-in precharge signal in response to an all bank precharge command, and a voltage controller configured to supply either a first voltage or a second voltage lower than the first voltage to a word line in response to the burn-in control signal and the burn-in precharge signal.
摘要翻译：电压控制装置及使用该电压控制装置的电压的控制方法。一种电压控制装置，包括：信号发生器，被配置为响应于全部分组预充电命令输出老化控制信号和老化预充电信号;以及电压控制器，被配置为将第一电压或第二电压响应于老化控制信号和老化预充电信号到字线的第一电压。

4. 发明申请

US20080089148A1 Voltage contol apparatus and method of controlling voltage using the same 有权
标题翻译：电压调节装置及使用该电压控制电压的方法
公开(公告)号：US20080089148A1
公开(公告)日：2008-04-17
申请号：US11822358
申请日：2007-07-05
申请人： Jun Gi Choi , Yoon Jae Shin
发明人： Jun Gi Choi , Yoon Jae Shin
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C29/12 , G11C11/401 , G11C11/4074 , G11C2029/1202
摘要： A voltage control apparatus and a method of controlling a voltage using the same. A voltage control apparatus includes a signal generator configured to output a burn-in control signal and a burn-in precharge signal in response to an all bank precharge command, and a voltage controller configured to supply either a first voltage or a second voltage lower than the first voltage to a word line in response to the burn-in control signal and the burn-in precharge signal.
摘要翻译：电压控制装置及使用该电压控制装置的电压的控制方法。一种电压控制装置，包括：信号发生器，被配置为响应于全部分组预充电命令输出老化控制信号和老化预充电信号;以及电压控制器，被配置为将第一电压或第二电压响应于老化控制信号和老化预充电信号到字线的第一电压。

5. 发明授权

US06867641B2 Internal voltage generator for semiconductor device 有权
标题翻译：半导体器件内部电压发生器
公开(公告)号：US06867641B2
公开(公告)日：2005-03-15
申请号：US10671382
申请日：2003-09-25
申请人： Chang Seok Kang , Jun Gi Choi
发明人： Chang Seok Kang , Jun Gi Choi
IPC分类号： G11C5/14 , G05F1/46 , G05F1/10 , G03G3/16
CPC分类号： G05F1/465
摘要： Disclosed is an internal voltage generator which generates a stable internal voltage using two power up sensing means. Clamp means outputs a first voltage. First and second power up sensing means sense the external applied to the semiconductor device and output first and second control signals, respectively. A first switch receives the first voltage and a switch controller receives the first and second control signals from the first and second power up sensing means and controls turn on/off of the first switch. A second switch is turned on/off according to the second control signal from the second power up sensing means and receives a second voltage. An amplifier selectively receives the first and second voltages from the first and second switches and outputs the second voltage.
摘要翻译：公开了一种内部电压发生器，其使用两个上电感测装置产生稳定的内部电压。钳位表示输出第一电压。第一和第二上电感测装置检测施加到半导体器件的外部并分别输出第一和第二控制信号。第一开关接收第一电压，开关控制器从第一和第二上电感测装置接收第一和第二控制信号，并控制第一开关的导通/截止。根据来自第二上电检测装置的第二控制信号，第二开关被接通/断开，并接收第二电压。放大器选择性地接收来自第一和第二开关的第一和第二电压并输出第二电压。

6. 发明授权

US08421520B2 Electric fuse circuit and method of operating the same 有权
标题翻译：电熔丝电路及其操作方法
公开(公告)号：US08421520B2
公开(公告)日：2013-04-16
申请号：US12841106
申请日：2010-07-21
申请人： Jun Gi Choi
发明人： Jun Gi Choi
IPC分类号： G01R31/28
CPC分类号： H01L23/5256 , G11C17/18 , H01L2924/0002 , H01L2924/00
摘要： A fuse circuit includes an electric fuse coupled to a first voltage source; a low resistance unit coupled to the electric fuse and having a junction which is capable of breaking down; and a switching unit coupled between the low resistance unit and a second voltage source.
摘要翻译：熔丝电路包括耦合到第一电压源的电熔丝; 耦合到电熔丝并具有能够分解的结的低电阻单元; 以及耦合在所述低电阻单元和第二电压源之间的开关单元。

7. 发明申请

US20120057413A1 SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD THEREOF 有权
标题翻译：半导体存储器及其测试方法
公开(公告)号：US20120057413A1
公开(公告)日：2012-03-08
申请号：US12948874
申请日：2010-11-18
申请人： Tae Sik YUN , Hyung Dong Lee , Jun Gi Choi , Sang Jin Byeon , Sang Hoon Shin
发明人： Tae Sik YUN , Hyung Dong Lee , Jun Gi Choi , Sang Jin Byeon , Sang Hoon Shin
IPC分类号： G11C8/18 , G11C29/00 , G11C7/10 , G11C7/22
CPC分类号： G11C7/22 , G11C7/222 , G11C29/006 , G11C29/023
摘要： A semiconductor memory apparatus includes a clock control unit configured to receive a first clock when an enable signal is activated and generate a second clock which has a cycle closer in length to a target clock cycle than the first clock; a DLL input clock generation unit configured to output one of the first clock and the second clock as a DLL input clock according to a DLL select signal; and an address/command input clock generation unit configured to output one of the first clock and the second clock as an AC input clock according to the enable signal.
摘要翻译：一种半导体存储装置，包括：时钟控制单元，被配置为当使能信号被激活时接收第一时钟，并产生具有与第一时钟相对于目标时钟周期更长的周期的第二时钟; DLL输入时钟生成单元，被配置为根据DLL选择信号将第一时钟和第二时钟中的一个作为DLL输入时钟输出; 以及地址/命令输入时钟生成单元，被配置为根据使能信号将第一时钟和第二时钟中的一个作为AC输入时钟输出。

8. 发明申请

US20070285142A1 Apparatus for supplying voltage free from noise and method of operation the same 失效
标题翻译：用于提供无噪声电压的装置及其操作方法
公开(公告)号：US20070285142A1
公开(公告)日：2007-12-13
申请号：US11647486
申请日：2006-12-29
申请人： Yoon Jae Shin , Jun Gi Choi
发明人： Yoon Jae Shin , Jun Gi Choi
IPC分类号： H03K3/356
CPC分类号： H03K17/145 , H03K19/00384 , Y10T307/696
摘要： A voltage supply apparatus includes a power noise sensing unit, a voltage selecting unit, a first power voltage supply unit and a second power voltage supply unit. The power noise sensing unit senses noise from first and second powers and outputs a power noise sensing signal. The voltage selecting unit outputs first and second driving signals in response to a voltage-supply-enable-signal and the power noise sensing signal. The first power voltage supply unit applies a voltage of the first power in response to the first and second driving signals. The second power voltage supply unit applies a voltage of the second power in response to the first and second driving signals.
摘要翻译：电压供给装置包括电源噪声检测单元，电压选择单元，第一电源电压单元和第二电源电压单元。功率噪声感测单元感测来自第一和第二功率的噪声，并输出功率噪声感测信号。电压选择单元响应于电压供应使能信号和功率噪声感测信号输出第一和第二驱动信号。第一电源电压单元响应于第一和第二驱动信号施加第一功率的电压。第二电源电压单元响应于第一和第二驱动信号施加第二功率的电压。

9. 发明申请

US20110266877A1 APPARATUS FOR SUPPLYING VOLTAGE FREE NOISE AND METHOD OF OPERATION THE SAME 失效
标题翻译：用于提供无电压噪声的装置及其操作方法
公开(公告)号：US20110266877A1
公开(公告)日：2011-11-03
申请号：US13180584
申请日：2011-07-12
申请人： YOON JAE SHIN , Jun Gi Choi
发明人： YOON JAE SHIN , Jun Gi Choi
IPC分类号： H02J4/00
CPC分类号： H03K17/145 , H03K19/00384 , Y10T307/696
摘要： A voltage supply apparatus includes a power noise sensing unit, a voltage selecting unit, a first power voltage supply unit and a second power voltage supply unit. The power noise sensing unit senses noise from first and second powers and outputs a power noise sensing signal. The voltage selecting unit outputs first and second driving signals in response to a voltage-supply-enable-signal and the power noise sensing signal. The first power voltage supply unit applies a voltage of the first power in response to the first and second driving signals. The second power voltage supply unit applies a voltage of the second power in response to the first and second driving signals.
摘要翻译：电压供给装置包括电源噪声检测单元，电压选择单元，第一电源电压单元和第二电源电压单元。功率噪声感测单元感测来自第一和第二功率的噪声，并输出功率噪声感测信号。电压选择单元响应于电压供应使能信号和功率噪声感测信号输出第一和第二驱动信号。第一电源电压单元响应于第一和第二驱动信号施加第一功率的电压。第二电源电压单元响应于第一和第二驱动信号施加第二功率的电压。

10. 发明授权

US07825733B2 Circuit providing compensated power for sense amplifier and driving method thereof 有权
标题翻译：用于读出放大器的电路提供补偿功率及其驱动方法
公开(公告)号：US07825733B2
公开(公告)日：2010-11-02
申请号：US12136196
申请日：2008-06-10
申请人： Jun Gi Choi
发明人： Jun Gi Choi
IPC分类号： H03L7/099
CPC分类号： G11C5/147 , G11C7/02 , G11C7/065 , G11C7/08 , G11C8/18 , G11C11/4074 , G11C11/4091
摘要： The present invention discloses a circuit providing a power for a sense amplifier that stabilizes a power voltage supplied to the sense amplifier by compensating a noise generated in the power voltage when the sense amplifier operates with an selectively generated decoupling noise. The circuit providing a power for a sense amplifier includes a sense amplifying circuit sensing and amplifying data loaded on a bit line with a first power. A power supplying unit provides the first power to the sense amplifying circuit. A decoupling unit generates a decoupling noise with a second power and provides the decoupling noise to the first power voltage. The decoupling noise is maintained for a period including a time point of an operation of the sense amplifying circuit and a predetermined time thereafter.
摘要翻译：本发明公开了一种提供用于感测放大器的电源的电路，其通过补偿当读出放大器以选择性地产生的解耦噪声工作时在电源电压中产生的噪声来稳定提供给读出放大器的电源电压。提供用于读出放大器的电源的电路包括感测放大电路，以感测和放大加载在具有第一功率的位线上的数据。供电单元向感测放大电路提供第一功率。解耦单元产生具有第二功率的去耦噪声，并将解耦噪声提供给第一电源电压。解耦噪声保持包括感测放大电路的操作的时间点和之后的预定时间的周期。

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