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1. 发明申请

US20060257563A1 Method of fabricating silicon-doped metal oxide layer using atomic layer deposition technique 审中-公开
标题翻译：使用原子层沉积技术制造掺杂硅的金属氧化物层的方法
公开(公告)号：US20060257563A1
公开(公告)日：2006-11-16
申请号：US11329696
申请日：2006-01-11
申请人： Seok-Joo Doh , Shi-Woo Rhee , Jong-Pyo Kim , Jung-Hyoung Lee , Jong-Ho Lee , Yun-Seok Kim
发明人： Seok-Joo Doh , Shi-Woo Rhee , Jong-Pyo Kim , Jung-Hyoung Lee , Jong-Ho Lee , Yun-Seok Kim
IPC分类号： C23C16/00
CPC分类号： C23C16/401 , C23C16/45529 , C23C16/45531
摘要： There are provided methods of fabricating a silicon-doped metal oxide layer on a semiconductor substrate using an atomic layer deposition technique. The methods include an operation of repeatedly performing a metal oxide layer formation cycle K times and an operation of repeatedly performing a silicon-doped metal oxide layer formation cycle Q times. At least one of the values K and Q is an integer of 2 or more. K and Q are integers ranging from 1 to about 10 respectively. The metal oxide layer formation cycle includes the steps of supplying a metal source gas to a reactor containing the substrate, and then injecting an oxide gas into the reactor. The silicon-doped metal oxide layer formation cycle includes supplying a metal source gas including silicon into a reactor containing the substrate, and then injecting an oxide gas into the reactor. The sequence of operations of repeatedly performing the metal oxide layer formation cycle K times, followed by repeatedly performing the silicon-doped metal oxide layer formation cycle Q times, is performed one or more times until a silicon-doped metal oxide layer with a desired thickness is formed on the substrate. In addition, a method of fabricating a silicon-doped hafnium oxide (Si-doped HfO2) layer according to a similar invention method is also provided.
摘要翻译：提供了使用原子层沉积技术在半导体衬底上制造掺硅金属氧化物层的方法。这些方法包括重复进行金属氧化物层形成循环K次的操作和重复进行掺硅金属氧化物层形成循环Q次的操作。值K和Q中的至少一个是2以上的整数。 K和Q分别为1至约10的整数。金属氧化物层形成循环包括将金属源气体供给到包含基板的反应器中，然后将氧化物气体注入到反应器中的步骤。掺杂硅的金属氧化物层形成循环包括将含有硅的金属源气体供给到含有该基板的反应器中，然后将氧化物气体注入反应器。重复执行金属氧化物层形成循环K次的操作顺序，随后重复进行掺杂硅的金属氧化物层形成循环Q次，执行一次或多次，直到具有所需厚度的掺硅金属氧化物层形成在基板上。此外，还提供了根据类似的发明方法制造掺杂硅的氧化铪（Si掺杂的HfO 2 N 2）层的方法。

2. 发明授权

US07250228B2 Yttrium-doped bismuth titanate thin film and preparation thereof 失效
标题翻译：掺钇钛酸铋薄膜及其制备方法
公开(公告)号：US07250228B2
公开(公告)日：2007-07-31
申请号：US10672753
申请日：2003-09-26
申请人： Shi-Woo Rhee , Sang-Woo Kang
发明人： Shi-Woo Rhee , Sang-Woo Kang
IPC分类号： B32B9/00 , C23C16/00
CPC分类号： H01L21/02197 , C23C16/40 , H01L21/02205 , H01L21/31691 , Y10T29/49002
摘要： A bismuth yttrium titanate (BYT) film having the composition of formula (I) has enhanced residual polarization and electric fatigue properties with excellent ferroelectric property, and therefore, it can be advantageously used in an electric or electronic device including a FRAM device: Bi4-xYxTi3O12 (I) wherein x is an integer of 0.1 to 2.
摘要翻译：具有式（I）组成的铋钛酸铋（BYT）膜具有优异的铁电性能的增强的残余极化和电疲劳特性，因此可有利地用于包括FRAM器件的电气或电子设备中。 in-line-formula description =“In-line Formulas”end =“lead”？> Bi x 4 x x Y 3 x 3 （I）<？in-line-formula description =“In-line Formulas”end =“tail”？>其中x为0.1至2的整数。

3. 发明授权

US07087271B2 Method for preparing low dielectric films 失效
标题翻译：制备低介电膜的方法
公开(公告)号：US07087271B2
公开(公告)日：2006-08-08
申请号：US10480770
申请日：2002-06-28
申请人： Shi-Woo Rhee , Sang-Ki Kwak
发明人： Shi-Woo Rhee , Sang-Ki Kwak
IPC分类号： H05H1/24
CPC分类号： H01L21/02126 , C23C16/30 , C23C16/401 , H01L21/02211 , H01L21/02216 , H01L21/02274 , H01L21/3122 , H01L21/31633
摘要： A low dielectric constant hydrogenated silicon-oxycarbide (SiCO:H) film is prepared by bringing an organosilicon or organosilicate compound having at least one vinyl or ethynyl group, or a mixture of a saturated organosilicon or organosilicate compound and an unsaturated hydrocarbon into contact with a substrate in the presence of an O2-containing gas plasma.
摘要翻译：通过使具有至少一个乙烯基或乙炔基的有机硅或有机硅酸盐化合物或饱和有机硅或有机硅酸盐化合物和不饱和烃的混合物与一种低介电常数的氢化硅 - 碳氧化物（SiCO：H）在含有O 2 N 2的气体等离子体存在下进行。

4. 发明授权

US06774038B2 Organometal complex and method of depositing a metal silicate thin layer using same 有权
标题翻译：有机复合物及使用其沉积金属硅酸盐薄层的方法
公开(公告)号：US06774038B2
公开(公告)日：2004-08-10
申请号：US10423337
申请日：2003-04-25
申请人： Shi-Woo Rhee , Sang-Woo Kang , Won-Hee Nam
发明人： Shi-Woo Rhee , Sang-Woo Kang , Won-Hee Nam
IPC分类号： H01L2144
CPC分类号： H01L21/02142 , C23C16/40 , C23C16/45553 , H01L21/0228 , H01L21/3141 , H01L21/31608 , H01L21/31641
摘要： The present invention relates to an organometal complex and a chemical vapor deposition (CVD) or atomic layer deposition (ALD) method for preparing a metal silicate thin layer using same. The inventive method can easily prepare the metal silicate thin layer having a desired composition which can be effectively used as a gate insulating layer for various semiconductor devices.
摘要翻译：本发明涉及一种使用其制备金属硅酸盐薄层的有机金属络合物和化学气相沉积（CVD）或原子层沉积（ALD）方法。本发明的方法可以容易地制备具有所需组成的金属硅酸盐薄层，其可以有效地用作各种半导体器件的栅极绝缘层。

5. 发明授权

US06274195B1 Organometallic complex process for the preparation thereof and metal organic chemical vapor deposition using same 有权
标题翻译：用于其制备的有机金属络合物方法和使用其的金属有机化学气相沉积
公开(公告)号：US06274195B1
公开(公告)日：2001-08-14
申请号：US09560448
申请日：2000-04-28
申请人： Shi-Woo Rhee , Jae-Young Shim , Jung-Hyun Lee , Dae-Hwan Kim
发明人： Shi-Woo Rhee , Jae-Young Shim , Jung-Hyun Lee , Dae-Hwan Kim
IPC分类号： C23C1606
CPC分类号： C23C16/409 , C07F7/003 , C23C16/18 , C23C16/405
摘要： An organometallic complex of formula(I) having a low evaporation temperature can be used as a precursor for the MOCVD of a metal compound thin film on semiconductor devices wherein, M is Ti or Zr; R1, R2, R3 and R4 are each independently H or C1-4 alkyl; and m is an integer ranging from 2 to 5.
摘要翻译：可以使用具有低蒸发温度的式（I）的有机金属配合物作为半导体器件上的金属化合物薄膜的MOCVD的前体，其中M是Ti或Zr; R1，R2，R3和R4各自独立地为H或 C 1-4烷基; andm是从2到5的整数。

6. 发明授权

US6090964A Organocuprous precursors for chemical vapor deposition of a copper film 失效
标题翻译：铜膜化学气相沉积的有机碳前驱体
公开(公告)号：US6090964A
公开(公告)日：2000-07-18
申请号：US233573
申请日：1999-01-19
申请人： Shi-Woo Rhee , Doo-Hwan Cho , Jai-Wook Park , Sang-Woo Kang
发明人： Shi-Woo Rhee , Doo-Hwan Cho , Jai-Wook Park , Sang-Woo Kang
IPC分类号： C07F1/08 , C23C16/18 , H01L21/285
CPC分类号： C23C16/18 , C07F1/08
摘要： A liquid organocuprous compound of formula (I) of the present invention can be conveniently used in a low-temperature CVD process for the production of a contaminant-free copper film having good step-coverage and hole-filling properties: ##STR1## wherein: R.sup.1 represents a C.sub.3-8 cycloalkyl group, andR.sup.2 and R.sup.3 are each independently a perfluorinated C.sub.1-4 alkyl group.
摘要翻译：本发明的式（I）的有机有机化合物可以方便地用于生产具有良好阶梯覆盖和充填孔性能的无污染铜膜的低温CVD工艺中：其中：R1表示 C3-8环烷基，R2和R3各自独立地为全氟化C 1-4烷基。

7. 发明申请

US20100051911A1 Organic Thin Film Transistor Array Panel and Method of Manufacturing the Same 审中-公开
标题翻译：有机薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20100051911A1
公开(公告)日：2010-03-04
申请号：US12391883
申请日：2009-02-24
申请人： Seung-Hwan Cho , Bo-Sung Kim , Young-Min Kim , Shi-Woo Rhee , Dong-Jin Yun
发明人： Seung-Hwan Cho , Bo-Sung Kim , Young-Min Kim , Shi-Woo Rhee , Dong-Jin Yun
IPC分类号： H01L51/50 , H01L51/56
CPC分类号： H01L51/0545 , H01L51/0036 , H01L51/0053 , H01L51/0056 , H01L51/0078
摘要： In an organic thin film transistor array panel includes a source electrode and a drain electrode having a double layer including a metal and a metal oxide. The organic thin film transistor array panel is formed through a lift-off process or by using a shadow mask. The thin film transistor array panel has excellent characteristics and reduced manufacturing process costs.
摘要翻译：在有机薄膜晶体管阵列面板中包括具有包括金属和金属氧化物的双层的源电极和漏电极。有机薄膜晶体管阵列板通过剥离工艺或使用荫罩形成。薄膜晶体管阵列面板具有优异的特性和降低的制造工艺成本。

8. 发明授权

US06858251B2 Lanthanum complex and process for the preparation of a BLT layer using same 失效
标题翻译：镧络合物和使用其制备BLT层的方法
公开(公告)号：US06858251B2
公开(公告)日：2005-02-22
申请号：US10143355
申请日：2002-05-09
申请人： Shi-Woo Rhee , Sang-Woo Kang
发明人： Shi-Woo Rhee , Sang-Woo Kang
IPC分类号： C01G29/00 , C07C49/92 , C07C211/65 , C07C217/08 , C07F5/00 , C23C16/40 , H01B3/00 , H01B3/12 , H01L21/316 , C23C16/06 , C23C16/14 , C23C16/22
CPC分类号： C07F5/003 , C23C16/40
摘要： A lanthanum complex of formula (I) having a low evaporation temperature can be used as a useful precursor for MOCVD of a BLT thin layer on semiconductor devices. wherein A is pentamethyldiethylenetriamine(PMDT) or triethoxytriethyleneamine(TETEA).
摘要翻译：具有低蒸发温度的式（I）的镧络合物可用作半导体器件上BLT薄层的MOCVD的有用前体。其中A是五甲基二亚乙基三胺（PMDT）或三乙氧基三亚乙基胺（TETEA）。

9. 发明授权

US6133147A Process for selective metal deposition in holes of semiconductor device 失效
标题翻译：在半导体器件的孔中选择性金属沉积的工艺
公开(公告)号：US6133147A
公开(公告)日：2000-10-17
申请号：US139701
申请日：1998-08-25
申请人： Shi-Woo Rhee , Jong-Ho Yun
发明人： Shi-Woo Rhee , Jong-Ho Yun
IPC分类号： H01L21/285 , H01L21/768 , H01L21/44 , B05D5/12
CPC分类号： H01L21/76879
摘要： A process for preparing a metallic interconnecting plug in a semiconductor device which comprises the steps of: i) forming an insulating layer on the surface of a semiconductor substrate or a metal underlayer of the semiconductor device, ii) forming a hole in the insulating layer to expose the surface of the semiconductor substrate or the metal underlayer, iii) exposing the surface of the insulating layer to the vapor of a blocking agent under a pressure ranging from 10.sup.-12 to 10 torr for a controlled time period so that a blocking layer is formed only on the outer surface of the insulating layer, the blocking layer not extending over the inside walls of the hole, iv) selectively depositing a conductive metal in the hole using a chemical vapor deposition method to form the metallic interconnecting plug which extends from the surface of the semiconductor substrate or the metal underlayer to the level of the outer surface of the insulating layer, and v) removing the blocking layer from the surface of the insulating layer.
摘要翻译：一种在半导体器件中制备金属互连插头的方法，包括以下步骤：i）在半导体器件的半导体衬底或金属底层的表面上形成绝缘层，ii）在绝缘层中形成孔，暴露半导体衬底或金属底层的表面，iii）在10-12至10托的压力下将绝缘层的表面暴露于封闭剂的蒸气一段受控的时间段内，使得阻挡层为仅形成在绝缘层的外表面上，阻挡层不延伸到孔的内壁上，iv）使用化学气相沉积法选择性地在孔中沉积导电金属，以形成金属互连插塞，其从半导体衬底或金属底层的表面到绝缘层的外表面的水平面，以及v）从第二绝缘层去除阻挡层 e表面的绝缘层。

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