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1. 发明授权

US09059704B2 Programmable logic device 有权
标题翻译：可编程逻辑器件
公开(公告)号：US09059704B2
公开(公告)日：2015-06-16
申请号：US13477192
申请日：2012-05-22
申请人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
发明人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
IPC分类号： G06F1/00 , H03K19/177 , H03K19/173 , G06F3/06
CPC分类号： H03K19/173 , G06F1/3243 , G06F3/0679 , H03K19/17772 , Y02D10/152
摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.
摘要翻译：目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

2. 发明授权

US08570065B2 Programmable LSI 有权
标题翻译：可编程LSI
公开(公告)号：US08570065B2
公开(公告)日：2013-10-29
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
发明人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
IPC分类号： H03K19/177 , G11C11/24
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

3. 发明申请

US20120311365A1 PROGRAMMABLE LOGIC DEVICE 有权
标题翻译：可编程逻辑器件
公开(公告)号：US20120311365A1
公开(公告)日：2012-12-06
申请号：US13477192
申请日：2012-05-22
申请人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
发明人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
IPC分类号： G06F1/32
CPC分类号： H03K19/173 , G06F1/3243 , G06F3/0679 , H03K19/17772 , Y02D10/152
摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.
摘要翻译：目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

4. 发明授权

US08824194B2 Semiconductor device and method for driving the same 有权
标题翻译：半导体装置及其驱动方法
公开(公告)号：US08824194B2
公开(公告)日：2014-09-02
申请号：US13472741
申请日：2012-05-16
申请人： Hidetomo Kobayashi , Yutaka Shionoiri , Tatsuji Nishijima
发明人： Hidetomo Kobayashi , Yutaka Shionoiri , Tatsuji Nishijima
IPC分类号： G11C11/24
CPC分类号： H01L27/1225 , G06F9/3804 , G06F9/3814 , G11C11/404 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1255
摘要： In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.
摘要翻译：在利用读取指令的读取部分执行流水线处理的半导体器件和执行根据该指令的操作的算术部分中，当分支预测时，保持在读取部分中的指令从触发器发送到存储器原来是错的。注意，算术部分控制包括在读取部分中的触发器和存储器之间的指令的发送和接收。在分支预测结果为错误的读取部读出的指示是子程序等的情况下，能够消除读取部中的冗余动作。也就是说，保持在存储器中的指令被发送回到触发器，而不用读取部分重新读取相同的指令，从而可以将该指令输出到算术部分。

5. 发明授权

US08540161B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08540161B2
公开(公告)日：2013-09-24
申请号：US13187777
申请日：2011-07-21
申请人： Yutaka Shionoiri , Tatsuji Nishijima , Misako Sato , Shuhei Maeda
发明人： Yutaka Shionoiri , Tatsuji Nishijima , Misako Sato , Shuhei Maeda
IPC分类号： G06K19/06
CPC分类号： H01L27/13 , G06K19/07783 , H01L23/645 , H01L27/1225 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： An object of this invention is to provide a semiconductor device (an RFID) with reduced loss of voltage/current corresponding to a threshold value of a transistor, and having a voltage/current rectification property. Another object of this invention is to simplify a fabrication process and a circuit configuration. A rectifier circuit is provided in an element included in a semiconductor device (RFID) capable of communicating data wirelessly. As compared to the case where only a diode is provided, coils are provided between gate terminals and drain terminals of transistors constituting the diode in a rectifier circuit, so that the coils overlap an antenna which receives a radio wave, whereby a voltage output by the rectifier circuit is increased using electromagnetic coupling between the antenna which receives a radio wave and the coils, so that the rectification efficiency is improved.
摘要翻译：本发明的目的是提供一种具有与晶体管的阈值相对应的具有降低的电压/电流损耗并且具有电压/电流整流特性的半导体器件（RFID）。本发明的另一个目的是简化制造过程和电路结构。整流电路设置在能够无线通信数据的半导体器件（RFID）中的元件中。与仅提供二极管的情况相比，在整流电路中在构成二极管的晶体管的栅极端子和漏极端子之间设置线圈，使得线圈与接收无线电波的天线重叠，由此由使用接收无线电波的天线与线圈之间的电磁耦合来提高整流电路，从而提高整流效率。

6. 发明授权

US08581625B2 Programmable logic device 有权
标题翻译：可编程逻辑器件
公开(公告)号：US08581625B2
公开(公告)日：2013-11-12
申请号：US13463084
申请日：2012-05-03
申请人： Seiichi Yoneda , Tatsuji Nishijima
发明人： Seiichi Yoneda , Tatsuji Nishijima
IPC分类号： H03K19/173
CPC分类号： H03K19/0013 , H01L27/1225 , H01L27/124 , H01L29/7869 , H03K19/0008 , H03K19/17736 , H03K19/17744
摘要： An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.
摘要翻译：目的是提供一种具有通过可编程开关彼此连接的逻辑块的可编程逻辑器件，其中可编程开关的特征在于结合在其中的氧化物半导体晶体管。氧化物半导体晶体管的非常低的截止电流由于其保持与氧化物半导体晶体管连接的晶体管的栅极的电位的高能力而提供作为非易失性存储器的功能。氧化物半导体晶体管用作非易失性存储器的能力允许用于控制逻辑块的连接的配置数据即使在没有电源电位的情况下也被维持。因此，可以省略在设备启动时的配置数据的重写处理，这有助于降低设备的功耗。

7. 发明授权

US09344090B2 Programmable logic device 有权
标题翻译：可编程逻辑器件
公开(公告)号：US09344090B2
公开(公告)日：2016-05-17
申请号：US13463082
申请日：2012-05-03
申请人： Tatsuji Nishijima , Seiichi Yoneda
发明人： Tatsuji Nishijima , Seiichi Yoneda
IPC分类号： H03K19/177 , H01L27/06 , H01L27/118 , H01L27/12
CPC分类号： H03K19/1776 , H01L27/0688 , H01L27/11803 , H01L27/1225 , H03K19/17736 , H03K19/17764 , H03K19/17772
摘要： An object is to provide a programmable logic device which can hold configuration data even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, and can operate with low power. A transistor in a memory portion of a programmable switch includes a material which allows a sufficient reduction in off-state current of the transistor, such as an oxide semiconductor material which is a wide bandgap semiconductor. When the semiconductor material which allows a sufficient reduction in off-state current of the transistor is used, configuration data can be held even when a power supply potential is not supplied.
摘要翻译：本发明的目的是提供一种可编程逻辑器件，即使在未提供电源电位时也能够保持配置数据，在供电之后具有逻辑块的启动时间短并且可以以低功率工作。可编程开关的存储器部分中的晶体管包括允许充分降低诸如作为宽带隙半导体的氧化物半导体材料的晶体管的截止电流的材料。当使用允许晶体管的截止电流充分降低的半导体材料时，即使不提供电源电位，也可以保持配置数据。

8. 发明授权

US09214587B2 Photoelectric conversion module and manufacturing method thereof 有权
标题翻译：光电转换模块及其制造方法
公开(公告)号：US09214587B2
公开(公告)日：2015-12-15
申请号：US13212395
申请日：2011-08-18
申请人： Kazuo Nishi , Yasushi Maeda , Ryosuke Motoyoshi , Yuji Oda , Kei Takahashi , Yoshiaki Ito , Tatsuji Nishijima
发明人： Kazuo Nishi , Yasushi Maeda , Ryosuke Motoyoshi , Yuji Oda , Kei Takahashi , Yoshiaki Ito , Tatsuji Nishijima
IPC分类号： H01L31/0224 , H01L31/075 , H01L31/02 , H01L31/05 , H01L31/046
CPC分类号： H01L31/075 , H01L31/02008 , H01L31/046 , H01L31/0504 , Y02E10/548
摘要： A photoelectric conversion module in which an output voltage defect is suppressed is obtained by forming in parallel over a substrate n number (n is a natural number) of integrated photoelectric conversion devices each including a plurality of cells that are connected in series, and electrically connecting in parallel n−1 number or less of integrated photoelectric conversion devices with normal electrical characteristics and excluding an integrated photoelectric conversion device with a characteristic defect such as a short-circuit between top and bottom electrodes or a leak current due to a structural defect or the like formed in a semiconductor layer or the like.
摘要翻译：通过在基板上平行地形成n个（n为自然数）的集成光电转换装置，其中包含多个串联连接的单元，并且电连接，得到抑制输出电压缺陷的光电转换模块并联n-1个或更少的具有正常电特性的集成光电转换装置，并且不包括具有诸如顶部和底部电极之间的短路的特性缺陷或由于结构缺陷引起的漏电流的集成光电转换装置如在半导体层等中形成的。

9. 发明授权

US08922182B2 DC converter circuit and power supply circuit 有权
标题翻译： DC转换电路和电源电路
公开(公告)号：US08922182B2
公开(公告)日：2014-12-30
申请号：US12956491
申请日：2010-11-30
申请人： Kei Takahashi , Yoshiaki Ito , Hiroki Inoue , Tatsuji Nishijima
发明人： Kei Takahashi , Yoshiaki Ito , Hiroki Inoue , Tatsuji Nishijima
IPC分类号： G05F1/00 , H01L27/12 , H01L29/786 , H02M3/155
CPC分类号： H02M3/156 , H01L27/12 , H01L27/1225 , H01L29/7869 , H02M3/155
摘要： A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.
摘要翻译：提供了具有高可靠性的DC转换器电路。 DC转换器电路包括：电感器，被配置为根据流动电流的变化产生电动势; 包括栅极，源极和漏极的晶体管，其被配置为通过导通或关断来控制电感器中的电动势的产生; 当晶体管截止时处于导通状态的整流器; 以及被配置为控制晶体管的导通和截止的控制电路。晶体管包括作为沟道形成层的氢浓度小于或等于5×1019原子/ cm3的氧化物半导体层。

10. 发明授权

US08311315B2 Pattern inspection method and apparatus 有权
标题翻译：图案检验方法及装置
公开(公告)号：US08311315B2
公开(公告)日：2012-11-13
申请号：US13067782
申请日：2011-06-27
申请人： Teppei Oguni , Tatsuji Nishijima , Akiharu Miyanaga
发明人： Teppei Oguni , Tatsuji Nishijima , Akiharu Miyanaga
IPC分类号： G06K9/00 , H04N7/18
CPC分类号： G01N21/95692 , G06T7/0004 , G06T7/90 , G06T2207/30148
摘要： A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.
摘要翻译：检查对象的彩色图像由能够拍摄彩色图像的成像装置获取以获得RGB颜色空间的颜色信息。生成RGB颜色空间或其他颜色空间的颜色分量的灰度图像，并且通过模式识别技术检测检查对象。或者，从生成的灰度图像生成二值图像，并且通过对二值图像执行模式识别来检测检查对象。将检测到的检查对象占据的像素的颜色数据与预先准备好判断检查对象是否有缺陷的无缺陷检查对象的颜色数据进行比较。此外，这种判断结果反映在通过网络的另一制造步骤中，并且产品质量得到改善。

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