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    • 3. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US08324678B2
    • 2012-12-04
    • US12911380
    • 2010-10-25
    • Hiroyuki OgawaHideyuki KojimaTaiji Ema
    • Hiroyuki OgawaHideyuki KojimaTaiji Ema
    • H01L29/788
    • H01L27/105H01L27/11526H01L27/11531H01L27/11548
    • The method of manufacturing a semiconductor device, including a first region where a transistor including a gate electrode of a stacked structure is formed, a second region where a transistor including a gate electrode of a single-layer structure is formed, and a third region positioned in a boundary part between the first region and the second region, includes: depositing a first conductive film, patterning the first conductive film in the first region and the third region so that the outer edge is positioned in the third region, depositing the second conductive film, patterning the second conductive film to form a control gate in the first region while leaving the second conductive film, covering the second region and having the inner edge positioned inner of the outer edge of the first conductive film, and patterning the second conductive film in the second region to form the gate electrode.
    • 制造半导体器件的方法包括形成包括层叠结构的栅电极的晶体管的第一区域,形成包括单层结构的栅电极的晶体管的第二区域和位于 在第一区域和第二区域之间的边界部分中包括:沉积第一导电膜,使第一区域和第三区域中的第一导电膜图形化,使得外边缘位于第三区域中,沉积第二导电膜 膜,图案化第二导电膜,以在离开第二导电膜的同时在第一区域中形成控制栅极,覆盖第二区域并且使内边缘位于第一导电膜的外边缘的内侧,并且使第二导电膜 在第二区域中形成栅电极。
    • 4. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07977723B2
    • 2011-07-12
    • US12354575
    • 2009-01-15
    • Hiroyuki OgawaJun LinHideyuki Kojima
    • Hiroyuki OgawaJun LinHideyuki Kojima
    • H01L27/108H01L29/76H01L29/94H01L31/119
    • H01L21/763H01L21/823481H01L27/0629H01L27/10805H01L27/1085
    • A semiconductor device includes a semiconductor substrate, an active region formed in the semiconductor substrate and extending in a first direction, the active region including a transistor sub-region and a capacitor sub-region, a first trench extending around the transistor sub-region, an isolation layer disposed in the first trench, a second trench extending around the capacitor sub-region, a first transistor including a first insulating layer disposed on the transistor sub-region, the first transistor including a first conductive layer disposed on the first insulating layer, and a first capacitor including a second insulating layer extending over the capacitor sub-region and a sidewall of the second trench, the first capacitor including a second conductive layer disposed on the second insulating layer, the active region having an end portion in the first direction opposite to the transistor sub-region and extending across the first capacitor.
    • 半导体器件包括半导体衬底,形成在半导体衬底中并沿第一方向延伸的有源区,包括晶体管子区和电容器子区的有源区,围绕晶体管子区延伸的第一沟槽, 设置在所述第一沟槽中的隔离层,围绕所述电容器子区域延伸的第二沟槽,包括设置在所述晶体管子区域上的第一绝缘层的第一晶体管,所述第一晶体管包括设置在所述第一绝缘层上的第一导电层 以及包括在所述电容器子区域上延伸的第二绝缘层和所述第二沟槽的侧壁的第一电容器,所述第一电容器包括设置在所述第二绝缘层上的第二导电层,所述有源区域具有在所述第一绝缘层 方向与晶体管子区域相反并延伸穿过第一电容器。
    • 7. 发明授权
    • Semiconductor memory device and semiconductor device group
    • 半导体存储器件和半导体器件组
    • US07755928B2
    • 2010-07-13
    • US12320861
    • 2009-02-06
    • Toru AnezakiTomohiko TsutsumiTatsuji ArayaHideyuki KojimaTaiji Ema
    • Toru AnezakiTomohiko TsutsumiTatsuji ArayaHideyuki KojimaTaiji Ema
    • G11C11/00
    • H01L27/1104G11C5/063G11C11/412H01L27/11Y10S257/903
    • A semiconductor device includes a first CMOS inverter, a second CMOS inverter, a first transfer transistor and a second transfer transistor wherein the first and second transfer transistors are formed respectively in first and second device regions defined on a semiconductor device by a device isolation region so as to extend in parallel with each other, the first transfer transistor contacting with a first bit line at a first bit contact region on the first device region, the second transfer transistor contacting with a second bit line at a second bit contact region on the second device region, wherein the first bit contact region is formed in the first device region such that a center of said the bit contact region is offset toward the second device region, and wherein the second bit contact region is formed in the second device region such that a center of the second bit contact region is offset toward the first device region.
    • 半导体器件包括第一CMOS反相器,第二CMOS反相器,第一传输晶体管和第二传输晶体管,其中第一和第二传输晶体管分别形成在由器件隔离区限定在半导体器件上的第一和第二器件区域中, 为了彼此并联延伸,第一传输晶体管在第一器件区域上的第一位接触区域处与第一位线接触,第二传输晶体管在第二位线处与第二位线接触,第二位线在第二位接触区域处 器件区域,其中第一位接触区域形成在第一器件区域中,使得所述位接触区域的中心朝向第二器件区域偏移,并且其中第二位接触区域形成在第二器件区域中,使得 第二位接触区域的中心朝向第一器件区域偏移。
    • 8. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US07557004B2
    • 2009-07-07
    • US11594856
    • 2006-11-09
    • Hiroyuki OgawaHideyuki Kojima
    • Hiroyuki OgawaHideyuki Kojima
    • H01L21/336
    • H01L21/823462H01L21/823857H01L27/105H01L27/1052H01L27/11526H01L27/11546
    • The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20, a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 having a first to a third region; removing an insulating film 24, the conductive film 22 and an insulating film 20 formed in the second region and the third region; forming an insulating film 38 in the second region and the third region; removing the insulating film 24 in the first region and the insulating film 38 in the third region; forming an insulating film 44 in the third region; after a conductive film 52 has been formed, patterning the conductive films 22, 52 in the first region to form a gate electrode 58; and patterning the conductive film 52 to form gate electrodes 62 in the second region and the third region while removing the conductive film 52 over the gate electrode 58.
    • 制造半导体器件的方法包括以下步骤:在具有第一至第三区域的半导体衬底10上形成绝缘膜20,导电膜22和绝缘膜24; 去除绝缘膜24,导电膜22和形成在第二区域和第三区域中的绝缘膜20; 在第二区域和第三区域中形成绝缘膜38; 去除第一区域中的绝缘膜24和第三区域中的绝缘膜38; 在第三区域中形成绝缘膜44; 在形成导电膜52之后,在第一区域中图案化导电膜22,52以形成栅电极58; 以及图案化导电膜52以在第二区域和第三区域中形成栅极电极62,同时在栅极电极58上移除导电膜52。