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1. 发明授权

US08518795B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08518795B2
公开(公告)日：2013-08-27
申请号：US13455633
申请日：2012-04-25
申请人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
发明人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/1052 , H01L27/11521
摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.
摘要翻译：制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

2. 发明授权

US08460992B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08460992B2
公开(公告)日：2013-06-11
申请号：US13567294
申请日：2012-08-06
申请人： Toru Anezaki
发明人： Toru Anezaki
IPC分类号： H01L21/8238
CPC分类号： H01L21/823462 , H01L21/823418 , H01L21/823481 , H01L27/105 , H01L27/11526 , H01L27/11546
摘要： A method of manufacturing a semiconductor device comprises forming a first insulator in the first area of a substrate and a second insulator formed in a second area of the substrate; forming an etching preventing film extending over the first device region surrounded by the first area and the second device region surrounded by the second area removing the etching preventing film from the first device region and first area forming a first gate insulating film over the first device region while the second device region and the second area are covered by the etching preventing film; removing the etching preventing film over the second device region and the second area forming a second gate insulating film over the second device region; and forming a first gate electrode on the first gate insulating film and forming a second gate electrode on the second gate insulating film.
摘要翻译：制造半导体器件的方法包括在衬底的第一区域中形成第一绝缘体和形成在衬底的第二区域中的第二绝缘体; 在第一区域包围的第一器件区域和由第二区域包围的第二器件区域之间延伸的防蚀蚀膜从第一器件区域去除防蚀膜，以及在第一器件区域上形成第一栅极绝缘膜的第一区域而第二器件区域和第二区域被防蚀膜覆盖; 在所述第二器件区域上去除所述防蚀蚀膜，并且所述第二区域在所述第二器件区域上形成第二栅极绝缘膜; 以及在所述第一栅极绝缘膜上形成第一栅极，并在所述第二栅极绝缘膜上形成第二栅电极。

3. 发明授权

US08173514B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08173514B2
公开(公告)日：2012-05-08
申请号：US12369859
申请日：2009-02-12
申请人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
发明人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/1052 , H01L27/11521
摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.
摘要翻译：制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

4. 发明申请

US20110278659A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110278659A1
公开(公告)日：2011-11-17
申请号：US13179038
申请日：2011-07-08
申请人： Toru Anezaki
发明人： Toru Anezaki
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L21/823462 , H01L21/823418 , H01L21/823481 , H01L27/105 , H01L27/11526 , H01L27/11546
摘要： A method of manufacturing a semiconductor device includes forming an oxidation film over a first and a second device region, forming an first etching preventing film extending over a first and a second area, removing the first etching preventing film over the first area; removing the oxidation film over the first device region, forming a first gate insulating film over the first device region, removing the oxidation film over the second device region, forming a second gate insulating film over the second device region, forming a first gate electrode over the first gate insulating film, forming a second gate electrode over the second gate insulating film, forming first source and drain regions in the first device region at both sides of the first gate electrode, and forming second source and drain regions in the second device region at both sides of the second gate electrode.
摘要翻译：一种制造半导体器件的方法包括在第一和第二器件区域上形成氧化膜，形成在第一和第二区域上延伸的第一蚀刻防止膜，在第一区域上除去第一蚀刻防止膜; 在所述第一器件区域上去除所述氧化膜，在所述第一器件区域上形成第一栅极绝缘膜，在所述第二器件区域上除去所述氧化膜，在所述第二器件区域上形成第二栅极绝缘膜，所述第一栅极绝缘膜在所述第二栅极绝缘膜上形成第二栅电极，在所述第一栅电极的两侧的所述第一器件区域中形成第一源极和漏极区域，以及在所述第二器件区域中形成第二源极和漏极区域在第二栅电极的两侧。

5. 发明授权

US07508692B2 Semiconductor memory device and semiconductor device group 有权
公开(公告)号：US07508692B2
公开(公告)日：2009-03-24
申请号：US11802812
申请日：2007-05-25
申请人： Toru Anezaki , Tomohiko Tsutsumi , Tatsuji Araya , Hideyuki Kojima , Taiji Ema
发明人： Toru Anezaki , Tomohiko Tsutsumi , Tatsuji Araya , Hideyuki Kojima , Taiji Ema
IPC分类号： G11C5/06
CPC分类号： H01L27/1104 , G11C5/063 , G11C11/412 , H01L27/11 , Y10S257/903
摘要： A semiconductor device includes a first CMOS inverter, a second CMOS inverter, a first transfer transistor and a second transfer transistor wherein the first and second transfer transistors are formed respectively in first and second device regions defined on a semiconductor device by a device isolation region so as to extend in parallel with each other, the first transfer transistor contacting with a first bit line at a first bit contact region on the first device region, the second transfer transistor contacting with a second bit line at a second bit contact region on the second device region, wherein the first bit contact region is formed in the first device region such that a center of said the bit contact region is offset toward the second device region, and wherein the second bit contact region is formed in the second device region such that a center of the second bit contact region is offset toward the first device region.

6. 发明申请

US20080280406A1 Semiconductor device and its manufacturing method 有权
公开(公告)号：US20080280406A1
公开(公告)日：2008-11-13
申请号：US12219019
申请日：2008-07-15
申请人： Taiji Ema , Hideyuki Kojima , Toru Anezaki
发明人： Taiji Ema , Hideyuki Kojima , Toru Anezaki
IPC分类号： H01L21/8238 , H01L21/336
CPC分类号： H01L21/823857 , H01L21/823892 , H01L27/0629
摘要： A semiconductor device manufacturing method includes, forming isolation region having an aspect ratio of 1 or more in a semiconductor substrate, forming a gate insulating film, forming a silicon gate electrode and a silicon resistive element, forming side wall spacers on the gate electrode, heavily doping a first active region with phosphorus and a second active region and the resistive element with p-type impurities by ion implantation, forming salicide block at 500° C. or lower, depositing a metal layer covering the salicide block, and selectively forming metal silicide layers. The method may further includes, forming a thick and a thin gate insulating films, and performing implantation of ions of a first conductivity type not penetrating the thick gate insulating film and oblique implantation of ions of the opposite conductivity type penetrating also the thick gate insulating film before the formation of side wall spacers.

7. 发明申请

US20080237690A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080237690A1
公开(公告)日：2008-10-02
申请号：US12055708
申请日：2008-03-26
申请人： Toru ANEZAKI , Kenichi OKABE
发明人： Toru ANEZAKI , Kenichi OKABE
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11526 , H01L21/823814 , H01L27/105 , H01L27/11546
摘要： To provide a semiconductor device in which a high-performance and high-breakdown-voltage p-channel type MOS transistor having a surface channel structure and a memory cell are formed on the same substrate, and a method of manufacturing the semiconductor device. A method of manufacturing a semiconductor device including a stacked gate type nonvolatile memory cell and a p-channel type first transistor, includes: forming a gate insulating film of the first transistor on a semiconductor substrate; forming a tunnel insulating film of the stacked gate type nonvolatile memory cell on the semiconductor substrate; forming a first conductive layer containing an n-type impurity on the tunnel insulating film and the gate insulating film; and implanting p-type impurity ions to a region of the first conductive layer for forming the first transistor to turn the region of the first conductive layer into a p-type region.
摘要翻译：为了提供一种半导体器件，其中在相同的衬底上形成具有表面沟道结构和存储单元的高性能和高耐压P沟道型MOS晶体管及其制造方法。一种制造包括堆叠栅极型非易失性存储单元和p沟道型第一晶体管的半导体器件的方法，包括：在半导体衬底上形成第一晶体管的栅极绝缘膜; 在所述半导体衬底上形成所述层叠栅型非易失性存储单元的隧道绝缘膜; 在隧道绝缘膜和栅极绝缘膜上形成含有n型杂质的第一导电层; 以及将p型杂质离子注入到所述第一导电层的区域中以形成所述第一晶体管，以将所述第一导电层的区域转变为p型区域。

8. 发明申请

US20080142871A1 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US20080142871A1
公开(公告)日：2008-06-19
申请号：US12007420
申请日：2008-01-10
申请人： Toru Anezaki
发明人： Toru Anezaki
IPC分类号： H01L27/088
CPC分类号： H01L21/823462 , H01L21/2652 , H01L21/28273 , H01L21/28282 , H01L21/823456 , H01L21/823468 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11526 , H01L27/11546 , H01L27/11573 , H01L29/4983 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/66825 , H01L29/66833 , H01L29/7833 , H01L29/7881 , H01L29/792
摘要： A semiconductor device is provided which has insulating film side wall spacers having a barrier function. The semiconductor device comprises: a gate oxide film and a gate electrode formed on and above a semiconductor substrate; source/drain regions formed in the semiconductor substrate; and first laminated side wall spacers having two or more layers and formed on side walls of the gate electrode, the first laminated side wall spacers including a nitride film as a layer other than an outermost layer, the outermost layer being made of an oxide film or an oxynitride film and having a bottom surface contacting the semiconductor substrate, the gate oxide film or a side wall spacer layer other than the nitride film.
摘要翻译：提供了具有隔离功能的绝缘膜侧壁间隔物的半导体器件。半导体器件包括：栅极氧化膜和形成在半导体衬底上方的栅电极; 形成在半导体衬底中的源/漏区; 以及形成在所述栅电极的侧壁上的具有两层以上的层的第一层叠侧壁隔壁，所述第一层叠侧壁隔板包括作为除了最外层之外的层的氮化膜，所述最外层由氧化膜或氧氮化物膜，并且具有与半导体衬底，栅极氧化物膜或除了氮化物膜之外的侧壁间隔层接触的底表面。

9. 发明申请

US20080067599A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080067599A1
公开(公告)日：2008-03-20
申请号：US11944073
申请日：2007-11-21
申请人： Tomohiko TSUTSUMI , Taiji EMA , Hideyuki KOJIMA , Toru ANEZAKI
发明人： Tomohiko TSUTSUMI , Taiji EMA , Hideyuki KOJIMA , Toru ANEZAKI
IPC分类号： H01L23/62 , H01L21/336
CPC分类号： H01L27/0629 , H01L21/823814 , H01L21/823857 , H01L27/0266 , H01L27/105 , H01L27/11526 , H01L27/11546
摘要： The semiconductor device includes a first MIS transistor including a gate insulating film 92, a gate electrode 108 formed on the gate insulating film 92 and source/drain regions 154, a second MIS transistor including a gate insulating film 96 thicker than the gate insulating film 92, a gate electrode 108 formed on the gate insulating film 96, source/drain regions 154 and a ballast resistor 120 connected to one of the source/drain regions 154, a salicide block insulating film 146 formed on the ballast resistor 120 with an insulating film 92 thinner than the gate insulating film 96 interposed therebetween, and a silicide film 156 formed on the source/drain regions 154.
摘要翻译：半导体器件包括第一MIS晶体管，其包括栅极绝缘膜92，形成在栅极绝缘膜92和源极/漏极区154上的栅电极108，包括比栅极绝缘膜92厚的栅极绝缘膜96的第二MIS晶体管形成在栅极绝缘膜96上的栅极电极108，源极/漏极区域154以及连接到源极/漏极区域154之一的镇流电阻器120，在具有绝缘膜的镇流电阻器120上形成的自对准硅绝缘膜146 92，比其间的栅极绝缘膜96薄，以及形成在源极/漏极区154上的硅化物膜156。

10. 发明授权

US07323754B2 Semiconductor device and its manufacture method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US07323754B2
公开(公告)日：2008-01-29
申请号：US11168553
申请日：2005-06-29
申请人： Taiji Ema , Hideyuki Kojima , Toru Anezaki
发明人： Taiji Ema , Hideyuki Kojima , Toru Anezaki
IPC分类号： H01L29/76 , H01L29/94 , H01L31/00
CPC分类号： H01L21/823412 , H01L21/823456 , H01L21/823493 , H01L21/823807 , H01L21/823857 , H01L21/823878 , H01L21/823892
摘要： Multiple kinds of transistors exhibiting desired characteristics are manufactured in fewer processes. A semiconductor device includes an isolation region reaching a first depth, first and second wells of first conductivity type, a first transistor formed in the first well and having a gate insulating film of a first thickness, and a second transistor formed in the second well and having a gate insulating film of a second thickness less than the first thickness. The first well has a first impurity concentration distribution having an extremum maximum value only at the depth equal to or greater than the first depth. The second well has a second impurity concentration distribution which is superposition of the first impurity concentration distribution, and another impurity concentration distribution which shows an extremum maximum value at a second depth less than the first depth, the superposition shows also an extremum maximum value at the second depth.
摘要翻译：具有期望特性的多种晶体管以较少的工艺制造。半导体器件包括到达第一深度的隔离区域，第一导电类型的第一和第二阱，形成在第一阱中并具有第一厚度的栅极绝缘膜的第一晶体管，以及形成在第二阱中的第二晶体管，具有第二厚度小于第一厚度的栅极绝缘膜。第一阱具有仅在等于或大于第一深度的深度处具有极值最大值的第一杂质浓度分布。第二阱具有第二杂质浓度分布，其是第一杂质浓度分布的叠加，以及在比第一深度小的第二深度处显示极值最大值的另一杂质浓度分布，叠加还显示在第二深度

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