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1. 发明申请

US20110223774A1 REDUCED PATTERN LOADING USING BIS(DIETHYLAMINO)SILANE (C8H22N2Si) AS SILICON PRECURSOR 失效
标题翻译：使用BIS（二乙基氨基）硅烷（C8H22N2Si）作为硅前体的减少图案加载
公开(公告)号：US20110223774A1
公开(公告)日：2011-09-15
申请号：US12855877
申请日：2010-08-13
申请人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
发明人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
IPC分类号： H01L21/316
CPC分类号： H01L21/02219 , C23C16/401 , H01L21/02164 , H01L21/02271
摘要： Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
摘要翻译：本公开的方面涉及在图案化衬底上沉积电介质层的方法。在实施方案中，通过将BIS（二乙胺）硅烷（BDEAS），臭氧和分子氧流入处理室来沉积电介质层，使得跨越图案化的衬底表面实现相对均匀的电介质生长速率。根据实施例生长的电介质层的沉积可以减少对图案密度的依赖性，同时仍然适用于非牺牲应用。

2. 发明授权

US08236708B2 Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor 失效
标题翻译：使用双（二乙基氨基）硅烷（C 8 H 22 N 2 Si）作为硅前体的减少图案负载
公开(公告)号：US08236708B2
公开(公告)日：2012-08-07
申请号：US12855877
申请日：2010-08-13
申请人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
发明人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
IPC分类号： H01L21/316 , C23C16/40
CPC分类号： H01L21/02219 , C23C16/401 , H01L21/02164 , H01L21/02271
摘要： Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
摘要翻译：本公开的方面涉及在图案化衬底上沉积电介质层的方法。在实施方案中，通过将BIS（二乙胺）硅烷（BDEAS），臭氧和分子氧流入处理室来沉积电介质层，使得跨越图案化的衬底表面实现相对均匀的电介质生长速率。根据实施例生长的电介质层的沉积可以减少对图案密度的依赖性，同时仍然适用于非牺牲应用。

3. 发明授权

US07994019B1 Silicon-ozone CVD with reduced pattern loading using incubation period deposition 失效
标题翻译：硅 - 臭氧CVD，使用潜伏期沉积减少图案负载
公开(公告)号：US07994019B1
公开(公告)日：2011-08-09
申请号：US12891149
申请日：2010-09-27
申请人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
发明人： Sasha Kweskin , Paul Edward Gee , Shankar Venkataraman , Kedar Sapre
IPC分类号： H01L21/00
CPC分类号： H01L21/02164 , C23C16/401 , C23C16/45523 , H01L21/0228
摘要： Aspects of the disclosure pertain to methods of depositing conformal silicon oxide layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing a silicon-containing precursor and ozone into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface having heterogeneous materials and/or a heterogeneous pattern density distribution. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on underlying material and pattern density while still being suitable for non-sacrificial applications. Reduction in dependence on pattern density is achieved by terminating deposition near the end of an incubation period. Multiple deposition cycles may be conducted in series since the beneficial nature of the incubation period may repeat after a pause in deposition.
摘要翻译：本公开的方面涉及在图案化衬底上沉积保形氧化硅层的方法。在实施例中，通过将含硅前体和臭氧流入处理室来沉积电介质层，使得跨越具有异质材料的图案化衬底表面和/或异质图案密度分布实现相对均匀的介电生长速率。根据实施例生长的电介质层的沉积可以降低对下层材料和图案密度的依赖性，同时仍然适用于非牺牲应用。依靠图案密度的减少是通过在潜伏期结束时终止沉积来实现的。多个沉积循环可以串联进行，因为在沉积停顿之后潜伏期的有益特性可以重复。

4. 发明授权

US08759223B2 Double patterning etching process 有权
标题翻译：双图案蚀刻工艺
公开(公告)号：US08759223B2
公开(公告)日：2014-06-24
申请号：US13593412
申请日：2012-08-23
申请人： Kedar Sapre , Jing Tang , Ajay Bhatnagar , Nitin Ingle , Shankar Venkataraman
发明人： Kedar Sapre , Jing Tang , Ajay Bhatnagar , Nitin Ingle , Shankar Venkataraman
IPC分类号： H01L21/311 , H01L21/302 , H01L21/461
CPC分类号： H01L21/31144 , H01J37/32357 , H01J2237/334 , H01L21/0274 , H01L21/0337 , H01L21/3086 , H01L21/31116
摘要： A method of etching a substrate comprises forming on the substrate, a plurality of double patterning features composed of silicon oxide, silicon nitride, or silicon oxynitride. The substrate having the double patterning features is provided to a process zone. An etching gas comprising nitrogen tri-fluoride, ammonia and hydrogen is energized in a remote chamber. The energized etching gas is introduced into the process zone to etch the double patterning features to form a solid residue on the substrate. The solid residue is sublimated by heating the substrate to a temperature of at least about 100° C.
摘要翻译：蚀刻衬底的方法包括在衬底上形成由氧化硅，氮化硅或氮氧化硅组成的多个双重构图特征。具有双重图案化特征的基板被提供到处理区域。包括三氟化氮，氨和氢的蚀刻气体在远程室中通电。通电的蚀刻气体被引入到工艺区中以蚀刻双重图案化特征以在衬底上形成固体残余物。固体残余物通过将基底加热至至少约100℃的温度升华。

5. 发明授权

US08211808B2 Silicon-selective dry etch for carbon-containing films 有权
标题翻译：用于含碳膜的硅选择性干蚀刻
公开(公告)号：US08211808B2
公开(公告)日：2012-07-03
申请号：US12551180
申请日：2009-08-31
申请人： Kedar Sapre , Jing Tang , Linlin Wang , Abhijit Basu Mallick , Nitin Ingle
发明人： Kedar Sapre , Jing Tang , Linlin Wang , Abhijit Basu Mallick , Nitin Ingle
IPC分类号： H01L21/302
CPC分类号： H01L21/3065 , H01L21/31116
摘要： A method of etching silicon-and-carbon-containing material is described and includes a SiConi™ etch in combination with a flow of reactive oxygen. The reactive oxygen may be introduced before the SiConi™ etch reducing the carbon content in the near surface region and allowing the SiConi™ etch to proceed more rapidly. Alternatively, reactive oxygen may be introduced during the SiConi™ etch further improving the effective etch rate.
摘要翻译：描述了一种蚀刻含硅和碳的材料的方法，并且包括与活性氧气流组合的SiConi TM蚀刻。可以在SiConi™蚀刻之前引入活性氧，从而减少近表面区域的碳含量，并允许SiConi™蚀刻进行得更快。或者，可以在SiConi TM蚀刻期间引入活性氧，进一步提高有效蚀刻速率。

6. 发明授权

US07825038B2 Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen 有权
标题翻译：使用含硅前体和原子氧化学气相沉积高质量流动状二氧化硅
公开(公告)号：US07825038B2
公开(公告)日：2010-11-02
申请号：US11754440
申请日：2007-05-29
申请人： Nitin K. Ingle , Zheng Yuan , Paul Gee , Kedar Sapre
发明人： Nitin K. Ingle , Zheng Yuan , Paul Gee , Kedar Sapre
IPC分类号： H01L21/31
CPC分类号： C23C16/401 , C23C16/452 , C23C16/56 , H01L21/02164 , H01L21/02274 , H01L21/02337 , H01L21/31612
摘要： Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
摘要翻译：描述了在衬底上沉积氧化硅层的方法。所述方法可以包括以下步骤：向沉积室提供衬底，在沉积室外产生原子氧前体，以及将原子氧前体引入室中。所述方法还可以包括将硅前体引入沉积室，其中硅前体和原子氧前体首先在室中混合。硅前体和原子氧前体反应以在衬底上形成氧化硅层，并且沉积的氧化硅层可以退火。还描述了在衬底上沉积氧化硅层的系统。

7. 发明申请

US20080311753A1 OXYGEN SACVD TO FORM SACRIFICAL OXIDE LINERS IN SUBSTRATE GAPS 审中-公开
标题翻译：氧气SACVD在基板GA中形成氧化物衬里
公开(公告)号：US20080311753A1
公开(公告)日：2008-12-18
申请号：US12136931
申请日：2008-06-11
申请人： Yi Zheng , Sasha J. Kweskin , Kedar Sapre , Nitin K. Ingle , Zheng Yuan
发明人： Yi Zheng , Sasha J. Kweskin , Kedar Sapre , Nitin K. Ingle , Zheng Yuan
IPC分类号： H01L21/311
CPC分类号： H01L21/02126 , H01L21/02211 , H01L21/02216 , H01L21/02271 , H01L21/28132 , H01L21/3086 , H01L21/3088 , H01L21/3146 , H01L21/31604
摘要： A method of forming and removing a sacrificial oxide layer is described. The method includes forming a step on a substrate, where the step has a top and sidewalls. The method may also include forming the sacrificial oxide layer around the step by chemical vapor deposition of molecular oxygen and TEOS, where the oxide layer is formed on the top and sidewalls of the step. The method may also include removing a top portion of the oxide layer and the step; removing a portion of the substrate exposed by the removal of the step to form a etched substrate; and removing the entire sacrificial oxide layer from the etched substrate.
摘要翻译：描述了形成和去除牺牲氧化物层的方法。该方法包括在衬底上形成台阶，其中台阶具有顶部和侧壁。该方法还可以包括通过分子氧和TEOS的化学气相沉积在步骤周围形成牺牲氧化物层，其中氧化物层形成在台阶的顶部和侧壁上。该方法还可以包括去除氧化物层的顶部和步骤; 通过去除步骤去除暴露的基板的一部分以形成蚀刻的基板; 并从蚀刻的衬底去除整个牺牲氧化物层。

8. 发明申请

US20070281496A1 CHEMICAL VAPOR DEPOSITION OF HIGH QUALITY FLOW-LIKE SILICON DIOXIDE USING A SILICON CONTAINING PRECURSOR AND ATOMIC OXYGEN 有权
标题翻译：使用含硅前体和原子氧的高品质流动二氧化硅的化学气相沉积
公开(公告)号：US20070281496A1
公开(公告)日：2007-12-06
申请号：US11754440
申请日：2007-05-29
申请人： Nitin Ingle , Zheng Yuan , Paul Gee , Kedar Sapre
发明人： Nitin Ingle , Zheng Yuan , Paul Gee , Kedar Sapre
IPC分类号： H01L21/31
CPC分类号： C23C16/401 , C23C16/452 , C23C16/56 , H01L21/02164 , H01L21/02274 , H01L21/02337 , H01L21/31612
摘要： Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
摘要翻译：描述了在衬底上沉积氧化硅层的方法。所述方法可以包括以下步骤：向沉积室提供衬底，在沉积室外产生原子氧前体，以及将原子氧前体引入室中。所述方法还可以包括将硅前体引入沉积室，其中硅前体和原子氧前体首先在室中混合。硅前体和原子氧前体反应以在衬底上形成氧化硅层，并且沉积的氧化硅层可以退火。还描述了在衬底上沉积氧化硅层的系统。

9. 发明授权

US08617989B2 Liner property improvement 失效
标题翻译：班轮物业改善
公开(公告)号：US08617989B2
公开(公告)日：2013-12-31
申请号：US13451207
申请日：2012-04-19
申请人： Kedar Sapre , Manuel Hernandez , Lei Luo
发明人： Kedar Sapre , Manuel Hernandez , Lei Luo
IPC分类号： H01L21/316 , H01L23/538
CPC分类号： H01L21/768 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a dielectric liner layer on a semiconductor substrate are described. The method may include flowing a phosphorus-containing precursor with a silicon-containing precursor and an oxygen-containing precursor over the substrate to deposit a dielectric material. The dielectric material may be deposited along a field region and within at least one via on the substrate having a depth of at least 1 μm. The method may also include forming a liner layer within the via with the dielectric material. The liner may include a silicon oxide doped with phosphorus, and the thickness of the liner layer at an upper portion of the via sidewall may be less than about 5 times the thickness of the liner layer at a lower portion of the via sidewall.
摘要翻译：描述在半导体衬底上形成电介质衬垫层的方法。该方法可以包括使含磷前体和含氧前体在衬底上流动以沉积介电材料。电介质材料可以沿着场区域并且在至少一个具有至少1um的深度的衬底上的至少一个通孔内沉积。该方法还可以包括在电介质材料的通路内形成衬里层。衬垫可以包括掺杂有磷的氧化硅，并且通孔侧壁的上部处的衬垫层的厚度可以小于通孔侧壁的下部处的衬垫层的厚度的约5倍。

10. 发明授权

US08404583B2 Conformality of oxide layers along sidewalls of deep vias 有权
标题翻译：深层通孔侧壁氧化层的一致性
公开(公告)号：US08404583B2
公开(公告)日：2013-03-26
申请号：US13035034
申请日：2011-02-25
申请人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
发明人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
IPC分类号： H01L21/44 , H01L21/31 , H01L21/469
CPC分类号： H01L21/76898
摘要： A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
摘要翻译：在半导体衬底中的通孔侧壁改善氧化物层的保形性的方法包括在半导体衬底的上表面上形成氮化物层，并形成延伸穿过氮化物层并进入半导体衬底的通孔。通孔可以具有距离氮化物层的顶表面至少约50μm的深度和在氮化物层的顶表面处的小于约10μm的开口。该方法还包括在氮化物层上并沿着通孔的侧壁和底部形成氧化物层。可以在小于约450℃的温度下使用热化学气相沉积（CVD）工艺形成氧化物层，其中通孔底部的氧化物层的厚度为厚度的至少约50％在氮化物层的顶表面处的氧化物层。

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