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1. 发明授权

US07669164B1 Hardware and software implementation of an electronic design in a programmable logic device 有权
标题翻译：在可编程逻辑器件中的电子设计的硬件和软件实现
公开(公告)号：US07669164B1
公开(公告)日：2010-02-23
申请号：US11732611
申请日：2007-04-04
申请人： Haibing Ma , Roger B. Milne
发明人： Haibing Ma , Roger B. Milne
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： Implementing an electronic design having software-implemented blocks and hardware-implemented blocks. A specification of the electronic design is created in response to selection of blocks from a library, and at least one of the blocks is available for implementation in a selectable one of a software implementation for an embedded processor on a programmable logic device (PLD) and a hardware implementation on the PLD. A specification of each block in a first subset is obtained from the library and translated into an execution function of the software implementation of the block. Peripheral functions are generated for connections between blocks in the first subset and blocks in a second subset, which are designated for a hardware implementation on the PLD. A program is generated that invokes each peripheral function and each execution function in an order determined from the interconnections between the blocks.
摘要翻译：实施具有软件实现的块和硬件实现的块的电子设计。响应于来自库的块的选择创建电子设计的规范，并且至少一个块可用于在可编程逻辑器件（PLD）上的嵌入式处理器的软件实现中的可选择的一个中实现，并且 PLD上的硬件实现。从库中获得第一子集中的每个块的规范，并将其转换为块的软件实现的执行功能。为第一子集中的块和第二子集中的块之间的连接生成外围功能，其被指定用于PLD上的硬件实现。生成以从块之间的互连确定的顺序调用每个外围功能和每个执行功能的程序。

2. 发明授权

US07203632B2 HDL co-simulation in a high-level modeling system 有权
标题翻译： HDL在高级建模系统中的共模拟
公开(公告)号：US07203632B2
公开(公告)日：2007-04-10
申请号：US10389161
申请日：2003-03-14
申请人： Roger B. Milne , L. James Hwang , Jeffrey D. Stroomer , Nabeel Shirazi , Haibing Ma , Jonathan B. Ballagh
发明人： Roger B. Milne , L. James Hwang , Jeffrey D. Stroomer , Nabeel Shirazi , Haibing Ma , Jonathan B. Ballagh
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/86
摘要： Method and apparatus for simulating operations of a circuit design that includes high-level components and HDL components. The high-level components of the design are simulated in a high-level modeling system (HLMS), and the HDL components of the design are simulated with an HDL simulator. Data values are converted from a data type of the HLMS to a logic vector compatible with the HDL simulator for each data value to be input to the HDL simulator, and a logic vector is converted from the HDL simulator to a data value of a data type compatible with the HLMS for each logic vector output from the HDL simulator. Events are scheduled for input to the HDL simulator as a function of the time of HLMS events and a maximum response time of the HDL components.
摘要翻译：用于模拟包括高级组件和HDL组件的电路设计操作的方法和装置。设计的高级组件在高级建模系统（HLMS）中进行模拟，并且使用HDL模拟器来模拟设计的HDL组件。将数据值从HLMS的数据类型转换为与HDL模拟器兼容的逻辑向量，以将每个数据值输入到HDL模拟器，并且将逻辑向量从HDL模拟器转换为数据类型的数据值与HDL模拟器的每个逻辑矢量输出的HLMS兼容。根据HLMS事件的时间和HDL组件的最大响应时间，事件被安排输入到HDL模拟器。

3. 发明授权

US07620942B1 Method and system for parameterization of imperative-language functions intended as hardware generators 有权
标题翻译：用于硬件发生器的命令式语言功能的参数化方法和系统
公开(公告)号：US07620942B1
公开(公告)日：2009-11-17
申请号：US10850176
申请日：2004-05-20
申请人： Haibing Ma , Roger B. Milne
发明人： Haibing Ma , Roger B. Milne
IPC分类号： G06F9/45
CPC分类号： G06F8/41 , G06F17/505 , G06F17/5054
摘要： A method (100) of translating an imperative language function into a parameterized hardware component can include the steps of using (102) formal imperative function arguments to represent at least one among a component input port and a component parameter and distinguishing (104) between formal imperative function arguments intended as component parameters from formal imperative function arguments intended as component input ports. The method can generate (106) hardware description by providing a framework where imperative language functions can be translated into hardware components by being instantiated, combined and simulated. Arbitrary code can be associated (108) to a function-importing block as parameterization code and enabling an assignment of arbitrary code to actual imperative function arguments. The arbitrary code can be executed (110) in an interpreter that analyzes assigned variables by name and compares variable names with the formal argument identifiers in an imported function.
摘要翻译：将命令式语言功能转换为参数化的硬件组件的方法（100）可以包括以下步骤：使用（102）形式命令式函数参数来表示组件输入端口和组件参数中的至少一个，并区分（104）正式命令式功能参数旨在作为组件输入端口的正式命令式函数参数的组件参数。该方法可以通过提供框架来生成（106）硬件描述，其中命令式语言功能可以通过实例化，组合和模拟来转换成硬件组件。任意代码可以与函数导入块（108）相关联（108）作为参数化代码，并允许将任意代码分配给实际的命令式函数参数。可以在解析器中执行任意代码（110），该解释器通过名称分析分配的变量，并将变量名称与导入函数中的形式参数标识符进行比较。

4. 发明授权

US07194705B1 Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions 有权
标题翻译：在使用硬件描述语言电路描述的高级建模系统中对集成电路进行仿真
公开(公告)号：US07194705B1
公开(公告)日：2007-03-20
申请号：US10388692
申请日：2003-03-14
申请人： Kumar Deepak , L. James Hwang , Singh Vinay Jitendra , Haibing Ma , Roger B. Milne , Nabeel Shirazi , Jeffrey D. Stroomer , Jimmy Zhenming Wang
发明人： Kumar Deepak , L. James Hwang , Singh Vinay Jitendra , Haibing Ma , Roger B. Milne , Nabeel Shirazi , Jeffrey D. Stroomer , Jimmy Zhenming Wang
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： Method, apparatus, and computer readable medium for simulating an integrated circuit within a modeling system using one or more circuit description language representations of circuitry is described. By example, a circuit description language representation of the one or more circuit description language representations of circuitry is translated into a program language circuit description. A first simulation process is executed and input data is obtained therefrom. A second simulation process is executed with the input data as parametric input to produce output data, the second simulation process being derived from the program language circuit description. The output data produce by the second simulation process is provided to the first simulation process.
摘要翻译：描述了使用电路的一个或多个电路描述语言表示来模拟建模系统内的集成电路的方法，装置和计算机可读介质。例如，电路的一个或多个电路描述语言表示的电路描述语言表示被转换成程序语言电路描述。执行第一模拟处理并从其获得输入数据。以输入数据作为参数输入来执行第二模拟处理以产生输出数据，第二模拟处理从程序语言电路描述导出。通过第二次模拟处理产生的输出数据被提供给第一个仿真过程。

5. 发明授权

US07086030B1 Incremental netlisting 有权
标题翻译：增量网页列表
公开(公告)号：US07086030B1
公开(公告)日：2006-08-01
申请号：US10633830
申请日：2003-08-04
申请人： Jeffrey D. Stroomer , Roger B. Milne , Haibing Ma , Jonathan B. Ballagh
发明人： Jeffrey D. Stroomer , Roger B. Milne , Haibing Ma , Jonathan B. Ballagh
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F2217/86
摘要： Method and apparatus for preparing a design in a high-level modeling system. Hardware description language (HDL) code is generated for one or more of a plurality of high-level subsystems in a high-level design tagged by the user for HDL code generation. Previously generated HDL code may be reused instead of generating new HDL code for each subsystem tagged by the user for HDL code reuse.
摘要翻译：用于在高级建模系统中准备设计的方法和装置。为由HDL代码生成用户标记的高级设计中的多个高级子系统中的一个或多个生成硬件描述语言（HDL）代码。以前生成的HDL代码可以被重用，而不是为用户为HDL代码重用标记的每个子系统生成新的HDL代码。

6. 发明授权

US07895584B1 Translation of a program in a dynamically-typed language to a program in a hardware description language 有权
标题翻译：以动态类型语言将程序翻译成硬件描述语言的程序
公开(公告)号：US07895584B1
公开(公告)日：2011-02-22
申请号：US10389368
申请日：2003-03-14
申请人： Haibing Ma , L. James Hwang , Jeffrey D. Stroomer , Roger B. Milne
发明人： Haibing Ma , L. James Hwang , Jeffrey D. Stroomer , Roger B. Milne
IPC分类号： G06F9/45
CPC分类号： G06F8/447 , G06F17/5045
摘要： Method and apparatus for translating a first program in a dynamically-typed language to a program in a hardware description language. From the dynamically-typed-language first program, a second program in single static assignment format is generated. For cases where a variable is assigned different data types at different places in the program, the assignments of the different data types are resolved for the variable. The second program is then translated to a program in the hardware description language.
摘要翻译：用于以动态类型语言将第一程序翻译成硬件描述语言的程序的方法和装置。从动态类型语言的第一个程序，生成单个静态赋值格式的第二个程序。对于在程序中不同位置分配了不同数据类型的变量的情况，可以为变量解析不同数据类型的分配。然后将第二个程序转换为硬件描述语言的程序。

7. 发明授权

US07395521B1 Method and apparatus for translating an imperative programming language description of a circuit into a hardware description 有权
标题翻译：将电路的命令式编程语言描述转换成硬件描述的方法和装置
公开(公告)号：US07395521B1
公开(公告)日：2008-07-01
申请号：US11250942
申请日：2005-10-14
申请人： Haibing Ma , Roger B. Milne
发明人： Haibing Ma , Roger B. Milne
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： Method and apparatus for translating an imperative programming language description of a circuit into a hardware description is described. In one example, a state object in a function of the imperative programming language description is identified. Use of the state object in the function is compared against criteria associated with each of a plurality of hardware objects. The state object is mapped to a hardware object of the plurality of hardware objects such that the use of the state object in the function satisfies the criteria of the hardware object. At least one instance of the hardware object is generated in the hardware description.
摘要翻译：描述了将电路的命令式编程语言描述转换成硬件描述的方法和装置。在一个示例中，识别了命令式编程语言描述的功能中的状态对象。将功能中的状态对象的使用与与多个硬件对象中的每一个相关联的标准进行比较。状态对象被映射到多个硬件对象的硬件对象，使得该功能中的状态对象的使用满足硬件对象的标准。在硬件描述中生成硬件对象的至少一个实例。

8. 发明授权

US07725869B1 Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description 有权
标题翻译：用于使用命令式编程语言描述来对电子电路的多个实例进行建模的方法和装置
公开(公告)号：US07725869B1
公开(公告)日：2010-05-25
申请号：US11101075
申请日：2005-04-07
申请人： Roger B. Milne , Haibing Ma
发明人： Roger B. Milne , Haibing Ma
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description is described. In one example, a program is defined using an imperative programming language. The program includes multiple calls to a function. The function includes a persistent variable associated with an internal state of the electronic circuit. The function is configured to initialize the persistent variable based on at least one call path to the function in the program.
摘要翻译：描述了使用命令式编程语言描述来对电子电路的多个实例进行建模的方法和装置。在一个示例中，使用命令式编程语言来定义程序。该程序包括对一个功能的多次调用。该功能包括与电子电路的内部状态相关联的持久变量。该功能被配置为基于程序中功能的至少一个调用路径来初始化持久变量。

9. 发明授权

US07003751B1 Specification of the hierarchy, connectivity, and graphical representation of a circuit design 有权
标题翻译：电路设计的层次结构，连接性和图形表示的规范
公开(公告)号：US07003751B1
公开(公告)日：2006-02-21
申请号：US10340498
申请日：2003-01-10
申请人： Jeffrey D. Stroomer , Roger B. Milne , Jonathan B. Ballagh , Haibing Ma , L. James Hwang , Nabeel Shirazi
发明人： Jeffrey D. Stroomer , Roger B. Milne , Jonathan B. Ballagh , Haibing Ma , L. James Hwang , Nabeel Shirazi
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Method and apparatus for creating a circuit design. An object-oriented program instantiates a plurality of objects that model a circuit design. The objects have hierarchy attributes, connectivity attributes, and display attributes that describe a plurality of modules. The hierarchy attributes define parent-child relationships between modules, the connectivity attributes define input-output connections between modules, and the display attributes define a layout of the modules for viewing. Each of the objects has an associated method for generating a design specification in a selected format. When the program is executed, the design specification is generated from the set of objects. Depending on the capabilities of the available tools, the modules and logic elements are displayed in accordance with the display attributes either from the object-oriented program or from the design specification.
摘要翻译：用于创建电路设计的方法和装置。面向对象的程序实例化建模电路设计的多个对象。对象具有描述多个模块的层次属性，连接属性和显示属性。层次结构属性定义模块之间的父子关系，连接属性定义模块之间的输入输出连接，显示属性定义模块的布局以供查看。每个对象具有用于以所选格式生成设计规范的关联方法。当执行程序时，设计规范是从对象集合生成的。根据可用工具的功能，根据面向对象程序或设计规范的显示属性显示模块和逻辑元素。

10. 发明授权

US08079013B1 Hardware description interface for a high-level modeling system 有权
标题翻译：高级建模系统的硬件描述界面
公开(公告)号：US08079013B1
公开(公告)日：2011-12-13
申请号：US12340473
申请日：2008-12-19
申请人： Haibing Ma , Jingzhao Ou
发明人： Haibing Ma , Jingzhao Ou
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： A computer-implemented method of specifying a circuit design within a high-level modeling system (HLMS) can include, responsive to a scripted user input, instantiating a first and a second block objects within a hardware description interface (HDI) that is communicatively linked with the HLMS and, responsive to instantiating the first and second block objects, creating and displaying, within the HLMS, first and second modeling blocks representing the first and second xBlock objects respectively. Responsive to instantiating, within the HDI, a signal object bound to an output port of the first block object and an input port of the second block object, a modeling line can be created and displayed within the HLMS visually linking an output of the first modeling block with an input of the second modeling block. The first modeling block, second modeling block, and modeling line can be stored as a description of the circuit design.
摘要翻译：在高级建模系统（HLMS）中指定电路设计的计算机实现的方法可以包括响应于脚本化的用户输入，在通信地链接的硬件描述接口（HDI）内实例化第一和第二块对象并且响应于实例化第一和第二块对象，分别在HLMS内创建和显示表示第一和第二xBlock对象的第一和第二建模块。响应于在HDI内实例化绑定到第一块对象的输出端口的信号对象和第二块对象的输入端口，可以在HLMS内创建和显示建模线，以在视觉上连接第一建模的输出块与第二建模块的输入。第一建模块，第二建模块和建模线可以存储为电路设计的描述。

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