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    • 2. 发明申请
    • Method of fabricating ridge type waveguide integrated semiconductor optical device
    • 脊型波导集成半导体光器件的制造方法
    • US20060104583A1
    • 2006-05-18
    • US11122998
    • 2005-05-06
    • Jong KimHyun KimKang KimOh KwonEun SimKwang Oh
    • Jong KimHyun KimKang KimOh KwonEun SimKwang Oh
    • G02B6/10
    • G02B6/136G02B6/122G02B2006/12097
    • Provided is a method of fabricating a ridge type waveguide integrated semiconductor optical device. The method includes: separating a substrate into an active waveguide region and a passive waveguide region and selectively epitaxial-growing an active layer and a passive layer in the active waveguide region and the passive waveguide region, respectively, such that the active layer and the passive layer are vertically aligned with each other; sequentially forming a capping layer and an electrode connection layer on the active layer and the passive layer; forming a first insulating layer pattern on a predetermined region of the electrode connection layer disposed in the active waveguide region and simultaneously, forming a second insulating layer pattern on a predetermined region of the electrode connection layer disposed in the passive waveguide region; forming a shallow ridge type active waveguide and a shallow ridge type passive waveguide by performing an etching process using the first and second insulating layer patterns as etch masks until the capping layer is etched to a predetermined depth; and forming a passivation pattern on the entire surface of the shallow ridge type active waveguide and forming a deep ridge type passive waveguide by performing an etching process using the second insulating layer pattern as an etch mask until the substrate is etched to a predetermined depth.
    • 提供了一种制造脊型波导集成半导体光学器件的方法。 该方法包括:将衬底分离成有源波导区域和无源波导区域,并分别在有源波导区域和无源波导区域中选择性地外延生长有源层和无源层,使得有源层和被动 层彼此垂直对准; 在有源层和被动层上依次形成覆盖层和电极连接层; 在设置在有源波导区域中的电极连接层的预定区域上形成第一绝缘层图案,并同时在布置在无源波导区域中的电极连接层的预定区域上形成第二绝缘层图案; 通过使用第一和第二绝缘层图案作为蚀刻掩模进行蚀刻处理,直到将覆盖层蚀刻到预定深度来形成浅脊型有源波导和浅脊型无源波导; 并且在浅脊型有源波导的整个表面上形成钝化图案,并通过使用第二绝缘层图案作为蚀刻掩模进行蚀刻处理形成深脊型无源波导,直到基板被蚀刻到预定深度。
    • 4. 发明申请
    • Tunable external cavity laser diode using variable optical deflector
    • 可调谐外腔激光二极管使用可变光学偏转器
    • US20060029119A1
    • 2006-02-09
    • US11029784
    • 2004-12-21
    • Kwang OhOh KwonKang KimJong KimHyun Kim
    • Kwang OhOh KwonKang KimJong KimHyun Kim
    • H01S3/08
    • H01S5/141G02B6/29308G02B6/2931G02B6/29313H01S5/005H01S5/026H01S5/101H01S5/143
    • Provided is a tunable external cavity laser diode using a variable optical deflector wherein the variable optical deflector, in which a refractive index varies according to an electrical signal, is arranged in a triangular shape between a concave diffraction grating and a reflective mirror. Since a resonant frequency is changed using the electrical signal rather than the mechanical movement, the stable operation and continuous high-speed tenability may be enabled. In addition, when the tunable external cavity laser diode according to the present invention is implemented in an InP/InGaAsP/InP slab waveguide, a variable time determined by the carrier lifetime may be reduced to several nanoseconds or less, the miniaturization is enabled, and the manufacturing costs are significantly reduced due to the process simplification. Moreover, when the concave diffraction grating is designed based on a silica (or polymer) based slab waveguide, the fabrication may be performed even by a lithography process having low resolution, thereby enhancing reproducibility and uniformity of the diffraction grating, and accordingly reducing the manufacturing costs.
    • 提供了一种可调谐的外腔激光二极管,其使用可变光学偏转器,其中折射率根据电信号变化的可变光学偏转器在凹面衍射光栅和反射镜之间布置成三角形。 由于使用电信号而不是机械运动来改变谐振频率,因此可以实现稳定的运行和连续的高速可靠性。 此外,当根据本发明的可调谐外腔激光二极管在InP / InGaAsP / InP平板波导中实现时,由载流子寿命确定的可变时间可以减少到几纳秒或更小,可实现小型化,并且 由于过程简化,制造成本显着降低。 此外,当基于基于二氧化硅(或聚合物)的平板波导设计凹面衍射光栅时,即使通过具有低分辨率的光刻工艺也可以进行制造,从而提高衍射光栅的再现性和均匀性,并因此降低制造 费用
    • 8. 发明授权
    • Strut clamp
    • 支架夹
    • US08979038B1
    • 2015-03-17
    • US13692953
    • 2012-12-03
    • Kwang Oh
    • Kwang Oh
    • F16L3/10F16L3/24
    • F16L3/24F16L3/00F16L3/04F16L3/10F16L3/12F16L3/14F16L3/22
    • A method for applying a clamp for a construction strut that allows a pipe to be clamped to the construction strut in which the clamp has a fastener that is not exposed above the clamp curvature and in which the fastener head is easily accessible. Also the clamp has a retaining tab and a neck portion such that it can be installed by straight-in insertion at the top of a construction strut. Also, the method has an embodiment in that the clamp can be installed either on the open side of the construction strut or on the closed side using slots in the closed side by straight-in passing the retaining tab past the inturned flanges on the top of the construction strut and by a rotation at the bottom of the construction strut.
    • 一种用于施加用于构造支柱的夹具的方法,其允许管被夹紧到构造支柱上,其中夹具具有不暴露在夹具曲率之上的紧固件,并且紧固件头部容易接近。 此外,夹具具有保持片和颈部,使得其可以通过直接插入在构造支柱的顶部而被安装。 此外,该方法具有一个实施例,其中夹具可以安装在施工支柱的开放侧或封闭侧,使用在封闭侧的槽,通过直线穿过保持片穿过位于 施工支柱和施工支柱底部的旋转。
    • 10. 发明申请
    • Charge balance insulated gate bipolar transistor
    • 电荷平衡绝缘栅双极晶体管
    • US20070181927A1
    • 2007-08-09
    • US11408812
    • 2006-04-21
    • Joseph YedinakKwang OhChongman YunJae Lee
    • Joseph YedinakKwang OhChongman YunJae Lee
    • H01L29/94
    • H01L29/7395H01L29/0634H01L29/0696H01L29/0834H01L29/1095H01L29/7397
    • An IGBT includes a first silicon region over a collector region, and a plurality of pillars of first and second conductivity types arranged in an alternating manner over the first silicon region. The IGBT further includes a plurality of well regions each extending over and being in electrical contact with one of the pillars of the first conductivity type, and a plurality of gate electrodes each extending over a portion of a corresponding well region. The physical dimensions of each of the first and second conductivity type pillars and the doping concentration of charge carriers in each of the first and second conductivity type pillars are selected so as to create a charge imbalance between a net charge in each pillar of first conductivity and a net charge in its adjacent pillar of the second conductivity type.
    • IGBT包括在集电极区域上的第一硅区域和在第一硅区域上以交替方式布置的多个第一和第二导电类型的柱。 IGBT进一步包括多个阱区,每个阱区延伸并且与第一导电类型的一个柱中的一个电接触,并且多个栅电极各自延伸在对应的阱区的一部分上。 选择第一和第二导电型柱中的每一个的物理尺寸和第一和第二导电类型柱中的每一个中的载流子的掺杂浓度,以便在第一导电性的每个支柱中的净电荷和 其第二导电类型的相邻支柱中的净电荷。