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    • 3. 发明申请
    • COMPRESSION-TYPE WASTEBASKET
    • 压缩式垃圾箱
    • US20130087055A1
    • 2013-04-11
    • US13678828
    • 2012-11-16
    • Il Kang Kim
    • Il Kang Kim
    • B65F1/14B65F1/06
    • B65F1/1405B30B9/3021B30B9/3042B65F1/06B65F1/10B65F1/1415Y10S220/908
    • A compression-type wastebasket includes: a body which has an opened upper part and a space formed therein in order to accommodate a garbage bag; a body cover which is configured to cover the upper part of the body, wherein an opening unit for connecting the inside and the outside of the body is formed on the central part thereof, a bag fixing unit is formed along the outer girth of the opening unit to fix the girth of an inlet end portion of the garbage bag, and a gripping unit is formed on a part of the opening unit; and a compression means which has a compression surface capable of entering the opening unit in order to compress the waste contained within the body, and is configured to be gripped on the gripping unit while rotating at a predetermined angle on the basis of a compression direction in the opening unit.
    • 压缩式废纸篓包括:主体,其具有敞开的上部和形成在其中的空间,以容纳垃圾袋; 被构造成覆盖所述主体的上部的主体盖,其中,在所述主体的中央部形成有用于连接所述主体的内部和外部的打开单元,沿着所述开口的外周形成袋固定单元 单元,固定垃圾袋的入口端部的周长,并且在打开单元的一部分上形成夹持单元; 以及压缩装置,其具有能够进入打开单元的压缩表面,以便压缩容纳在主体内的废物,并且构造成在基于压缩方向以预定角度旋转的同时被夹持在夹持单元上 开放单位。
    • 7. 发明申请
    • Delay line circuit
    • 延迟线电路
    • US20070183227A1
    • 2007-08-09
    • US11349397
    • 2006-02-06
    • Kang KimJongtae Kwak
    • Kang KimJongtae Kwak
    • G11C7/00
    • G11C7/22G11C7/222
    • Methods, circuits, devices, and systems are provided, including a delay line for a delay-locked loop. One method includes providing a reference clock to a first delay unit in a delay line. The delay line includes a number of delay units coupled together. Even delay units, among the delay units, are coupled to an even clock line to generate a first intermediate clock. Odd delay units are coupled to an odd clock line to generate a second intermediate clock. The even and odd delay units are configured to in a manner intended to restrict an increase in drive to load ratio and to intrinsic delay as additional delay units are coupled to the number of delay units.
    • 提供了方法,电路,设备和系统,包括用于延迟锁定环路的延迟线。 一种方法包括向延迟线中的第一延迟单元提供参考时钟。 延迟线包括耦合在一起的多个延迟单元。 延迟单元中的偶数延迟单元耦合到偶数时钟线以产生第一中间时钟。 奇数延迟单元耦合到奇数时钟线,以产生第二中间时钟。 偶数和奇数延迟单元被配置为以附加延迟单元耦合到延迟单元的数量来限制驱动负载比的增加和固有延迟。