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1. 发明公开

KR20200128365A 통로 구조체 审中-公开
公开(公告)号：KR20200128365A
公开(公告)日：2020-11-12
申请号：KR20200053084
申请日：2020-05-04
申请人： JANG EUN SIM
发明人： JANG EUN SIM
IPC分类号： A01G27/00 , A01G9/02 , A01G9/04 , A01G25/02
摘要： 본발명은물질이일단에서타단에서이동하는간선통로; 및상기물질이상기간선통로에서개별대상체로이동하거나상기물질이상기개별대상체에서상기간선통로로이동하는지선통로;를포함하되, 상기간선통로는다른통로구조체의간선통로로부터또는상기다른통로구조체의간선통로로상기물질이이동할수 있게배치됨으로써, 하나이상의통로구조체의전체간선통로를형성하며, 상기전체간선통로는하나이상의상류단및 하나이상의하류단이있도록배치되어, 상기물질이상기하나이상의상류단에서상기하나이상의하류단으로이동하는통로구조체를제공한다.

2. 发明公开

KR20180052102A 물질 수거 또는 누적을 위한 용기 审中-公开
公开(公告)号：KR20180052102A
公开(公告)日：2018-05-17
申请号：KR20170148393
申请日：2017-11-09
申请人： JANG EUN SIM
发明人： JANG EUN SIM
IPC分类号： E03C1/264
摘要： 본발명은내용물을외부공간과차단하는외부뚜껑및 상기내용물을내부공간과차단하는내부뚜껑을포함하되, 상기내부뚜껑은수직위치가변경되는것인용기를제공한다.

3. 发明授权

US09895193B2 Steerable electrode catheter assembly 有权
公开(公告)号：US09895193B2
公开(公告)日：2018-02-20
申请号：US14334663
申请日：2014-07-17
申请人： Sung Eun Sim , Mun Gi Hong
发明人： Sung Eun Sim , Mun Gi Hong
IPC分类号： A61B18/12 , A61B18/14 , A61B18/00
CPC分类号： A61B18/1492 , A61B2018/00952 , A61B2018/1475
摘要： Provided is a steerable electrode catheter assembly capable of easily contacting an affected part of a patient when performing an operation on a human body while adjusting a direction of the electrode catheter assembly. In detail, provided is a steerable electrode catheter assembly whereby a length by which a catheter is inserted into an affect part of a patient during an operation on a human body may be easily adjusted and also an angle of a tip portion of the catheter may be easily adjusted by a user.

4. 发明申请

US20060104583A1 Method of fabricating ridge type waveguide integrated semiconductor optical device 审中-公开
标题翻译：脊型波导集成半导体光器件的制造方法
公开(公告)号：US20060104583A1
公开(公告)日：2006-05-18
申请号：US11122998
申请日：2005-05-06
申请人： Jong Kim , Hyun Kim , Kang Kim , Oh Kwon , Eun Sim , Kwang Oh
发明人： Jong Kim , Hyun Kim , Kang Kim , Oh Kwon , Eun Sim , Kwang Oh
IPC分类号： G02B6/10
CPC分类号： G02B6/136 , G02B6/122 , G02B2006/12097
摘要： Provided is a method of fabricating a ridge type waveguide integrated semiconductor optical device. The method includes: separating a substrate into an active waveguide region and a passive waveguide region and selectively epitaxial-growing an active layer and a passive layer in the active waveguide region and the passive waveguide region, respectively, such that the active layer and the passive layer are vertically aligned with each other; sequentially forming a capping layer and an electrode connection layer on the active layer and the passive layer; forming a first insulating layer pattern on a predetermined region of the electrode connection layer disposed in the active waveguide region and simultaneously, forming a second insulating layer pattern on a predetermined region of the electrode connection layer disposed in the passive waveguide region; forming a shallow ridge type active waveguide and a shallow ridge type passive waveguide by performing an etching process using the first and second insulating layer patterns as etch masks until the capping layer is etched to a predetermined depth; and forming a passivation pattern on the entire surface of the shallow ridge type active waveguide and forming a deep ridge type passive waveguide by performing an etching process using the second insulating layer pattern as an etch mask until the substrate is etched to a predetermined depth.
摘要翻译：提供了一种制造脊型波导集成半导体光学器件的方法。该方法包括：将衬底分离成有源波导区域和无源波导区域，并分别在有源波导区域和无源波导区域中选择性地外延生长有源层和无源层，使得有源层和被动层彼此垂直对准; 在有源层和被动层上依次形成覆盖层和电极连接层; 在设置在有源波导区域中的电极连接层的预定区域上形成第一绝缘层图案，并同时在布置在无源波导区域中的电极连接层的预定区域上形成第二绝缘层图案; 通过使用第一和第二绝缘层图案作为蚀刻掩模进行蚀刻处理，直到将覆盖层蚀刻到预定深度来形成浅脊型有源波导和浅脊型无源波导; 并且在浅脊型有源波导的整个表面上形成钝化图案，并通过使用第二绝缘层图案作为蚀刻掩模进行蚀刻处理形成深脊型无源波导，直到基板被蚀刻到预定深度。

5. 发明申请

US20070070493A1 Apparatus and method for wavelength conversion and clock signal extraction using semiconductor optical amplifiers 有权
公开(公告)号：US20070070493A1
公开(公告)日：2007-03-29
申请号：US11491646
申请日：2006-07-24
申请人： Dong Kim , Min Jeon , Young Leem , Eun Sim , Kyung Park , Sung Kim
发明人： Dong Kim , Min Jeon , Young Leem , Eun Sim , Kyung Park , Sung Kim
IPC分类号： H01S3/00
CPC分类号： H04B10/299
摘要： Provided is an apparatus and method for simultaneous optical wavelength conversion and optical clock signal extraction using semiconductor optical amplifiers (SOAs). The apparatus includes: a wavelength converter receiving a pump beam having input information and a probe beam having a different wavelength from the pump beam, and outputting the pump beam with an overshoot shifted to a red wavelength and an undershoot shifted to a blue wavelength due to non-linear characteristics and self-phase modulation of semiconductor optical amplifiers (SOAs) and the probe beam delivered the input information from the pump beam; an optical divider dividing output paths of the probe beam to which the input information has been delivered and the pump beam having the overshoot and the undershoot; a converted-wavelength extractor filtering the probe beam received from the optical divider; and a clock data regenerator obtaining a pseudo return-to-zero (PRZ) signal from the pump beam received from the optical divider and extracting a clock signal from the PRZ signal. The apparatus and method can simultaneously perform wavelength conversion and optical clock signal extraction on an NRZ signal using an optical method, without converting the NRZ signal into an electrical signal.

6. 发明申请

US20060133440A1 Optical semiconductor device 审中-公开
标题翻译：光半导体器件
公开(公告)号：US20060133440A1
公开(公告)日：2006-06-22
申请号：US11170813
申请日：2005-06-30
申请人： Ki Kim , Chul Lee , Dong Lee , Jung Song , Eun Sim , Sung Kim , Yong Baek
发明人： Ki Kim , Chul Lee , Dong Lee , Jung Song , Eun Sim , Sung Kim , Yong Baek
IPC分类号： H01S5/20
CPC分类号： H01S5/3434 , B82Y20/00 , H01L33/06 , H01S5/2004 , H01S5/2009 , H01S5/3403 , H01S5/34373
摘要： Provided is an optical semiconductor device including: an active layer having at least one quantum well layer and at least one barrier layer; a clad layer formed adjacent to the active layer; and a tunneling barrier layer formed between the active layer and the clad layer to be connected to the quantum well layer and formed of a material having a band-gap energy larger than the barrier layer, whereby it is possible to improve the drive characteristics at a high temperature and a high drive current by increasing a confinement effect of carriers such as electrons and holes in the active layer.
摘要翻译：本发明提供一种光半导体装置，包括：有源层，具有至少一个量子阱层和至少一个阻挡层; 与活性层相邻形成的覆层; 以及形成在有源层和包层之间的隧道势垒层，以与量子阱层连接并由具有比阻挡层大的带隙能量的材料形成，从而可以提高在通过增加载体如电子和空穴在活性层中的约束效应，可以提高高温和高驱动电流。

7. 发明申请

US20070176281A1 Semiconductor package 审中-公开
标题翻译：半导体封装
公开(公告)号：US20070176281A1
公开(公告)日：2007-08-02
申请号：US11698884
申请日：2007-01-29
申请人： Ki-Don Kim , Jae-Seon An , Seong-Chul Choi , Seong-Eun Sim , Hyun-Kyu Lee , Su-Jin Lim
发明人： Ki-Don Kim , Jae-Seon An , Seong-Chul Choi , Seong-Eun Sim , Hyun-Kyu Lee , Su-Jin Lim
IPC分类号： H01L23/12
CPC分类号： H01L23/49827 , H01L23/3128 , H01L23/552 , H01L24/48 , H01L24/97 , H01L25/0655 , H01L2224/05554 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48235 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/10162 , H01L2924/14 , H01L2924/15311 , H01L2924/16151 , H01L2924/16152 , H01L2924/181 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a substrate having a plurality of through holes for interconnecting electrically conductive traces formed on upper and lower surfaces of the substrate. The through holes are classified into a first set of through holes and a second set of through holes. The second set of through holes is located exterior of the first set of through holes, and surrounds the first set of through holes. A die is mounted on the upper surface of the substrate and is connected electrically to the first set of through holes. A metal shield is disposed on the substrate for enclosing the die therein and is connected electrically to the second set of through holes. A molding resin encapsulates the metal shield, the die on the substrate and fills a gap confined between the metal shield and the die.
摘要翻译：半导体封装包括具有多个通孔的衬底，用于互连形成在衬底的上表面和下表面上的导电迹线。通孔分为第一组通孔和第二组通孔。第二组通孔位于第一组通孔的外部，并且包围第一组通孔。模具安装在基板的上表面上并与第一组通孔电连接。金属屏蔽件设置在基板上，用于将管芯封装在其中并与第二组通孔电连接。模塑树脂将金属屏蔽件，模具封装在基板上，并填充限定在金属屏蔽件和模具之间的间隙。

8. 发明申请

US20070133650A1 Parabolic waveguide-type collimating lens with tunable external cavity laser diode provided with the same 有权
标题翻译：具有可调谐外腔激光二极管的抛物面波导型准直透镜
公开(公告)号：US20070133650A1
公开(公告)日：2007-06-14
申请号：US11654112
申请日：2007-01-17
申请人： Hyun-Soo Kim , Eun Sim
发明人： Hyun-Soo Kim , Eun Sim
IPC分类号： H01S3/08 , G02B6/34
CPC分类号： H01S5/141 , G02B6/12004 , G02B6/1228 , G02B2006/12102 , G02B2006/12107 , G02B2006/12121 , H01S5/0071 , H01S5/026 , H01S5/0654 , H01S5/1014 , H01S5/143 , H01S5/2231
摘要： The present invention relates to a semiconductor based parabolic waveguide-type collimating lens and a monolithically integrated type tunable external cavity laser diode light source. The monolithically integrated type tunable external cavity laser diode light source includes a gain medium for generating a gain of an optical signal, a collimating lens for correcting an divergent light beam to a parallel light beam, a passive waveguide through which the parallel light beam travels, an optical deflector to change a traveling direction of the parallel light beam changing a refractive index of medium on a traveling path of the parallel light beam traveling through the slab waveguide in response to an external electric signal and a diffraction grating to diffract the parallel light beam passing through the optical deflector, wherein these are integrate into one substrate made of an InP-based semiconductor as well as a material such as a GaAs-based semiconductor, a Si-based semiconductor, LiNbO3-based semiconductor or the like.
摘要翻译：本发明涉及一种基于半导体的抛物面波导型准直透镜和单片集成型可调谐外腔激光二极管光源。单片集成型可调谐外腔激光二极管光源包括用于产生光信号增益的增益介质，用于将发散光束校正为平行光束的准直透镜，平行光束通过该无源波导传播的无源波导，光学偏转器，用于响应于外部电信号和衍射光栅，改变沿平行光束行进的平行光束的行进路径上的介质折射率的平行光束的行进方向，以衍射平行光束通过光学偏转器，其中这些被集成到由基于InP的半导体制成的一个衬底中，以及诸如GaAs基半导体，Si基半导体，LiNbO 3基的材料半导体等。

9. 发明申请

US20060110113A1 Waveguide photodetector 有权
标题翻译：波导光电探测器
公开(公告)号：US20060110113A1
公开(公告)日：2006-05-25
申请号：US11150981
申请日：2005-06-13
申请人： Jeong Park , Hyun Ko , Eun Sim , Yong Baek
发明人： Jeong Park , Hyun Ko , Eun Sim , Yong Baek
IPC分类号： G02B6/10
CPC分类号： G02B6/1228 , G02B6/305 , G02B2006/12123 , G02B2006/12126
摘要： Provided is a waveguide photodetector including: a first clad layer disposed on a substrate; a core layer disposed on the first clad layer and for absorbing predetermined light; a second clad layer disposed on the core layer; and at least one subsidiary layer inserted in the first clad layer and the second clad layer. In this structure, the photodetector has about the same spot size as that of an optical fiber or planar lightwave circuit (PLC), so that incident light can be absorbed without loss, and the photodetector can more efficiently combine with the optical fiber or PLC and operate even at high power.
摘要翻译：提供一种波导光电检测器，包括：设置在基板上的第一包层; 芯层，设置在第一包层上并用于吸收预定的光; 设置在所述芯层上的第二覆层; 以及插入在第一包层和第二包层中的至少一个辅助层。在这种结构中，光电检测器具有与光纤或平面光波电路（PLC）大致相同的光点尺寸，从而可以无损耗地吸收入射光，并且光电检测器可以更有效地与光纤或PLC组合，即使在高功率下也能运行。

10. 发明申请

US20050084991A1 Method for manufacturing semiconductor optical amplifier having planar buried heterostructure 有权
标题翻译：具有平面掩埋异质结构的半导体光放大器的制造方法
公开(公告)号：US20050084991A1
公开(公告)日：2005-04-21
申请号：US10844321
申请日：2004-05-13
申请人： Dong Lee , Eun Sim , Ki Kim , Moon Park
发明人： Dong Lee , Eun Sim , Ki Kim , Moon Park
IPC分类号： H01S5/30 , H01L21/00 , H01S5/22 , H01S5/227 , H01S5/32 , H01S5/50
CPC分类号： H01S5/5009 , H01S5/1014 , H01S5/2206 , H01S5/227 , H01S5/3213 , H01S2301/173 , H01S2301/18
摘要： Provided is a method for manufacturing a planar buried semiconductor optical amplifier in which a spot size converter with a double-core structure is integrated, comprising the steps of: after growing a lower cladding layer, a lower waveguide layer and an upper cladding layer on a substrate, patterning a portion of thickness of the lower cladding layer, the lower waveguide layer and the upper cladding layer through an etching process using a dielectric layer pattern to form a lower waveguide; growing a planarization layer on the etched portions of the lower cladding layer, the lower waveguide layer and the upper cladding layer to smooth a surface; after removing the dielectric layer pattern, growing a space layer, an upper waveguide layer and a first cladding layer on the overall upper surface; patterning the first cladding layer, the upper waveguide layer and the space layer through the etching process using the dielectric layer pattern to form an upper waveguide having a horizontal taper area; after growing a first current blocking layer on the etched portions of the first cladding layer, the upper waveguide layer and the space layer of the upper waveguide, growing a second current blocking layer on the exposed portion of the first current block layer excluding the dielectric layer pattern; and after removing the dielectric layer pattern, forming a second cladding layer on the overall upper surface, and forming an electrode on the second cladding layer and the substrate, respectively.
摘要翻译：提供一种制造平面埋入式半导体光放大器的方法，其中集成了具有双芯结构的光斑尺寸转换器，包括以下步骤：在下敷层，下波导层和上包层上生长基板，通过使用电介质层图案的蚀刻工艺构图下包层，下波导层和上包层的厚度的一部分，以形成下波导; 在下包层，下波导层和上包层的蚀刻部分上生长平坦化层，以平滑表面; 在去除介电层图案之后，在整个上表面上生长空间层，上波导层和第一包层; 通过使用电介质层图案的蚀刻工艺图案化第一包层，上波导层和空间层，以形成具有水平锥面积的上波导; 在第一包层的蚀刻部分，上波导层和上波导的空间层上生长第一电流阻挡层之后，在除电介质层之外的第一电流块层的暴露部分上生长第二电流阻挡层模式; 并且在去除介电层图案之后，在整个上表面上形成第二包层，并分别在第二包覆层和基板上形成电极。

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