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1. 发明授权

US07078353B2 Indirect bonding with disappearance of bonding layer 失效
标题翻译：间接键合与粘结层消失
公开(公告)号：US07078353B2
公开(公告)日：2006-07-18
申请号：US10753173
申请日：2004-01-06
申请人： Nicolas Daval , Bruno Ghyselen , Cécile Aulnette , Oliver Rayssac , Ian Cayrefourcq
发明人： Nicolas Daval , Bruno Ghyselen , Cécile Aulnette , Oliver Rayssac , Ian Cayrefourcq
IPC分类号： H01L21/31 , H01L21/8222 , H01L21/326 , H01L21/331
CPC分类号： H01L21/76251 , H01L21/2007 , H01L21/76254 , Y10S438/933
摘要： The invention provides a method of producing a structure of a thin layer of semiconductor material on a support substrate. The thin layer is obtained from a donor substrate and includes an upper layer of semiconductor material. The method includes forming on the upper layer a bonding layer of a material that accepts diffusion from an element of the material of the upper layer, bonding the donor substrate from the side on which the bonding layer is formed on the upper layer to the support substrate, and diffusing the element from the upper layer into the bonding layer to homogenize the concentration of the element in the bonding layer and the upper layer. The result is that the thin layer of the structure is joined by the bonding layer to the upper layer.
摘要翻译：本发明提供一种在支撑基板上制造半导体材料薄层结构的方法。薄层从供体基底获得并且包括半导体材料的上层。该方法包括在上层上形成接受来自上层材料的元素的扩散的材料的接合层，将施主衬底从上层上形成接合层的一侧粘合到支撑衬底上并且将元件从上层扩散到接合层中以使结合层和上层中的元素的浓度均匀化。结果是结构的薄层通过粘合层连接到上层。

2. 发明授权

US06991956B2 Methods for transferring a thin layer from a wafer having a buffer layer 有权
标题翻译：从具有缓冲层的晶片转移薄层的方法
公开(公告)号：US06991956B2
公开(公告)日：2006-01-31
申请号：US11032844
申请日：2005-01-10
申请人： Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Nicolas Daval
发明人： Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Nicolas Daval
IPC分类号： H01L21/00 , H01L21/30
CPC分类号： H01L21/76259 , H01L21/76254
摘要： A method for transferring a layer of semiconductor material from a wafer is described. The wafer includes a support substrate and an upper surface that includes a buffer layer of a material having a first lattice parameter. In an embodiment, the technique includes growing a strained layer on the buffer layer. The strained layer is made of a semiconductor material having a nominal lattice parameter that is substantially different from the first lattice parameter, and it is grown to a thickness that is sufficiently thin to avoid relaxation of the strain therein. The method also includes growing a relaxed layer on the strained layer. The relaxed layer is made of silicon and has a concentration of at least one other semiconductor material that has a nominal lattice parameter that is substantially identical to the first lattice parameter. The technique also includes providing a weakened zone in the buffer layer, and supplying energy to detach a structure at the weakened zone. The structure includes a portion of the buffer layer, the strained layer and the relaxed layer. Lastly; the method includes enriching the concentration of the at least one other semiconductor material in the relaxed layer of the structure.
摘要翻译：描述了从晶片转移半导体材料层的方法。晶片包括支撑基板和包括具有第一晶格参数的材料的缓冲层的上表面。在一个实施例中，该技术包括在缓冲层上生长应变层。应变层由具有与第一晶格参数基本不同的标称晶格参数的半导体材料制成，并且其生长到足够薄的厚度以避免其中的应变松弛。该方法还包括在应变层上生长松弛层。松弛层由硅制成，并且具有至少一种其它半导体材料的浓度，其具有基本上与第一晶格参数相同的标称晶格参数。该技术还包括在缓冲层中提供弱化区域，并提供能量以在弱化区域分离结构。该结构包括缓冲层的一部分，应变层和松弛层。最后; 该方法包括在结构的松弛层中富集至少一种其它半导体材料的浓度。

3. 发明授权

US06955971B2 Semiconductor structure and methods for fabricating same 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US06955971B2
公开(公告)日：2005-10-18
申请号：US10704703
申请日：2003-11-12
申请人： Bruno Ghyselen , Oliver Rayssac , Cécile Aulnette , Carlos Mazuré
发明人： Bruno Ghyselen , Oliver Rayssac , Cécile Aulnette , Carlos Mazuré
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/76243 , H01L21/76259 , Y10S438/959 , Y10S438/977 , Y10S438/981
摘要： A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.
摘要翻译：公开了一种半导体结构及其制造方法。在一个实施方案中，制造半导体结构的方法包括：形成具有第一厚度的第一介电区域和具有第二厚度的第二介电区域的第一半导体材料基板，将第一基板接合到第二半导体基板，并且在第一和第二基底中的至少一个。本发明还涉及半导体结构。该结构包括具有半导体材料的表面层的半导体衬底，埋在表面层下的第一电介质的第一电介质层和埋在表面层下的第二电介质层。在一个实施例中，第一电介质层的厚度不同于第二电介质层的厚度。

4. 发明授权

US07446019B2 Method of reducing roughness of a thick insulating layer 有权
标题翻译：降低厚绝缘层粗糙度的方法
公开(公告)号：US07446019B2
公开(公告)日：2008-11-04
申请号：US11481701
申请日：2006-07-05
申请人： Nicolas Daval , Sebastien Kerdiles , Cécile Aulnette
发明人： Nicolas Daval , Sebastien Kerdiles , Cécile Aulnette
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254 , H01L21/31055 , H01L21/31116
摘要： A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate; treating the first substrate to form a zone of weakness beneath the insulator layer; and smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radio frequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate to the insulator layer and to a second substrate.
摘要翻译：一种通过在衬底上沉积绝缘体层来减小衬底上的绝缘体层的暴露表面的粗糙度的方法，其中绝缘体层包括与衬底相对的暴露的粗糙表面; 处理所述第一衬底以在所述绝缘体层下方形成弱化区; 以及通过暴露于室中的气体等离子体来平滑所述绝缘体层的暴露的粗糙表面。该室中含有大于0.25Pa但小于30Pa的压力的气体，并且使用射频发生器产生气体等离子体，该射频发生器施加到绝缘体层上，功率密度大于0.6W / cm 2，但小于10W / cm 2，持续至少10秒至小于200秒。衬底结合和层转移可以随后进行以将衬底的薄层转移到绝缘体层和第二衬底。

5. 发明授权

US07256075B2 Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer 有权
标题翻译：在剥离薄层之后回收包括多层结构的晶片
公开(公告)号：US07256075B2
公开(公告)日：2007-08-14
申请号：US11075273
申请日：2005-03-07
申请人： Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Takeshi Akatsu , Yves Mathieu Le Vaillant
发明人： Bruno Ghyselen , Cécile Aulnette , Bénédite Osternaud , Takeshi Akatsu , Yves Mathieu Le Vaillant
IPC分类号： H01L21/00
CPC分类号： H01L21/02032 , H01L21/76254 , H01L21/76259
摘要： The invention relates to a method of transferring useful layers from a donor wafer which includes a multi-layer structure on the surface of the donor wafer that has a thickness sufficient to form multiple useful layers for subsequent detachment. The layers may be formed of materials having sufficiently different properties such that they may be selectively removed. The layers of material may also include sub-layers that can be selectively removed from each other.
摘要翻译：本发明涉及从施主晶片转移有用层的方法，该施主晶片在施主晶片的表面上包括多层结构，其具有足以形成用于随后拆卸的多个有用层的厚度。这些层可以由具有足够不同性质的材料形成，使得它们可以被选择性地去除。材料层还可以包括可以相互选择性地去除的子层。

6. 发明授权

US07572714B2 Film taking-off method 有权
标题翻译：电影起飞方式
公开(公告)号：US07572714B2
公开(公告)日：2009-08-11
申请号：US11221045
申请日：2005-09-06
申请人： Cécile Aulnette , Ian Cayrefourcq , Carlos Mazure
发明人： Cécile Aulnette , Ian Cayrefourcq , Carlos Mazure
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： The invention relates to a method of producing a film intended for applications in electronics, optics or optronics starting from an initial wafer, which includes a step of implanting atomic species through one of the faces of the wafer. This method includes forming a step of defined height around the periphery of the wafer, with the step having a mean thickness that is less than that of the wafer; and selectively implanting atomic species through a face of the wafer but not through the step to form an implanted zone at a defined implant depth with the film being defined between the face of the wafer and the implanted zone. The implantation of atomic species into the step can be prevented by forming a protective layer at least over the step or by masking the step. The invention also relates to a wafer obtainable by the method.
摘要翻译：本发明涉及一种从初始晶片开始制造用于电子学，光学或光电子学中的薄膜的方法，其包括通过晶片的一个表面注入原子物质的步骤。该方法包括：形成围绕晶片周边的限定高度的台阶，其平均厚度小于晶片的平均厚度; 并且通过晶片的表面选择性地注入原子物质，但不通过该步骤，以在限定的注入深度处形成植入区域，其中膜被限定在晶片的表面和植入区域之间。可以通过至少在该步骤上形成保护层或通过掩蔽该步骤来防止将原子物质注入到该步骤中。本发明还涉及可通过该方法获得的晶片。

7. 发明申请

US20120228689A1 WAFER WITH INTRINSIC SEMICONDUCTOR LAYER 有权
标题翻译：带内置半导体层的波形
公开(公告)号：US20120228689A1
公开(公告)日：2012-09-13
申请号：US13416739
申请日：2012-03-09
申请人： Nicolas Daval , Cécile Aulnette , Bich-Yen Nguyen
发明人： Nicolas Daval , Cécile Aulnette , Bich-Yen Nguyen
IPC分类号： H01L27/108 , H01L21/02 , H01L29/16 , H01L21/762
CPC分类号： H01L27/10894 , H01L21/76254 , H01L21/84 , H01L27/10861 , H01L27/1203 , H01L27/1207 , H01L29/66181
摘要： The present invention relates to a method for the manufacture of a wafer by providing a doped layer on a semiconductor substrate; providing a first semiconductor layer on the doped layer; providing a buried oxide layer on the first semiconductor layer; and providing a second semiconductor layer on the buried oxide layer to form a wafer having a buried oxide layer and a doped layer beneath the buried oxide layer. The invention also relates to the wafer that is produced by the new method.
摘要翻译：本发明涉及通过在半导体衬底上设置掺杂层来制造晶片的方法; 在所述掺杂层上提供第一半导体层; 在所述第一半导体层上提供掩埋氧化物层; 以及在所述掩埋氧化物层上提供第二半导体层以形成具有掩埋氧化物层和所述掩埋氧化物层下方的掺杂层的晶片。本发明还涉及通过新方法生产的晶片。

8. 发明授权

US07459374B2 Method of manufacturing a semiconductor heterostructure 有权
标题翻译：半导体异质结构的制造方法
公开(公告)号：US07459374B2
公开(公告)日：2008-12-02
申请号：US11674392
申请日：2007-02-13
申请人： Cécile Aulnette , Christophe Figuet , Nicolas Daval
发明人： Cécile Aulnette , Christophe Figuet , Nicolas Daval
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262
摘要： A method for manufacturing a semiconductor heterostructure by first manufacturing a donor wafer having a first substrate with a first in-plane lattice parameter, a spatially graded buffer layer having a second in-plane lattice parameter, and a strained smoothing layer of a semiconductor material having a third in-plane lattice parameter which has a value between that of the first and second lattice parameters. A top layer is formed on the ungraded layer a top layer of a semiconductor material having a top surface, optionally with a superficial layer present on the top surface and having a thickness that is equal to or smaller than 10 nanometers. Next, a handle wafer of a second substrate having an insulator layer thereon is bonded with the donor wafer in such way that (a) the insulator layer of the handle wafer is bonded directly onto the top surface of the top layer of the donor wafer, or (b) the insulator layer of the handle wafer is bonded onto the superficial layer.
摘要翻译：一种半导体异质结构的制造方法，首先制造具有第一面内晶格参数的第一衬底的施主晶片，具有第二面内晶格参数的空间渐变缓冲层，以及半导体材料的应变平滑化层，具有第一和第二格子参数之间的值的第三平面晶格参数。顶层在未分级层上形成具有顶表面的半导体材料的顶层，任选具有位于顶表面上的表层，并具有等于或小于10纳米的厚度。接下来，其上具有绝缘体层的第二衬底的处理晶片与施主晶片接合，使得（a）把手晶片的绝缘体层直接接合到施主晶片顶层的顶表面上，或者（b）把手晶片的绝缘体层结合到表面层上。

9. 发明授权

US09177961B2 Wafer with intrinsic semiconductor layer 有权
标题翻译：具有本征半导体层的晶片
公开(公告)号：US09177961B2
公开(公告)日：2015-11-03
申请号：US13416739
申请日：2012-03-09
申请人： Nicolas Daval , Cécile Aulnette , Bich-Yen Nguyen
发明人： Nicolas Daval , Cécile Aulnette , Bich-Yen Nguyen
IPC分类号： H01L21/02 , H01L27/108 , H01L21/762 , H01L21/84 , H01L27/12 , H01L29/66
CPC分类号： H01L27/10894 , H01L21/76254 , H01L21/84 , H01L27/10861 , H01L27/1203 , H01L27/1207 , H01L29/66181
摘要： The present disclosure relates to a method for the manufacture of a wafer by providing a doped layer on a semiconductor substrate; providing a first semiconductor layer on the doped layer; providing a buried oxide layer on the first semiconductor layer; and providing a second semiconductor layer on the buried oxide layer to form a wafer having a buried oxide layer and a doped layer beneath the buried oxide layer. The disclosure also relates to the wafer that is produced by the new method.
摘要翻译：本公开涉及通过在半导体衬底上设置掺杂层来制造晶片的方法; 在所述掺杂层上提供第一半导体层; 在所述第一半导体层上提供掩埋氧化物层; 以及在所述掩埋氧化物层上提供第二半导体层以形成具有掩埋氧化物层和所述掩埋氧化物层下方的掺杂层的晶片。本公开还涉及通过新方法生产的晶片。

10. 发明授权

US08183128B2 Method of reducing roughness of a thick insulating layer 有权
标题翻译：降低厚绝缘层粗糙度的方法
公开(公告)号：US08183128B2
公开(公告)日：2012-05-22
申请号：US12234280
申请日：2008-09-19
申请人： Nicolas Daval , Sebastien Kerdiles , Cécile Aulnette
发明人： Nicolas Daval , Sebastien Kerdiles , Cécile Aulnette
IPC分类号： H01L21/46
CPC分类号： H01L21/76254 , H01L21/31055 , H01L21/31116
摘要： A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate, and then smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radiofrequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate and the insulator layer to a second substrate.
摘要翻译：一种通过在衬底上沉积绝缘体层来减小衬底上的绝缘体层的暴露表面的粗糙度的方法，其中绝缘体层包括与衬底相对的暴露的粗糙表面，然后通过暴露于室内的气体等离子体。该室包含大于0.25Pa但小于30Pa的压力的气体，并且使用射频发生器产生气体等离子体，所述射频发生器施加到绝缘体层的功率密度大于0.6W / cm 2但小于10W / cm2至少10秒至小于200秒。衬底接合和层转移可以随后进行以将衬底和绝缘体层的薄层转移到第二衬底。

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