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    • 2. 发明申请
    • INTEGRATED CAPACITOR ARRANGEMENT FOR ULTRAHIGH CAPACITANCE VALUES
    • 集成电容器布置ULTRAHIGH电容值
    • WO2007054858A3
    • 2007-09-27
    • PCT/IB2006054063
    • 2006-11-02
    • NXP BVROOZEBOOM FREDDYKLOOTWIJK JOHAN HKEMMEREN ANTONIUS L A MREEFMAN DERKVERHOEVEN JOHANNES F C M
    • ROOZEBOOM FREDDYKLOOTWIJK JOHAN HKEMMEREN ANTONIUS L A MREEFMAN DERKVERHOEVEN JOHANNES F C M
    • H01L21/02
    • H01L28/91H01L27/0805H01L27/1087H01L29/945
    • The present invention relates to an electronic device (300) comprising at least one trench capacitor (302) that can also take the form of an inverse structure, a pillar capacitor. An alternating layer sequence (308) of at least two dielectric layers (312, 316) and at least two electrically conductive layers (314, 318) is provided in the trench capacitor or on the pillar capacitor, such that the at least two electrically conductive layers are electrically isolated from each other and from the substrate by respective ones of the at least two dielectric layers. A set of internal contact pads (332, 334, 340) is provided, and each internal contact pad is connected with a respective one of the electrically conductive layers or with the substrate. By providing an individual internal contact pad for each of the electrically conductive layers, a range of switching opportunities is opened up that allows tuning the specific capacitance of the capacitor to a desired value. The electronic device of the invention thus provides a flexible trench-capacitor manufacturing platform for a multitude of combinations of electrically conductive layers with each other, or, when multiple trenches are used, between electrically conductive layers of different trench capacitors. On-chip applications such as a charge-pump circuit or a DC-to-DC voltage converter are claimed that benefit from the ultra-high capacitance density and the high breakdown voltage that can be achieved with the electronic device of the invention.
    • 电子设备技术领域本发明涉及一种电子设备(300),其包括至少一个也可采取反向结构形式的沟槽电容器(302),立柱电容器。 至少两个电介质层(312,316)和至少两个导电层(314,318)的交替层序列(308)设置在所述沟槽电容器中或所述柱状电容器上,使得所述至少两个导电 层通过至少两个电介质层中的相应电极彼此电隔离并且与衬底电隔离。 提供一组内部接触焊盘(332,334,340),并且每个内部接触焊盘与相应的一个导电层或与基板连接。 通过为每个导电层提供单独的内部接触焊盘,开启一定范围的切换机会,允许将电容器的比电容调谐到期望值。 因此,本发明的电子器件为不同沟槽电容器的导电层之间的多个导电层的组合或多个沟槽组合提供了柔性的沟槽电容器制造平台。 要求使用诸如电荷泵电路或DC-DC电压转换器的片上应用,其受益于本发明的电子器件可实现的超高电容密度和高击穿电压。
    • 4. 发明申请
    • PRODUCING A COVERED THROUGH SUBSTRATE VIA USING A TEMPORARY CAP LAYER
    • 通过使用临时盖层产生覆盖的基底
    • WO2007054867A3
    • 2007-08-09
    • PCT/IB2006054082
    • 2006-11-03
    • NXP BVKLOOTWIJK JOHAN HKEMMEREN ANTONIUS L A MDEKKER RONALDVAN GRUNSVEN ERIC C EROOZEBOOM FREDDY
    • KLOOTWIJK JOHAN HKEMMEREN ANTONIUS L A MDEKKER RONALDVAN GRUNSVEN ERIC C EROOZEBOOM FREDDY
    • H01L21/768
    • H01L21/76898H01L21/764H01L23/481H01L2924/0002H01L2924/00
    • The present invention relates to a method for producing a substrate with at least one covered via that electrically and preferably also thermally connects a first substrate side with an opposite second substrate side. The processing involves forming a trench on a the first substrate side remains and covering the trench with a permanent layer on top of a temporary, sacrificial cap-layer, which is decomposed in a thermal process step. The method of the invention provides alternative ways to remove decomposition products of the sacrificial cap-layer material without remaining traces or contamination even in the presence of the permanent layer. This is, according to a first aspect of the invention, achieved by providing the substrate trench with an overcoat layer that has holes. The holes in the overcoat layer leave room for the removal of the decomposition products of the cap-layer material. According to the second aspect of the invention, opening the covered trench from the second substrate side and allowing the cap-layer material to be removed through that opening provides a solution. Both methods of the present invention are based on the common idea of using a temporary cap-layer even in a situation where the substrate opening is permanently covered before the removal of the temporary cap-layer.
    • 本发明涉及一种用于制造具有至少一个覆盖过孔的基板的方法,所述至少一个覆盖过孔电且优选还将第一基板侧与相对的第二基板侧热连接。 该处理包括在第一衬底侧上形成沟槽,并且在永久层上覆盖沟槽,该永久层位于在热处理步骤中分解的临时牺牲帽层的顶部上。 本发明的方法提供了替代方法,即使在存在永久层的情况下也不会留下痕迹或污染物,以去除牺牲帽层材料的分解产物。 根据本发明的第一方面,这是通过向衬底沟槽提供具有孔的覆盖层来实现的。 覆盖层中的孔留下了去除覆盖层材料的分解产物的空间。 根据本发明的第二方面,从第二衬底侧打开被覆盖的沟槽并允许通过该开口移除帽层材料提供了一种解决方案。 本发明的两种方法都基于即使在去除临时盖层之前衬底开口被永久覆盖的情况下使用临时盖层的常见思想。
    • 8. 发明申请
    • CAPACITIVE MICROMACHINED ULTRASOUND TRANSDUCER
    • 电容式MICROMACHINED超声波传感器
    • WO2010032156A2
    • 2010-03-25
    • PCT/IB2009053914
    • 2009-09-08
    • KONINKL PHILIPS ELECTRONICS NVKLOOTWIJK JOHAN HDIRKSEN PETERMULDER MARCELMOONEN ELISABETH M L
    • KLOOTWIJK JOHAN HDIRKSEN PETERMULDER MARCELMOONEN ELISABETH M L
    • B60B1/0292B06B1/0292H02N1/006H02N1/08Y10T29/49005
    • The patent application discloses a capacitive micromachined ultrasound transducer, comprising a silicon substrate; a cavity; a first electrode, which is arranged between the silicon substrate and the cavity; wherein the first electrode is arranged under the cavity; a membrane, wherein the membrane is arranged above the cavity and opposite to the first electrode; a second electrode, wherein the second electrode is arranged above the cavity and opposite to the first electrode; wherein the second electrode is arranged in or close to the membrane, wherein the first electrode and the second electrode are adapted to be supplied by a voltage; and a first isolation layer, which is arranged between the first electrode and the second electrode, wherein the first isolation layer comprises a dielectric. It is also described a system for generating or detecting ultrasound waves, wherein the system comprises a transducer according to the patent application. Further, it is disclosed a method for manufacturing a transducer according to the patent application, wherein the transducer is manufactured with the help of a CMOS manufacturing process,wherein the transducer can be manufactured as a post-processing feature during a CMOS process.
    • 该专利申请公开了一种电容式微机械超声换能器,其包括硅衬底; 一个空腔 布置在硅衬底和腔之间的第一电极; 其中所述第一电极布置在所述空腔下方; 膜,其中所述膜布置在所述腔的上方并与所述第一电极相对; 第二电极,其中所述第二电极布置在所述空腔上方并与所述第一电极相对; 其中所述第二电极布置在所述膜中或靠近所述膜,其中所述第一电极和所述第二电极适于由电压供应; 以及布置在所述第一电极和所述第二电极之间的第一隔离层,其中所述第一隔离层包括电介质。 还描述了用于产生或检测超声波的系统,其中该系统包括根据该专利申请的换能器。 此外,公开了根据专利申请的用于制造换能器的方法,其中借助于CMOS制造工艺制造所述换能器,其中所述换能器可以在CMOS工艺期间被制造为后处理特征。
    • 10. 发明专利
    • DE60229400D1
    • 2008-11-27
    • DE60229400
    • 2002-07-08
    • NXP BV
    • HUIZING HENDRIK GSLOTBOOM JAN WTERPSTRA DOEDEKLOOTWIJK JOHAN HAKSEN EYUP
    • H01L29/08H01L21/331H01L29/737
    • The bipolar transistor comprises a collector region ( 1 ) of a semiconductor material having a first doping type, a base region ( 2 ) of a semiconductor material having a second doping type, and an emitter region ( 3 ) having the first doping type. A junction is present between the emitter region ( 3 ) and the base region ( 2 ), and, viewed from the junction ( 4 ), a depletion region ( 5 ) extends into the emitter region ( 3 ). The emitter region ( 3 ) comprises a layer ( 6 ) of a first semiconductor material and a layer ( 7 ) of a second semiconductor material. The first semiconductor material has a higher intrinsic carrier concentration than the second semiconductor material. The layer ( 7 ) of said second semiconductor material is positioned outside the depletion region ( 5 ). The second semiconductor material has such a doping concentration that Auger recombination occurs. The invention also relates to a semiconductor device comprising such a bipolar transistor. The method of manufacturing the bipolar transistor comprises the step of forming an emitter region ( 3 ) with a first doping type on a collector region ( 1 ) of a semiconductor material with a first doping type, and a base region ( 2 ) of a semiconductor material having a second doping type. The emitter region ( 3 ) is formed by epitaxially depositing a first layer ( 6 ) of a first semiconductor material and subsequently epitaxially depositing a second layer ( 7 ) of a second semiconductor material. The second layer ( 7 ) is doped with the first doping type, such that Auger recombination occurs. The intrinsic carrier concentration of the second semiconductor material is higher than the intrinsic carrier concentration of the first semiconductor material. The Auger recombination dominates the base current and allows accurate tuning of the base current and the current gain of the bipolar transistor.