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1. 发明授权

US09048052B2 Electromechanical microswitch for switching an electrical signal, microelectromechanical system, integrated circuit, and method for producing an integrated circuit 有权
标题翻译：用于切换电信号的机电微动开关，微机电系统，集成电路和用于制造集成电路的方法
公开(公告)号：US09048052B2
公开(公告)日：2015-06-02
申请号：US13514106
申请日：2010-12-07
申请人： Mehmet Kaynak , Mario Birkholz , Bernd Tillack , Karl-Ernst Ehwald , René Scholz
发明人： Mehmet Kaynak , Mario Birkholz , Bernd Tillack , Karl-Ernst Ehwald , René Scholz
IPC分类号： H01L23/48 , H01H59/00 , H01H1/00
CPC分类号： H01H59/0009 , H01H1/0036
摘要： The invention relates to a microelectromechanical system with an electromechanical microswitch for switching an electrical signal in particular a radio frequency signal, in particular in a GHz range, comprising a multi-level conductive path layer stack arranged on a substrate, wherein conductive paths of the multi-level conductive path layer stack arranged in different conductive levels are insulated from one another through electrically insulating layers and electrically connected with one another through via contacts, an electromechanical switch which is integrated in a recess of the multi-level conductive path layer stack and which includes a contact pivot, an opposite contact and at least one drive electrode for the contact pivot, wherein the contact pivot, the opposite contact and the at least one drive electrode respectively form a portion of a conductive level of the multi-level layer stack.
摘要翻译：本发明涉及一种具有机电微动开关的微电子机械系统，用于切换电信号，特别是用于特别是射频信号，特别是在GHz范围内的射频信号，包括布置在衬底上的多层导电路径层堆叠，其中多层导电路径布置在不同导电水平的高导电通路层堆叠通过电绝缘层彼此绝缘并且通过通孔触点彼此电连接，集成在多层导电路径层堆叠的凹部中的机电开关，包括接触枢轴，相对的接触件和用于接触枢轴的至少一个驱动电极，其中所述接触枢轴，所述相对接触件和所述至少一个驱动电极分别形成所述多层层叠层的导电层的一部分。

2. 发明申请

US20120280393A1 Electromechanical Microswitch for Switching an Electrical Signal, Microelectromechanical System, Integrated Circuit, and Method for Producing an Integrated Circuit 有权
标题翻译：用于切换电信号的机电微型开关，微机电系统，集成电路和用于生成集成电路的方法
公开(公告)号：US20120280393A1
公开(公告)日：2012-11-08
申请号：US13514106
申请日：2010-12-07
申请人： Mehmet Kaynak , Mario Birkholz , Bernd Tillack , Karl-Ernst Ehwald , René Scholz
发明人： Mehmet Kaynak , Mario Birkholz , Bernd Tillack , Karl-Ernst Ehwald , René Scholz
IPC分类号： H01H59/00 , H01L21/98 , H01L27/06
CPC分类号： H01H59/0009 , H01H1/0036
摘要： The invention relates to a microelectromechanical system with an electromechanical microswitch for switching an electrical signal in particular a radio frequency signal, in particular in a GHz range, comprising a multi-level conductive path layer stack arranged on a substrate, wherein conductive paths of the multi-level conductive path layer stack arranged in different conductive levels are insulated from one another through electrically insulating layers and electrically connected with one another through via contacts, an electromechanical switch which is integrated in a recess of the multi-level conductive path layer stack and which includes a contact pivot, an opposite contact and at least one drive electrode for the contact pivot, wherein the contact pivot, the opposite contact and the at least one drive electrode respectively form a portion of a conductive level of the multi-level layer stack.
摘要翻译：本发明涉及一种具有机电微动开关的微电子机械系统，用于切换电信号，特别是用于特别是射频信号，特别是在GHz范围内的射频信号，包括布置在衬底上的多层导电路径层堆叠，其中多层导电路径布置在不同导电水平的高导电通路层堆叠通过电绝缘层彼此绝缘并且通过通孔触点彼此电连接，集成在多层导电路径层堆叠的凹部中的机电开关，包括接触枢轴，相对的接触件和用于接触枢轴的至少一个驱动电极，其中所述接触枢轴，所述相对接触件和所述至少一个驱动电极分别形成所述多层层叠层的导电层的一部分。

3. 发明授权

US06465318B1 Bipolar transistor and method for producing same 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：US06465318B1
公开(公告)日：2002-10-15
申请号：US09787571
申请日：2001-08-02
申请人： Karl-Ernst Ehwald , Bernd Tillack , Bernd Heinemann , Dieter Knoll , Dirk Wolansky
发明人： Karl-Ernst Ehwald , Bernd Tillack , Bernd Heinemann , Dieter Knoll , Dirk Wolansky
IPC分类号： H01L21331
CPC分类号： H01L29/66287 , H01L29/7322
摘要： This invention relates to a bi-polar transistor and a procedure for its manufacture. The task of the invention is to propose a bi-polar transistor and a procedure for its manufacture that eliminates the disadvantages of conventional arrangements for a simple polysilicon technology with differential epitaxy for the manufacture of the base, in order to further improve especially the high-speed properties of a bi-polar transistor, to produce highly conductive connections between the metal contacts and the active (inner) transistor region as well as a minimized passive transistor surface, and to simultaneously avoid any additional process complexity and increased contact resistance. This invention resolves the task in that, by creating suitable epitaxy process conditions, the polysilicon layer is deposited on the insulator zone with a greater thickness than the epitaxy layer in the active transistor zone. The greater thickness of the polysilicon layer as compared to the epitaxial layer is achieved by using a very low temperature for the deposition of a part of or the entire buffer layer. The use of a low temperature for the deposition allows a better nucleation of the insulator layer and a reduction of the idle time for the deposition. This allows achieving a greater thickness on the insulator layer as compared with the active transistor zone.
摘要翻译：本发明涉及双极晶体管及其制造方法。本发明的任务是提出一种双极晶体管及其制造方法，其消除了用于制造基底的具有差分外延的简单多晶硅技术的常规布置的缺点，双极晶体管的速度特性，以在金属触点和有源（内部）晶体管区域之间产生高导电连接以及最小化的无源晶体管表面，同时避免任何额外的工艺复杂性和增加的接触电阻。本发明解决了通过创建合适的外延工艺条件的工作，多晶硅层以比有源晶体管区中的外延层更大的厚度沉积在绝缘体区上。与外延层相比，多晶硅层的厚度越大，通过使用非常低的温度来沉积一部分或整个缓冲层来实现。使用低温进行沉积允许绝缘体层的更好的成核和减少沉积的空闲时间。与有源晶体管区域相比，这允许在绝缘体层上实现更大的厚度。

4. 发明授权

US07595534B2 Layers in substrate wafers 有权
标题翻译：衬底晶圆层
公开(公告)号：US07595534B2
公开(公告)日：2009-09-29
申请号：US10433969
申请日：2001-12-06
申请人： Bernd Heinemann , Karl-Ernst Ehwald , Dieter Knoll , Bernd Tillack , Dirk Wolansky , Peter Schley
发明人： Bernd Heinemann , Karl-Ernst Ehwald , Dieter Knoll , Bernd Tillack , Dirk Wolansky , Peter Schley
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L21/74 , H01L21/26506 , H01L21/823807 , H01L21/823892 , H01L29/1083
摘要： The invention relates to layers in substrate wafers. The aim of the invention is to provide layers in substrate wafers with which the drawbacks of conventional assemblies are overcome in order to achieve, on the one hand, an adequate resistance to latch-up in highly scaled, digital CMOS circuits with comparatively low costs and, on the other hand, to ensure low substrate losses/couplings for analog high-frequency circuits and, in addition, to influence the component behavior in a non-destructive manner. To these ends, the invention provides that in a highly resistive p-Si substrate (2) with one or more buried high-carbon Si layers (3) under an epitaxial layer and with the Si cap layer (4), an implantation dose, which is greater in comparison to conventional substrate wafers, is used for retrograde trough profiles by suppressing the dopant diffusion as well as the generation of defects when remedying implant defects, thereby achieving a reduction of the trough resistance, and finally, an increase in the resistance to latch-up.
摘要翻译：本发明涉及衬底晶片中的层。本发明的目的是提供衬底晶片中的层，其中克服了常规组件的缺点，以便一方面实现具有相对较低成本的高度缩放的数字CMOS电路中的闩锁的适当电阻，以及另一方面，为了确保模拟高频电路的低衬底损耗/耦合，此外，以非破坏性的方式影响组件行为。为此，本发明提供了在具有一个或多个掩埋的高碳Si层（3）的外延层和Si覆盖层（4）下的高电阻p-Si衬底（2）中的注入剂量，与传统的基板晶片相比，通过抑制掺杂剂扩散以及在补偿注入缺陷时产生缺陷而用于逆向槽型材，从而实现了谷电阻的降低，最后增加了电阻闭锁

5. 发明授权

US06878995B2 Cmos-compatible lateral dmos transistor and method for producing such a transistor 失效
标题翻译： Cmos兼容横向晶体管及其制造方法
公开(公告)号：US06878995B2
公开(公告)日：2005-04-12
申请号：US10239933
申请日：2001-03-24
申请人： Karl-Ernst Ehwald , Bernd Heinemann , Dieter Knoll , Wolfgang Winkler
发明人： Karl-Ernst Ehwald , Bernd Heinemann , Dieter Knoll , Wolfgang Winkler
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L21/335
CPC分类号： H01L29/66659 , H01L29/0615 , H01L29/1033 , H01L29/7835
摘要： A CMOS-compatible DMOS transistor can be designed by virtue of a suitable layout configuration optionally for very high drain voltages or for power amplification at very high frequencies and which can be produced at a low level of additional cost in comparison with a conventional sub-μm production technology for CMOS circuits. A gate insulator of the transistor is of a unitary thickness under a control gate in the entire (active) region through which current flows. A zone of increased doping concentration (well region) which is near the surface and which determines the transistor threshold voltage is so arranged under the control gate that it occupies the entire area under the control gate which is on the active region and ends within a so-called drift space between the control gate and a highly doped drain region. The entire surface of the drift space is covered by a zone of the conductivity type of the drain region (VLDD), which is lowly doped in comparison with the highly doped drain region.
摘要翻译：可以通过适当的布局配置来设计CMOS兼容的DMOS晶体管，用于非常高的漏极电压或在非常高的频率下进行功率放大，并且可以以与常规子母线相比低的额外成本来生产CMOS兼容的DMOS晶体管 CMOS电路的生产技术。在电流流过的整个（有源）区域中，晶体管的栅极绝缘体在控制栅极下方具有整体厚度。靠近表面并确定晶体管阈值电压的增加的掺杂浓度（阱区）的区域被布置在控制栅极下方，其占据位于有源区上的控制栅极下方的整个区域并且结束于其中在控制栅极和高掺杂漏极区之间的偏移漂移空间。漂移空间的整个表面由漏区（VLDD）的导电类型的区域覆盖，其与高掺杂漏极区相比被低掺杂。

6. 发明授权

US06477891B2 Process for affinity viscosimetry and viscosimetric affinity sensor 有权
标题翻译：亲和力粘度和粘度亲和力传感器的方法
公开(公告)号：US06477891B2
公开(公告)日：2002-11-12
申请号：US09897357
申请日：2001-07-02
申请人： Rudolf Ehwald , Karl-Ernst Ehwald , Andreas Thomas , Uwe Beyer
发明人： Rudolf Ehwald , Karl-Ernst Ehwald , Andreas Thomas , Uwe Beyer
IPC分类号： G01N3000
CPC分类号： A61B5/14532 , G01N11/08 , G01N2001/4016
摘要： The invention concerns a process for affinity viscosimetry and a viscosimetric affinity sensor on the basis of sensitive liquids with analyte-dependent viscosity which are localized within a perfusable dialysis chamber and contain colloidal constituents which are cross-linked by affinity bonds. The viscosimetric affinity sensor according to this invention is characterized by the spatial or temporal separation of analyte diffusion from the measurement of the flow resistance for such sensitive liquid flowing through a capillary, needle-like body or other liquid conductor, which integrated combination of a dialysis chamber with viscosimeter enables a researcher to make measurements under lab conditions that provide spatial separation of the dialysis process from the rheological analysis, as done under test conditions where the maximum shear rate of sensitive liquid in the viscosity sensor is at least twice that shear rate of sensitive liquid experienced in the dialysis chamber. An important advantage of the invention consists in small volume-displacement and negligible structural change within the matrix or organ of living tissue to be investigated.
摘要翻译：本发明涉及一种基于具有分析物依赖性粘度的敏感液体的亲和力粘度测定法和粘度测定亲和力传感器，其位于可灌注透析室内并含有通过亲和键交联的胶体成分。根据本发明的粘度亲和力传感器的特征在于分析物扩散与流过毛细管，针状体或其它液体导体的敏感液体的流动阻力的测量的空间或时间分离，其将透析具有粘度计的腔室使得研究人员能够在实验室条件下进行测量，从而提供透析过程与流变学分析的空间分离，如在粘度传感器中敏感液体的最大剪切速率至少为剪切速率的两倍在透析室中经历的敏感液体。本发明的一个重要优点在于待研究的活体组织的基质或器官内的小体积位移和结构变化可以忽略不计。

7. 发明授权

US5571731A Procedure for the manufacture of bipolar transistors without epitaxy and with fully implanted base and collector regions which are self-positioning relative to each other 失效
标题翻译：用于制造没有外延的双极晶体管和相对于彼此自定位的完全注入的基极和集电极区域的方法
公开(公告)号：US5571731A
公开(公告)日：1996-11-05
申请号：US215187
申请日：1994-03-21
申请人： Hartmut Gr utzediek , Joachim Scheerer , Wolfgang Winkler , Michel Pierschel , Karl-Ernst Ehwald
发明人： Hartmut Gr utzediek , Joachim Scheerer , Wolfgang Winkler , Michel Pierschel , Karl-Ernst Ehwald
IPC分类号： H01L21/331 , H01L29/732 , H01L21/265 , H01L21/00 , H01L21/30 , H01R21/22
CPC分类号： H01L29/66272 , H01L29/732
摘要： A method of fabricating a semiconductor device. A series of layers is deposited on a semiconductor substrate of a first conductivity type to form a shielding arrangement, including an upper part and a lower part, to provide a shield against accelerated ions. This is followed by forming openings in the shielding arrangement by microlithographic processes and anisotropic etching, and then implanting ions via the openings to form one of a base area and a base-connection area of the first conductivity type. Edges of the openings are displaced by isotropic etching of the lower part of the shielding arrangement. Ions are implanted which have been accelerated to energies sufficient to penetrate the one of the base area and base-connection area and a portion of the substrate underlying the one of the base area and base-connection area to form a sub-collector and a graded collector of a second conductivity type for completely encircling and separating a base from the substrate, wherein the sub-collector is more heavily doped than the collector. The base is formed by one of (i) implanting ions between the step of forming openings and the step of implanting ions accelerated, and (ii) implanting ions after the step of implanting ions accelerated. The method further includes forming an emitter, depositing an insulating layer, forming contacts to the base, the emitter and the collector, and forming a metalization arrangement.
摘要翻译：一种制造半导体器件的方法。一系列层沉积在第一导电类型的半导体衬底上，以形成包括上部和下部的屏蔽装置，以提供防止加速离子的屏蔽。然后通过微光刻和各向异性蚀刻在屏蔽装置中形成开口，然后通过开口注入离子以形成第一导电类型的基极区域和基极连接区域之一。通过对屏蔽装置的下部进行各向同性蚀刻来移动开口的边缘。被植入的离子被加速到足以穿透基底区域和基底连接区域中的一个的能量以及基底区域和基底连接区域之一的基底的一部分以形成子收集器和分级用于完全环绕和分离基底与基底的第二导电类型的集电极，其中子集电极比集电极更重掺杂。基底由（i）在形成开口的步骤和注入离子加速的步骤之间注入离子，和（ii）在植入离子加速的步骤之后注入离子之一形成。该方法还包括形成发射极，沉积绝缘层，与基底，发射极和集电极形成触点，并形成金属化装置。

8. 发明授权

US08035167B2 Complementary bipolar semiconductor device 有权
标题翻译：互补双极半导体器件
公开(公告)号：US08035167B2
公开(公告)日：2011-10-11
申请号：US12448032
申请日：2007-12-07
申请人： Dieter Knoll , Bernd Heinemann , Karl-Ernst Ehwald
发明人： Dieter Knoll , Bernd Heinemann , Karl-Ernst Ehwald
IPC分类号： H01L27/015
CPC分类号： H01L27/0623 , H01L21/82285 , H01L21/8249 , H01L27/0826
摘要： A complementary bipolar semiconductor device (CBi semiconductor device) comprising a substrate of a first conductivity type, active bipolar transistor regions in the substrate, in which the base, emitter and collector of vertical bipolar transistors are arranged, vertical epitaxial-base npn bipolar transistors in a first subset of the active bipolar transistor regions, vertical epitaxial-base pnp bipolar transistors in a second subset of the active bipolar transistor regions, collector contact regions which are respectively arranged adjoining an active bipolar transistor region, and shallow field insulation regions which respectively laterally delimit the active bipolar transistor regions and the collector contact regions, wherein arranged between the first or the second or both the first and also the second subset of active bipolar transistor regions on the one hand and the adjoining collector contact regions on the other hand is a respective shallow field insulation region of a first type with a first depthwise extent in the direction of the substrate interior and shallow field insulation regions of a second type of a second greater depthwise extent than the first depthwise extent of the active bipolar transistor regions delimit the active bipolar transistor regions and collector contact regions viewed in cross-section at their sides facing away from each other.
摘要翻译：一种互补双极性半导体器件（CBi半导体器件），包括第一导电类型的衬底，衬底中的有源双极晶体管区域，其中垂直双极晶体管的基极，发射极和集电极被布置，垂直外延基极npn双极晶体管有源双极晶体管区域的第一子集，有源双极晶体管区域的第二子集中的垂直外延基极pnp双极晶体管，分别布置成邻接有源双极晶体管区域的集电极接触区域和分别横向界定有源双极性晶体管区域和集电极接触区域，其中一方面被布置在一方面的有源双极性晶体管区域的第一或第二或第二子集之间，另一方面相邻的集电极接触区域是相应的浅场绝缘区域为第一在基板内部的方向上具有第一深度方向的第一类型，并且第二类型的浅的场绝缘区域比有源双极晶体管区域的第一深度方向的第二较深的深度方向的区域限定有源双极晶体管区域和集电极接触区域横截面在彼此背离的一侧。

9. 发明申请

US20100019326A1 COMPLEMENTARY BIPOLAR SEMICONDUCTOR DEVICE 有权
标题翻译：补充双极半导体器件
公开(公告)号：US20100019326A1
公开(公告)日：2010-01-28
申请号：US12448032
申请日：2007-12-07
申请人： Dieter Knoll , Bernd Heinemann , Karl-Ernst Ehwald
发明人： Dieter Knoll , Bernd Heinemann , Karl-Ernst Ehwald
IPC分类号： H01L27/06 , H01L21/8249
CPC分类号： H01L27/0623 , H01L21/82285 , H01L21/8249 , H01L27/0826
摘要： A complementary bipolar semiconductor device (CBi semiconductor device) comprising a substrate of a first conductivity type, active bipolar transistor regions in the substrate, in which the base, emitter and collector of vertical bipolar transistors are arranged, vertical epitaxial-base npn bipolar transistors in a first subset of the active bipolar transistor regions, vertical epitaxial-base pnp bipolar transistors in a second subset of the active bipolar transistor regions, collector contact regions which are respectively arranged adjoining an active bipolar transistor region, and shallow field insulation regions which respectively laterally delimit the active bipolar transistor regions and the collector contact regions, wherein arranged between the first or the second or both the first and also the second subset of active bipolar transistor regions on the one hand and the adjoining collector contact regions on the other hand is a respective shallow field insulation region of a first type with a first depthwise extent in the direction of the substrate interior and shallow field insulation regions of a second type of a second greater depthwise extent than the first depthwise extent of the active bipolar transistor regions delimit the active bipolar transistor regions and collector contact regions viewed in cross-section at their sides facing away from each other.
摘要翻译：一种互补双极性半导体器件（CBi半导体器件），包括第一导电类型的衬底，衬底中的有源双极晶体管区域，其中垂直双极晶体管的基极，发射极和集电极被布置，垂直外延基极npn双极晶体管有源双极晶体管区域的第一子集，有源双极晶体管区域的第二子集中的垂直外延基极pnp双极晶体管，分别布置成邻接有源双极晶体管区域的集电极接触区域和分别横向界定有源双极性晶体管区域和集电极接触区域，其中一方面被布置在一方面的有源双极性晶体管区域的第一或第二或第二子集之间，另一方面相邻的集电极接触区域是相应的浅场绝缘区域为第一在基板内部的方向上具有第一深度方向的第一类型，并且第二类型的第二类型的浅的场绝缘区域比有源双极性晶体管区域的第一深度方向的第二较深的深度方向的区域限定了观察到的有源双极晶体管区域和集电极接触区域横截面在彼此背离的一侧。

10. 发明授权

US08330237B2 Corrosion-resistant MEMS component and method for the production thereof 有权
标题翻译：耐腐蚀MEMS元件及其制造方法
公开(公告)号：US08330237B2
公开(公告)日：2012-12-11
申请号：US12452426
申请日：2008-06-27
申请人： Jürgen Drews , Karl-Ernst Ehwald , Katrin Schulz
发明人： Jürgen Drews , Karl-Ernst Ehwald , Katrin Schulz
IPC分类号： H01L29/84
CPC分类号： B81B7/0012 , G01N11/16
摘要： An MEMS component including a monolithically integrated electronic component with a multi-plane conductor track layer stack which is arranged on a substrate and into which is integrated a cantilevered elastically movable metallic actuator which is arranged in the multi-plane conductor track layer stack at the level of a conductor track plane and is connected by via contacts to conductor track planes which are arranged thereabove or therebeneath and which apart from an opening in the region of the actuator are separated from the conductor track plane of the actuator by a respective intermediate plane insulator layer, wherein the actuator is formed from a metallically conductive layer or layer combination which is resistant to corrosive liquids or gases and which contains titanium nitride or consists of titanium nitride.
摘要翻译：一种MEMS组件，包括具有多平面导体轨道层堆叠的单片集成电子部件，其布置在基板上并且集成有悬臂弹性可移动金属致动器，其布置在多平面导体轨道层堆叠中的导体轨道平面，并且通过通孔触点连接到布置在其上方或其下方的导体轨道平面，并且除了致动器的区域中的开口之外，通过相应的中间平面绝缘体层与致动器的导体轨道平面分离其中所述致动器由对腐蚀性液体或气体具有耐受氮化钛或由氮化钛组成的金属导电层或层组合形成。

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