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1. 发明授权

US08446020B2 Multi-chip module 有权
标题翻译：多芯片模块
公开(公告)号：US08446020B2
公开(公告)日：2013-05-21
申请号：US12902527
申请日：2010-10-12
申请人： Masateru Koide , Daisuke Mizutani , Aiichiro Inoue , Hideo Yamashita , Iwao Yamazaki , Masayuki Kato , Seiji Ueno , Kazuyuki Imamura
发明人： Masateru Koide , Daisuke Mizutani , Aiichiro Inoue , Hideo Yamashita , Iwao Yamazaki , Masayuki Kato , Seiji Ueno , Kazuyuki Imamura
IPC分类号： H01L23/48
CPC分类号： H01L23/49827 , H01L23/49822 , H01L23/66 , H01L24/16 , H01L25/0655 , H01L2224/131 , H01L2224/16235 , H01L2224/73253 , H01L2924/0001 , H01L2924/01078 , H01L2924/10253 , H01L2924/014 , H01L2224/13099 , H01L2924/00
摘要： A multi-chip module includes: a board; a wiring board disposed on the board and including a wiring pattern; and a plurality of chips disposed on the wiring board. Each of the plurality of chips is connected with at least one of the other chips, and the plurality of chips and the board are electrically connected with each other via a portion other than the wiring pattern of the wiring board.
摘要翻译：多芯片模块包括：板; 布线板，其布置在所述板上并且包括布线图案; 以及配置在配线基板上的多个芯片。多个芯片中的每一个与其他芯片中的至少一个连接，并且多个芯片和板通过布线板的布线图案之外的部分彼此电连接。

2. 发明授权

US08015447B2 Processor debugging apparatus and processor debugging method 失效
标题翻译：处理器调试设备和处理器调试方法
公开(公告)号：US08015447B2
公开(公告)日：2011-09-06
申请号：US10986912
申请日：2004-11-15
申请人： Hideo Yamashita , Ryuji Kan
发明人： Hideo Yamashita , Ryuji Kan
IPC分类号： G06F11/00
CPC分类号： G06F11/2236
摘要： A processor debugging apparatus that scans and reads a latch in a processor includes a register that stores a value of a predetermined signal in the processor for a plurality of clocks; and a signal reading unit that scans and reads out a signal value stored in the register.
摘要翻译：一种在处理器中扫描和读取锁存器的处理器调试装置，包括：存储处理器中预定信号值多个时钟的寄存器; 以及扫描并读出存储在寄存器中的信号值的信号读取单元。

3. 发明授权

US07437399B2 Method and apparatus for averaging parity protected binary numbers 失效
标题翻译：平均奇偶校验二进制数的方法和装置
公开(公告)号：US07437399B2
公开(公告)日：2008-10-14
申请号：US10855528
申请日：2004-05-28
申请人： Hideo Yamashita
发明人： Hideo Yamashita
IPC分类号： G06F7/38
CPC分类号： G06F7/544
摘要： A method and an apparatus for averaging includes generating a carry using a least significant bit of each of two binary numbers, wherein the two binary numbers include a first binary number and a second binary number, and adding a first shifted binary number, a second shifted binary number, and the carry generated, thereby outputting an average of the two binary numbers. The carry generated is added to the least significant bit position. The first shifted binary number is obtained by right-shifting the first binary number by one bit, and the second shifted binary number by right-shifting the second binary number by one bit.
摘要翻译：用于平均的方法和装置包括使用两个二进制数中的每一个的最低有效位来产生进位，其中两个二进制数包括第一二进制数和第二二进制数，并且将第一移位二进制数，第二移位二进制数和进位生成，从而输出两个二进制数的平均值。生成的进位被加到最低有效位位置。第一个移位的二进制数是通过将第一个二进制数字右移1位而第二个移位的二进制数通过将第二个二进制数右移一位来获得的。

4. 发明申请

US20070067612A1 Arithmetic operation apparatus, information processing apparatus, and register file control method 失效
标题翻译：算术运算装置，信息处理装置和寄存器文件控制方法
公开(公告)号：US20070067612A1
公开(公告)日：2007-03-22
申请号：US11333229
申请日：2006-01-18
申请人： Ryuji Kan , Hideo Yamashita , Toshio Yoshida
发明人： Ryuji Kan , Hideo Yamashita , Toshio Yoshida
IPC分类号： G06F9/44
CPC分类号： G06F9/30043 , G06F9/30127 , G06F9/3851
摘要： The present apparatus reduces hardware resources and improves data read throughput in an information processing apparatus employing the out-of-order instruction execution method. The apparatus includes: an arithmetic operation unit which executes a window switching instruction and an instruction relating to data stored in the current register or data held in the replacing buffer; and a control unit which transfers, if a window switching instruction is decoded at execution of the window switching instruction by the arithmetic operation unit, data of the register window which is to be specified by the current window pointer upon completion of execution of the window switching instruction, to the replacing buffer.
摘要翻译：本装置在采用无序指令执行方法的信息处理装置中减少硬件资源并提高数据读取吞吐量。该装置包括：算术运算单元，执行窗口切换指令和与存储在当前寄存器中的数据或保存在替换缓冲器中的数据有关的指令; 以及控制单元，如果在由算术运算单元执行窗口切换指令时对窗口切换指令进行了解码，则在完成窗口切换的执行完成后由当前窗口指针指定的寄存器窗口的数据指令，到替换缓冲区。

5. 发明授权

US5694027A Three-phase brushless self-excited synchronous generator with no rotor excitation windings 失效
标题翻译：无转子励磁绕组的三相无刷自励同步发电机
公开(公告)号：US5694027A
公开(公告)日：1997-12-02
申请号：US569478
申请日：1995-12-08
申请人： Satoru Satake , Kenji Inoue , Yukio Onogi , Hideo Yamashita , Yukio Hosaka
发明人： Satoru Satake , Kenji Inoue , Yukio Onogi , Hideo Yamashita , Yukio Hosaka
IPC分类号： H02P9/14 , H02K19/28
CPC分类号： H02K19/28
摘要： On a stator core, there are wound T-connection primary generating windings such that the second and third single-phase windings are respectively arranged at positions electrically orthogonal to the first single-phase winding. The winding number of the first single-phase winding is 31/2 times that of the second single-phase winding or the third single-phase winding. The stator excitation windings are also wound on the stator core, which are connected to the center taps of the primary generating windings through a control rectifier. A plurality of field windings are wound on a rotor core. The field windings are arranged at positions where they are magnetically coupled with both the odd-order spatial higher harmonic components of armature reaction magnetic fields produced by currents flowing in the primary generating windings and the static magnetic fields produced by current flowing in the stator excitation windings. Due to the T-connection primary generating windings, the generator is capable of simultaneously generating not only the three-phase outputs but also the single-phase three-line outputs.
摘要翻译：在定子铁芯上，缠绕有T形连接的初级绕组，使得第二和第三单相绕组分别布置在与第一单相绕组电正交的位置处。第一单相绕组的绕组数为3 + E，第一单相绕组或第三单相绕组的绕组数为1/2 + EE倍。定子励磁绕组也缠绕在定子铁芯上，定子铁心通过控制整流器连接到初级发电绕组的中心抽头。多个励磁绕组缠绕在转子铁芯上。场绕组被布置在它们与在主发生绕组中流动的电流产生的电枢反应磁场的奇数阶空间高次谐波分量和由在定子励磁绕组中流动的电流产生的静磁场磁耦合的位置处。由于T连接初级绕组，发电机不仅可以同时产生三相输出，而且可以同时产生单相三线输出。

6. 发明授权

US4545706A Method and machine for machining the surface of a valve seat 失效
标题翻译：用于加工阀座表面的方法和机器
公开(公告)号：US4545706A
公开(公告)日：1985-10-08
申请号：US441512
申请日：1982-10-27
申请人： Minoru Hiroyasu , Shigeru Yamagishi , Hideo Yamashita , Susumu Yamada , Koji Takahashi
发明人： Minoru Hiroyasu , Shigeru Yamagishi , Hideo Yamashita , Susumu Yamada , Koji Takahashi
IPC分类号： F01L3/24 , B23C3/05 , B23D75/00 , B23Q1/54 , B24B15/02 , B26D7/14 , F02B75/02 , B23B35/00 , B23B41/12
CPC分类号： B23Q1/5462 , B23C3/055 , B24B15/02 , B23C2215/60 , F02B2075/027 , Y10T408/04 , Y10T408/5587 , Y10T408/6757 , Y10T408/8595 , Y10T408/906
摘要： A method and machine for machining the surface of a valve seat (3) which is required to have a very accurate alignment with respect to a guide bore of a valve guide (2).In order to be capable of machining the valve seat surface in high roundness while maintaining a high concentricity with the guide bore, a pilot member (4) is moved forward inclinably to catch a guide bore of a valve guide (2) at its front end; the pilot member is further moved forward bendably while following the guide bore; when the pilot member has reached the desired position, the posture of the pilot member in the position is firmly held; and the surface of the valve seat (3) is machined by moving edged tool members (5a) forwardly while rotating the edged tool members (5a) which are arranged coaxially with the pilot member. A machine for practicing the method includes a forwardly and backwardly movable spindle (8), a pilot member (4) bendable at (7) with respect to the spindle, a bearing member (15) for the pilot member provided alignably with respect to the pilot member, an arrangement (17) for holding the bearing member coaxially with the pilot member, and edged tool members (5a) arranged to be rotatable coaxially with the pilot member and movable forwardly and backwardly together with the pilot member.
摘要翻译： PCT No.PCT / JP82 / 00060 Sec。 371日期1982年10月27日第 102（e）日期1982年10月27日PCT提交1982年3月5日PCT公布。第WO82 / 03032号公报日期1982年9月16日。一种用于加工阀座（3）的表面的方法和机器，其需要相对于阀导向件（2）的导向孔非常精确的对准。为了能够以高圆度加工阀座表面，同时保持与导向孔的高同心度，导向件（4）可向前倾斜地向前移动以在其前端抓住阀导向件（2）的导向孔 ; 引导构件在跟随导向孔的同时进一步向前可弯曲地向前移动; 当导向构件达到期望位置时，先导构件在该位置的姿势被牢固地保持; 并且通过向前移动边缘工具构件（5a）同时旋转与导向构件同轴设置的边缘工具构件（5a）来加工阀座（3）的表面。用于实施该方法的机器包括向前和向后移动的主轴（8），相对于主轴在（7）处可弯曲的先导构件（4），用于引导构件的轴承构件（15），其相对于导向构件，用于保持轴承构件与导向构件同轴的装置（17）和被布置成可与导向构件同轴旋转并且与导向构件一起向前和向后移动的边缘工具构件（5a）。

7. 发明授权

US08732550B2 Processor and error correcting method 有权
标题翻译：处理器和纠错方法
公开(公告)号：US08732550B2
公开(公告)日：2014-05-20
申请号：US12633079
申请日：2009-12-08
申请人： Yoshiteru Ohnuki , Hideo Yamashita
发明人： Yoshiteru Ohnuki , Hideo Yamashita
IPC分类号： G06F11/00
CPC分类号： G06F11/1008 , G06F9/30105 , G06F9/30138 , G06F9/3865 , G06F11/1076 , G06F2211/109
摘要： A processor for processing data and correcting an error occurring in the data, the processor includes: a register that stores data with error check data and error correction data; an error detector that detects an error in the data stored in the register by using the error check data; and an error corrector that corrects the detected error by using the error correction data and that stores the corrected data back into the register.
摘要翻译：一种用于处理数据并纠正数据中发生的错误的处理器，所述处理器包括：存储具有错误校验数据和纠错数据的数据的寄存器; 错误检测器，通过使用错误检查数据来检测存储在寄存器中的数据的错误; 以及错误校正器，其通过使用纠错数据来校正检测到的错误，并将校正的数据存储回寄存器。

8. 发明申请

US20120159936A1 EXHAUST PIPE 失效
标题翻译：排气管
公开(公告)号：US20120159936A1
公开(公告)日：2012-06-28
申请号：US13333678
申请日：2011-12-21
申请人： Takashi Sasajima , Hideo Yamashita , Daisaku Sawada
发明人： Takashi Sasajima , Hideo Yamashita , Daisaku Sawada
IPC分类号： F01N3/10
CPC分类号： F01N13/16 , F01N13/14
摘要： An exhaust pipe through which an exhaust port of an internal combustion engine and a catalyst for purifying an exhaust gas of the internal combustion engine are connected to each other includes a porous portion that is provided on at least a part of an inner peripheral face of the exhaust pipe. A thermal conductivity that the porous portion exhibits in a high temperature state where a temperature of the exhaust gas is as high as it is required to radiate a heat of the exhaust gas through the exhaust pipe is at least ten times higher than a thermal conductivity that the porous portion exhibits in a low temperature state where the temperature of the exhaust gas is as low as it is required to warm the catalyst up.
摘要翻译：内燃机的排气口和净化内燃机的排气的催化剂彼此连接的排气管包括设置在内燃机的内周面的至少一部分上的多孔部分，排气管。多孔部分在高温状态下呈现的热导率，其中废气的温度高于通过排气管辐射排气的热量所需的温度高至高于其导热系数的十倍以上多孔部分呈低温状态，其中排气温度低至需要将催化剂加热时所需的温度低。

9. 发明授权

US07343478B2 Register window system and method that stores the next register window in a temporary buffer 失效
标题翻译：注册窗口系统和方法将下一个寄存器窗口存储在临时缓冲区中
公开(公告)号：US07343478B2
公开(公告)日：2008-03-11
申请号：US11333229
申请日：2006-01-18
申请人： Ryuji Kan , Hideo Yamashita , Toshio Yoshida
发明人： Ryuji Kan , Hideo Yamashita , Toshio Yoshida
IPC分类号： G06F9/44
CPC分类号： G06F9/30043 , G06F9/30127 , G06F9/3851
摘要： The present apparatus reduces hardware resources and improves data read throughput in an information processing apparatus employing the out-of-order instruction execution method. The apparatus includes: an arithmetic operation unit which executes a window switching instruction and an instruction relating to data stored in the current register or data held in the replacing buffer; and a control unit which transfers, if a window switching instruction is decoded at execution of the window switching instruction by the arithmetic operation unit, data of the register window which is to be specified by the current window pointer upon completion of execution of the window switching instruction, to the replacing buffer.
摘要翻译：本装置在采用无序指令执行方法的信息处理装置中减少硬件资源并提高数据读取吞吐量。该装置包括：算术运算单元，执行窗口切换指令和与存储在当前寄存器中的数据或保存在替换缓冲器中的数据有关的指令; 以及控制单元，如果在由算术运算单元执行窗口切换指令时对窗口切换指令进行了解码，则在完成窗口切换的执行完成后由当前窗口指针指定的寄存器窗口的数据指令，到替换缓冲区。

10. 发明授权

US5838601A Arithmetic processing method and arithmetic processing device 失效
标题翻译：算术处理方法和算术处理装置
公开(公告)号：US5838601A
公开(公告)日：1998-11-17
申请号：US674514
申请日：1996-07-02
申请人： Hideo Yamashita , Yuji Yoshida
发明人： Hideo Yamashita , Yuji Yoshida
IPC分类号： G06F7/00 , G06F7/38 , G06F7/487 , G06F7/52 , G06F7/76 , G06F9/302 , G06F9/38
CPC分类号： G06F7/4876 , G06F9/30014 , G06F9/3861 , G06F9/3875 , G06F7/49905
摘要： An arithmetic processing method and arithmetic processing device each which can reduce the number of logical stages needed to obtain the final arithmetic result, thus executing an arithmetic process such as a floating-point multiplication at high speed to reduce the arithmetic process time. According to the arithmetic processing method and arithmetic processing device, the possibility that an arithmetic exception occurs in the arithmetic result obtained through an arithmetic process is judged in the middle of the arithmetic process of the dedicated arithmetic processing unit. Transmitting an arithmetic end signal to the instruction control unit is inhibited when it is judged that there is a possibility; the arithmetic process with the possibility is executed by means of another arithmetic unit different from the dedicated arithmetic unit. Thereafter the arithmetic end signal regarding the arithmetic process is transmitted to the instruction control unit. The arithmetic processing method and arithmetic processing device can be applied to the case where an arithmetic process such as a floating-point arithmetic operation is performed in a pipeline mode.
摘要翻译：一种算术处理方法和算术处理装置，每个都可以减少获得最终算术结果所需的逻辑级数，从而以高速执行诸如浮点乘法的运算处理以减少运算处理时间。根据算术处理方法和算术处理装置，在专用算术处理单元的算术处理中判断在通过算术处理获得的算术结果中发生运算异常的可能性。当判断有可能时，禁止向指令控制单元发送算术结束信号; 具有可能性的算术处理通过与专用算术单元不同的另一算术单元来执行。此后，关于算术处理的算术结束信号被发送到指令控制单元。算术处理方法和算术处理装置可以应用于在流水线模式下执行诸如浮点算术运算的算术处理的情况。

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