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1. 发明申请

US20110079907A1 SEMICONDUCTOR DEVICE HAVING A COPPER PLUG 有权
标题翻译：具有铜插头的半导体器件
公开(公告)号：US20110079907A1
公开(公告)日：2011-04-07
申请号：US12573183
申请日：2009-10-05
申请人： MUKTA G. FAROOQ , Emily R. Kinser , Ian D. Melville , Krystyna W. Semkow
发明人： MUKTA G. FAROOQ , Emily R. Kinser , Ian D. Melville , Krystyna W. Semkow
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/02697 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/03452 , H01L2224/0401 , H01L2224/05006 , H01L2224/05007 , H01L2224/05016 , H01L2224/05026 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05157 , H01L2224/05187 , H01L2224/05562 , H01L2224/05572 , H01L2224/131 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/15787 , H01L2924/04953 , H01L2924/01014 , H01L2224/05552 , H01L2924/00
摘要： Disclosed is a semiconductor device wherein an insulation layer has a copper plug in contact with the last wiring layer of the device. There may also be a barrier layer separating the copper plug from the insulation layer. In a further embodiment, there may also be an aluminum layer between the insulation layer and copper plug. Also disclosed is a process for making the semiconductor device.
摘要翻译：公开了一种半导体器件，其中绝缘层具有与器件的最后布线层接触的铜插塞。还可以存在将铜塞与绝缘层分离的阻挡层。在另一实施例中，在绝缘层和铜插塞之间也可以有铝层。还公开了制造半导体器件的方法。

2. 发明申请

US20120168952A1 SEMICONDUCTOR DEVICE HAVING A COPPER PLUG 有权
标题翻译：具有铜插头的半导体器件
公开(公告)号：US20120168952A1
公开(公告)日：2012-07-05
申请号：US13418261
申请日：2012-03-12
申请人： Mukta G. Farooq , Emily R. Kinser , Ian D. Melville , Krystyna W. Semkow
发明人： Mukta G. Farooq , Emily R. Kinser , Ian D. Melville , Krystyna W. Semkow
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L21/02697 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0345 , H01L2224/03452 , H01L2224/0401 , H01L2224/05006 , H01L2224/05007 , H01L2224/05016 , H01L2224/05026 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05157 , H01L2224/05187 , H01L2224/05562 , H01L2224/05572 , H01L2224/131 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/15787 , H01L2924/04953 , H01L2924/01014 , H01L2224/05552 , H01L2924/00
摘要： Disclosed is a process of making a semiconductor device wherein an insulation layer has a copper plug in contact with the last wiring layer of the device. There may also be a barrier layer separating the copper plug from the insulation layer. There may also be a cap layer over the copper plug to protect it from oxidation. There may also be a dielectric layer over the cap layer.
摘要翻译：公开了制造半导体器件的方法，其中绝缘层具有与器件的最后布线层接触的铜插塞。还可以存在将铜塞与绝缘层分离的阻挡层。在铜塞上方也可能有一个盖层，以防止它被氧化。在盖层上还可以存在介电层。

3. 发明授权

US08446006B2 Structures and methods to reduce maximum current density in a solder ball 有权
标题翻译：降低焊球最大电流密度的结构和方法
公开(公告)号：US08446006B2
公开(公告)日：2013-05-21
申请号：US12640752
申请日：2009-12-17
申请人： Raschid J. Bezama , Timothy H. Daubenspeck , Gary LaFontant , Ian D. Melville , Ekta Misra , George J. Scott , Krystyna W. Semkow , Timothy D. Sullivan , Robin A. Susko , Thomas A. Wassick , Xiaojin Wei , Steven L. Wright
发明人： Raschid J. Bezama , Timothy H. Daubenspeck , Gary LaFontant , Ian D. Melville , Ekta Misra , George J. Scott , Krystyna W. Semkow , Timothy D. Sullivan , Robin A. Susko , Thomas A. Wassick , Xiaojin Wei , Steven L. Wright
IPC分类号： H01L23/498 , H01L21/3205
CPC分类号： H01L23/49816 , H01L21/76804 , H01L23/5226 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05011 , H01L2224/05012 , H01L2224/05013 , H01L2224/05094 , H01L2224/05551 , H01L2224/05552 , H01L2224/05555 , H01L2224/05558 , H01L2224/05559 , H01L2224/05572 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/131 , H01L2224/13111 , H01L2224/13147 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： Structures and methods to reduce maximum current density in a solder ball are disclosed. A method includes forming a contact pad in a last wiring level and forming a plurality of wires of the contact pad extending from side edges of the contact pad to respective ones of a plurality of vias. Each one of the plurality of wires has substantially the same electrical resistance.
摘要翻译：公开了减少焊球中的最大电流密度的结构和方法。一种方法包括在最后的布线层中形成接触焊盘，并且形成从接触焊盘的侧边缘延伸到多个通孔中的多个通孔的接触焊盘的多个导线。多个导线中的每一根具有基本上相同的电阻。

4. 发明授权

US09035459B2 Structures for improving current carrying capability of interconnects and methods of fabricating the same 有权
标题翻译：用于改善互连的载流能力的结构及其制造方法
公开(公告)号：US09035459B2
公开(公告)日：2015-05-19
申请号：US12421723
申请日：2009-04-10
申请人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Timothy H. Daubenspeck , Krystyna W. Semkow , Timothy D. Sullivan
发明人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Timothy H. Daubenspeck , Krystyna W. Semkow , Timothy D. Sullivan
IPC分类号： C23C14/24 , H01L23/00 , C25D5/02 , C25D5/14 , C25D5/48
CPC分类号： H01L24/05 , C25D5/02 , C25D5/14 , C25D5/48 , H01L24/11 , H01L2224/0401 , H01L2224/05075 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2924/01322 , H01L2924/014 , H01L2924/1305 , H01L2924/14 , H01L2924/00 , H01L2924/00014 , H01L2924/01074 , H01L2924/013 , H01L2924/01027
摘要： Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.
摘要翻译：提供互连结构及其制造方法。互连结构提供用于改善载流能力（例如，电流扩展）的高可靠性铜互连结构。该结构包括在沟槽中形成的凸块下金属。凸起下冶金至少包括：粘合层; 电镀阻挡层; 以及设置在粘合层和镀层阻挡层之间的镀覆导电金属层。该结构还包括形成在凸块下金属上的焊料凸块。

5. 发明授权

US08551303B2 Multi-anode system for uniform plating of alloys 失效
标题翻译：用于均匀电镀合金的多阳极系统
公开(公告)号：US08551303B2
公开(公告)日：2013-10-08
申请号：US13406679
申请日：2012-02-28
申请人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Krystyna W. Semkow
发明人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Krystyna W. Semkow
IPC分类号： C25B9/00 , C25B9/06
CPC分类号： C25D17/008 , C25D17/007 , C25D17/12
摘要： Disclosed are embodiments of an electroplating system and an associated electroplating method that allow for depositing of metal alloys with a uniform plate thickness and with the means to alter dynamically the alloy composition. Specifically, by using multiple anodes, each with different types of soluble metals, the system and method avoid the need for periodic plating bath replacement and also allow the ratio of metals within the deposited alloy to be selectively varied by applying different voltages to the different metals. The system and method further avoids the uneven current density and potential distribution and, thus, the non-uniform plating thicknesses exhibited by prior art methods by selectively varying the shape and placement of the anodes within the plating bath. Additionally, the system and method allows for fine tuning of the plating thickness by using electrically insulating selectively placed prescribed baffles.
摘要翻译：公开了电镀系统和相关电镀方法的实施例，其允许沉积具有均匀板厚度的金属合金以及动态地改变合金组成的手段。具体来说，通过使用具有不同类型的可溶性金属的多个阳极，该系统和方法避免了对周期性电镀浴更换的需要，还允许通过向不同的金属施加不同的电压来选择性地改变沉积合金中的金属比例。该系统和方法进一步避免了不均匀的电流密度和电势分布，并且因此通过选择性地改变阳极在电镀槽内的形状和位置，现有技术方法表现出不均匀的电镀厚度。此外，该系统和方法允许通过使用电绝缘的选择性放置的规定的挡板来微调电镀厚度。

6. 发明申请

US20120083113A1 CREATION OF LEAD-FREE SOLDER JOINT WITH INTERMETALLICS 有权
标题翻译：创建无铅焊接接头与INTERMETALLICS
公开(公告)号：US20120083113A1
公开(公告)日：2012-04-05
申请号：US12894231
申请日：2010-09-30
申请人： Charles L. Arvin , Valerie Oberson , Srinivasa N. Reddy , Krystyna W. Semkow , Richard A. Shelleman , Kamalesh K. Srivastava
发明人： Charles L. Arvin , Valerie Oberson , Srinivasa N. Reddy , Krystyna W. Semkow , Richard A. Shelleman , Kamalesh K. Srivastava
IPC分类号： H01L21/768
CPC分类号： H01L24/16 , H01L23/15 , H01L23/49811 , H01L24/13 , H01L24/81 , H01L2224/13166 , H01L2224/16237 , H01L2224/16238 , H01L2224/16507 , H01L2224/81191 , H01L2224/81192 , H01L2224/81444 , H01L2224/81815 , H01L2924/01327 , H01L2924/14 , H01L2924/00012 , H01L2924/014 , H01L2924/00014 , H01L2924/00
摘要： A method of coupling an integrated circuit to a substrate includes providing the substrate, forming a contact pad in the substrate, contacting the contact pad with a solder ball, and repeatedly exposing the solder ball to a thermal process to cause intermetallics based on a metal in the contact pad to be formed in the thermal ball.
摘要翻译：将集成电路耦合到衬底的方法包括提供衬底，在衬底中形成接触焊盘，使接触焊盘与焊球接触，并且将焊球重复地暴露于热处理以引起基于金属的金属间化合物接触垫将形成在热球中。

7. 发明授权

US07294909B2 Electronic package repair process 有权
标题翻译：电子封装修复过程
公开(公告)号：US07294909B2
公开(公告)日：2007-11-13
申请号：US11099161
申请日：2005-04-05
申请人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
发明人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H05K3/225 , H01L21/4846 , H01L23/49811 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H05K1/0306 , H05K3/0029 , H05K3/4629 , H05K2203/173 , Y10T29/49124 , Y10T29/49135 , H01L2924/00
摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
摘要翻译：一种多层陶瓷修复工艺，提供了一个新的电气修复路径，以连接顶面通孔。修复路径是建立在有缺陷的网和包含在多层陶瓷基板内的冗余修复网之间。有缺陷的网和修复网各自终止在基板的表面通孔处。使用激光器在基板上和基板上形成点火电路。之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

8. 发明授权

US5846598A Electroless plating of metallic features on nonmetallic or semiconductor layer without extraneous plating 失效
标题翻译：在非金属或半导体层上进行金属化学镀无电镀
公开(公告)号：US5846598A
公开(公告)日：1998-12-08
申请号：US815337
申请日：1997-03-11
申请人： Krystyna W. Semkow , Eugene J. O'Sullivan
发明人： Krystyna W. Semkow , Eugene J. O'Sullivan
IPC分类号： C23C18/16 , C23C18/36 , H01L21/288 , H01L21/48 , H01L21/768 , B05D5/12
CPC分类号： H01L21/288 , C23C18/161 , C23C18/165 , C23C18/36 , H01L21/4846 , H01L21/76838
摘要： In the manufacture of a microelectronic component having metallic features on a polyimide layer, the metallic features being spaced from one another by gaps, at least some of which gaps have widths in a range from about one micron to about 500 microns, corrosion protection is provided by plating those features by electroless deposition of a nickel-phosphorus alloy forming a layer having a thickness in a range from about 200 .ANG. to about 3000 .ANG., at a rate of about 100 .ANG. per minute, in an aqueous plating bath comprising nickel sulfate hexahydrate in an amount of about 5.5 grams per liter, sodium hypophosphite in an amount of about six grams per liter, boric acid in an amount of about 30 grams per liter, sodium citrate in an amount of about 45 grams per liter, lead acetate in an amount of about one part per million by weight of lead, and a surfactant in an amount of about 0.1 grams per liter. The bath has a temperature of about 72.degree. C. and a pH of about 8.1. The gaps having widths of at least one micron remain essentially free of extraneous plating.
摘要翻译：在制造具有在聚酰亚胺层上具有金属特征的微电子部件时，金属特征通过间隙彼此间隔开，其中至少一些间隙的宽度在约1微米至约500微米的范围内，提供了腐蚀保护通过在包含硫酸镍六水合物的水性电镀浴中以约100安格姆每分钟的速率无电沉积形成厚度在约200安培姆至约3000安培的层的镍 - 磷合金进行电镀这些特征约5.5克/升的次磷酸钠，每升约6克的次磷酸钠，硼酸的量为约30克/升，柠檬酸钠的量为约45克/升，乙酸铅在一量为铅重量百万分之一份左右，表面活性剂的量为约0.1克/升。浴的温度为约72℃，pH为约8.1。具有至少1微米宽度的间隙基本上不含外部电镀。

9. 发明授权

US08623194B2 Multi-anode system for uniform plating of alloys 失效
标题翻译：用于均匀电镀合金的多阳极系统
公开(公告)号：US08623194B2
公开(公告)日：2014-01-07
申请号：US13604666
申请日：2012-09-06
申请人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Krystyna W. Semkow
发明人： Charles L. Arvin , Raschid J. Bezama , Harry D. Cox , Krystyna W. Semkow
IPC分类号： C25D3/56
CPC分类号： C25D17/008 , C25D17/007 , C25D17/12
摘要： Disclosed are embodiments of an electroplating system and an associated electroplating method that allow for depositing of metal alloys with a uniform plate thickness and with the means to alter dynamically the alloy composition. Specifically, by using multiple anodes, each with different types of soluble metals, the system and method avoid the need for periodic plating bath replacement and also allow the ratio of metals within the deposited alloy to be selectively varied by applying different voltages to the different metals. The system and method further avoids the uneven current density and potential distribution and, thus, the non-uniform plating thicknesses exhibited by prior art methods by selectively varying the shape and placement of the anodes within the plating bath. Additionally, the system and method allows for fine tuning of the plating thickness by using electrically insulating selectively placed prescribed baffles.
摘要翻译：公开了电镀系统和相关电镀方法的实施例，其允许沉积具有均匀板厚度的金属合金以及动态地改变合金组成的手段。具体来说，通过使用具有不同类型的可溶性金属的多个阳极，该系统和方法避免了对周期性电镀浴更换的需要，还允许通过向不同的金属施加不同的电压来选择性地改变沉积合金中的金属比例。该系统和方法进一步避免了不均匀的电流密度和电势分布，并且因此通过选择性地改变阳极在电镀槽内的形状和位置，现有技术方法表现出不均匀的电镀厚度。此外，该系统和方法允许通过使用电绝缘的选择性放置的规定的挡板来微调电镀厚度。

10. 发明授权

US08587112B2 Underbump metallurgy employing an electrolytic Cu / electorlytic Ni / electrolytic Cu stack 有权
标题翻译：使用电解Cu /电解Ni /电解铜叠层的底部衬底冶金
公开(公告)号：US08587112B2
公开(公告)日：2013-11-19
申请号：US13453074
申请日：2012-04-23
申请人： Charles L. Arvin , Hai P. Longworth , David J. Russell , Krystyna W. Semkow
发明人： Charles L. Arvin , Hai P. Longworth , David J. Russell , Krystyna W. Semkow
IPC分类号： H05K3/00
CPC分类号： H01L23/49811 , H01L23/49827 , H01L2924/0002 , H05K3/108 , H05K3/24 , H05K3/243 , H05K3/421 , H05K3/4644 , H05K2201/0341 , H05K2201/0769 , H05K2201/09481 , H05K2201/09563 , H01L2924/00
摘要： An electroless Cu layer is formed on each side of a packaging substrate containing a core, at least one front metal interconnect layer, and at least one backside metal interconnect layer. A photoresist is applied on both electroless Cu layers and lithographically patterned. First electrolytic Cu portions are formed on exposed surfaces of the electroless Cu layers, followed by formation of electrolytic Ni portions and second electrolytic Cu portions. The electrolytic Ni portions provide enhanced resistance to electromigration, while the second electrolytic Cu portions provide an adhesion layer for a solder mask and serves as an oxidation protection layer. Some of the first electrolytic Cu may be masked by lithographic means to block formation of electrolytic Ni portions and second electrolytic Cu portions thereupon as needed. Optionally, the electrolytic Ni portions may be formed directly on electroless Cu layers.
摘要翻译：在包含芯，至少一个前金属互连层和至少一个背侧金属互连层的封装基板的每一侧上形成化学镀铜层。在两个无电镀铜层上涂布光致抗蚀剂，并用光刻图案化。第一电解Cu部分形成在无电解Cu层的暴露表面上，随后形成电解Ni部分和第二电解Cu部分。电解Ni部分提供增强的电迁移阻力，而第二电解Cu部分提供用于焊接掩模的粘附层并且用作氧化保护层。一些第一电解铜可以被光刻装置掩盖，以根据需要阻挡电解Ni部分和第二电解Cu部分的形成。任选地，电解Ni部分可以直接形成在无电镀Cu层上。

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