专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07294909B2 Electronic package repair process 有权
标题翻译：电子封装修复过程
公开(公告)号：US07294909B2
公开(公告)日：2007-11-13
申请号：US11099161
申请日：2005-04-05
申请人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
发明人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H05K3/225 , H01L21/4846 , H01L23/49811 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H05K1/0306 , H05K3/0029 , H05K3/4629 , H05K2203/173 , Y10T29/49124 , Y10T29/49135 , H01L2924/00
摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
摘要翻译：一种多层陶瓷修复工艺，提供了一个新的电气修复路径，以连接顶面通孔。修复路径是建立在有缺陷的网和包含在多层陶瓷基板内的冗余修复网之间。有缺陷的网和修复网各自终止在基板的表面通孔处。使用激光器在基板上和基板上形成点火电路。之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

2. 发明授权

US06916670B2 Electronic package repair process 失效
标题翻译：电子封装修复过程
公开(公告)号：US06916670B2
公开(公告)日：2005-07-12
申请号：US10358431
申请日：2003-02-04
申请人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
发明人： Jon A. Casey , James G. Balz , Michael Berger , Jerome Cohen , Charles Hendricks , Richard Indyk , Mark LaPlante , David C. Long , Lori A. Maiorino , Arthur G. Merryman , Glenn A. Pomerantz , Robert A. Rita , Krystyna W. Semkow , Patrick E. Spencer , Brian R. Sundlof , Richard P. Surprenant , Donald R. Wall , Thomas A. Wassick , Kathleen M. Wiley
IPC分类号： H05K3/46 , H01L21/48 , H01L23/12 , H01L23/498 , H05K1/03 , H05K3/00 , H05K3/22 , H01L21/00
CPC分类号： H05K3/225 , H01L21/4846 , H01L23/49811 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H05K1/0306 , H05K3/0029 , H05K3/4629 , H05K2203/173 , Y10T29/49124 , Y10T29/49135 , H01L2924/00
摘要： A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
摘要翻译：一种多层陶瓷修复工艺，提供了一种新的电气修复路径，以连接顶部表面通孔。修复路径是建立在有缺陷的网和包含在多层陶瓷基片内的冗余修复网之间。有缺陷的网和修复网各自终止在基板的表面通孔处。使用激光器在基板上和基板上形成点火电路。之后是有缺陷的网络与电气修复结构的电气隔离和电气修复线路的钝化。

3. 发明授权

US06823585B2 Method of selective plating on a substrate 失效
标题翻译：在基板上选择性镀覆的方法
公开(公告)号：US06823585B2
公开(公告)日：2004-11-30
申请号：US10249305
申请日：2003-03-28
申请人： Mark J. LaPlante , Jon A. Casey , Thomas A. Wassick , David C. Long , Krystyna W. Semkow , Patrick E. Spencer , Robert A. Rita , Richard F. Indyk , Kathleen M. Wiley , Brian R. Sundlof , James Balz , Lori A. Maiorino , Donald R. Wall , Glenn A. Pomerantz
发明人： Mark J. LaPlante , Jon A. Casey , Thomas A. Wassick , David C. Long , Krystyna W. Semkow , Patrick E. Spencer , Robert A. Rita , Richard F. Indyk , Kathleen M. Wiley , Brian R. Sundlof , James Balz , Lori A. Maiorino , Donald R. Wall , Glenn A. Pomerantz
IPC分类号： H01R4300
CPC分类号： H05K3/242 , H05K1/0306 , H05K3/0035 , H05K3/048 , H05K3/184 , H05K3/225 , H05K2203/0191 , H05K2203/0264 , H05K2203/0574 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49158 , Y10T29/49163 , Y10T29/49165 , Y10T29/49171 , Y10T29/49172 , Y10T29/49721 , Y10T29/49732 , Y10T29/49737 , Y10T29/49746
摘要： A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.
摘要翻译：在基板上形成表面电镀金属化的方法和结构。将两层胶带施加到基材的表面。通过暴露衬底表面的两层带切割第一路径。第一路径在衬底的顶表面上连接至少一个导电通孔。通过暴露第一层胶带的第二层胶带切割第二条路径。第二路径从第一路径路由到衬底的边缘。种子层沉积在第二层带的表面上，从而在第一路径中形成种子电镀路径，并在第二路径中形成牺牲种子传导路径。将牺牲种子传导路径连接到衬底边缘处的电镀电位在衬底的表面上产生电镀路径。去除胶带时，去除牺牲路径。

4. 发明授权

US06475555B2 Process for screening features on an electronic substrate with a low viscosity paste 有权
标题翻译：用低粘度糊剂在电子基片上筛选特征的方法
公开(公告)号：US06475555B2
公开(公告)日：2002-11-05
申请号：US09429256
申请日：1999-10-29
申请人： Jon A. Casey , Dinesh Gupta , Lester Wynn Herron , John U. Knickerbocker , David C. Long , Jawahar P. Nayak , Brenda L. Peterson , Robert A. Rita
发明人： Jon A. Casey , Dinesh Gupta , Lester Wynn Herron , John U. Knickerbocker , David C. Long , Jawahar P. Nayak , Brenda L. Peterson , Robert A. Rita
IPC分类号： B05D132
CPC分类号： H05K3/1233 , H01L21/4867 , H01L23/49883 , H01L2924/0002 , H01L2924/09701 , H05K1/092 , H05K3/227 , H05K2201/0116 , H05K2203/0783 , H01L2924/00
摘要： A process wherein a low viscosity, metal-containing paste is screened onto a ceramic greensheet and then sets up to increase its viscosity. In one method, the low viscosity is caused by excess solvent which is then blotted or otherwise removed so that the viscosity of the paste is increased. In an alternative method, the low viscosity paste contains a cross-linking agent which causes the paste to increase its viscosity after screening.
摘要翻译：一种方法，其中将低粘度的含金属浆料筛选到陶瓷毛坯上，然后设置以增加其粘度。在一种方法中，低粘度是由过量的溶剂引起的，然后将其印迹或以其它方式除去，使得糊料的粘度增加。在另一种方法中，低粘度糊剂含有交联剂，其使糊剂在筛选后增加其粘度。

5. 发明授权

US07608295B2 Polyimide compositions and use thereof in ceramic product defect repair 失效
标题翻译：聚酰亚胺组合物及其在陶瓷制品缺陷修复中的应用
公开(公告)号：US07608295B2
公开(公告)日：2009-10-27
申请号：US11684679
申请日：2007-03-12
申请人： Krishna G Sachdev , Michael Berger , Gregg Monjeau , Robert A. Rita , Kathleen M Wiley
发明人： Krishna G Sachdev , Michael Berger , Gregg Monjeau , Robert A. Rita , Kathleen M Wiley
IPC分类号： B05D7/00 , B32B43/00
CPC分类号： H05K3/386 , C03C17/32 , C04B41/009 , C04B41/488 , C04B41/83 , C04B2111/00844 , C08G73/10 , C08G73/1014 , C08G73/1017 , C08G73/1039 , C08G73/1042 , C08G73/1067 , C08G73/1075 , H01L21/4807 , H05K1/0306 , H05K3/225 , H05K2201/0154 , C04B41/455 , C04B35/00
摘要： A method to repair ceramic substrates is disclosed using a novel polyimide polymer which has high thermal stability, resistance to fluxes and flux residue cleaning solvents and processes, good mechanical properties, good adhesion to all contacting surfaces with low moisture uptake and good flow properties suitable for repairing chipped ceramic, filling deep trench or vias and writing passivation lines with automated process The polyimide polymer is made by reacting aromatic dianhydride and aromatic diamine monomers with a stoichiometric offset and end capping the resulting polymer when the reaction is completed. The preferred polyimide is made using a molar excess of diamine which is end-capped using an anhydride.
摘要翻译：公开了一种修复陶瓷基板的方法，该方法具有高热稳定性，耐焊剂和焊剂残留物清洗溶剂和工艺的良好的机械性能，对所有接触表面的良好粘合性，具有低吸湿性和良好的流动性能，适用于修复切屑陶瓷，填充深沟或通孔，并用自动化工艺写入钝化线聚酰亚胺聚合物是通过使化学计量偏移的芳族二酐和芳族二胺单体反应制得的，并在反应完成时封端所得聚合物。使用摩尔过量的二胺制成优选的聚酰亚胺，其使用酸酐封端。

6. 发明授权

US06713686B2 Apparatus and method for repairing electronic packages 失效
标题翻译：用于修理电子封装的装置和方法
公开(公告)号：US06713686B2
公开(公告)日：2004-03-30
申请号：US10053362
申请日：2002-01-18
申请人： Wiren D. Becker , Dinesh Gupta , Sudipta K. Ray , Robert A. Rita , Herbert I. Stoller , Kathleen M. Wiley
发明人： Wiren D. Becker , Dinesh Gupta , Sudipta K. Ray , Robert A. Rita , Herbert I. Stoller , Kathleen M. Wiley
IPC分类号： H01R1204
CPC分类号： H01L23/5382 , H01L2924/0002 , H01L2924/09701 , H05K1/0292 , H05K1/113 , Y10T29/49155 , H01L2924/00
摘要： A multi chip module substrate arranged with repair vias and repair lines extending between repair vias of the chip sites of the module by which repairs can be effected to overcome defects in the module circuits and a method for effecting the repairs of defects in the circuits of this module. A defect can occur in any one of a first signal via, a second signal via, and a circuit line extending between and intended to electrically connect the first signal via and the second signal via. After a defective circuit is identified, the signal vias of the circuit are isolated. Then, the first signal via of the defective circuit is electrically connected to that repair via of the chip site having the first signal via that is connected to that repair via of the chip site having the second signal via and the second signal via of the defective circuit is electrically connected to that repair via of the chip site having the second signal via that is connected to that repair via of the chip site having the first signal via.
摘要翻译：多芯片模块基板，其布置有在模块的芯片位置的修复通道之间延伸的修理通孔和修复线，通过该维修线可以进行修理以克服模块电路中的缺陷，以及用于实现该电路中的缺陷的修复的方法模块。在第一信号通孔，第二信号通孔以及在第一信号通孔和第二信号通孔之间延伸并且用于电连接第一信号通孔的电路线中的任何一个中可能会发生缺陷。识别出故障电路后，电路的信号通孔被隔离。然后，故障电路的第一信号通路经由具有第一信号的芯片位置的修复通孔经由与具有第二信号通路的芯片位置的修复通路连接，并且具有缺陷电路的第二信号通孔电路经由具有第二信号的芯片位置的修复通路经由与经由具有第一信号通孔的芯片位置的修复通路相连接。

7. 发明授权

US5948193A Process for fabricating a multilayer ceramic substrate from thin greensheet 失效
标题翻译：从薄毛坯制造多层陶瓷基板的工艺
公开(公告)号：US5948193A
公开(公告)日：1999-09-07
申请号：US886032
申请日：1997-06-30
申请人： Michael A. Cohn , Jon A. Casey , Christopher N. Collins , Robert A. Rita , Robert J. Sullivan , Adrienne M. Tirch , Leslie J. Wiands , Ryan W. Wuthrich
发明人： Michael A. Cohn , Jon A. Casey , Christopher N. Collins , Robert A. Rita , Robert J. Sullivan , Adrienne M. Tirch , Leslie J. Wiands , Ryan W. Wuthrich
IPC分类号： C04B35/622 , B28B1/30 , B32B18/00 , H01G4/30 , H01L21/48 , H05K1/03 , H05K3/46 , B32B31/26
CPC分类号： B32B18/00 , H01L21/4857 , C04B2235/6567 , C04B2235/658 , C04B2237/12 , C04B2237/343 , C04B2237/704 , H05K1/0306 , H05K3/4629
摘要： Greensheets having enhanced flexibility and strength are prepared from a greensheet casting composition comprising alumina or other ceramic having a mean particle size of less than about 1 micron and being substantially unimodal, a binder resin, a solvent system and a plasticizer. The greensheets may be formed having a thickness of about 50 microns using conventional greensheet fabricating devices. The greensheets are particularly suitable as dielectric layers for internal layer capacitors in a multilayer ceramic substrate. A preferred co-sintering heating profile to avoid blistering of the MLC package is also provided to form the capacitor containing MLC.
摘要翻译：具有增强的柔韧性和强度的格式纸由包含氧化铝或平均粒径小于约1微米并且基本上单峰的其它陶瓷，粘合剂树脂，溶剂体系和增塑剂的毛坯铸塑组合物制备。可以使用常规的毛坯制造装置形成厚度为约50微米的毛坯。毛坯特别适合作为多层陶瓷基板中的内层电容器的介电层。还提供了优选的共烧结加热曲线，以避免MLC封装的起泡，以形成包含MLC的电容器。

8. 发明授权

US06413339B1 Low temperature sintering of ferrite materials 失效
标题翻译：铁氧体材料的低温烧结
公开(公告)号：US06413339B1
公开(公告)日：2002-07-02
申请号：US09470457
申请日：1999-12-22
申请人： Govindarajan Natarajan , Jon A. Casey , Martin E. Klepeis , John U. Knickerbocker , Srinivasa S. N. Reddy , Robert A. Rita , Subhash L. Shinde
发明人： Govindarajan Natarajan , Jon A. Casey , Martin E. Klepeis , John U. Knickerbocker , Srinivasa S. N. Reddy , Robert A. Rita , Subhash L. Shinde
IPC分类号： B32B3116
CPC分类号： C04B35/2683 , C04B35/64 , H01F1/0027 , H01F41/0253 , Y10T156/1056 , Y10T156/1057
摘要： The present invention relates generally to a new metal/magnetic-ceramic laminate with through-holes and process thereof. More particularly, the invention encompasses a new process for fabrication of a large area ceramic laminate magnet with a significant number of holes, integrated metal plate(s) and co-sintered electrodes for electron and electron beam control. The present invention also relates to a magnetic matrix display (MMD), and electron beam source, and methods of manufacture thereof.
摘要翻译：本发明一般涉及具有通孔的新的金属/磁陶瓷层压体及其工艺。更具体地，本发明包括用于制造具有大量孔的大面积陶瓷层压体磁体的新方法，用于电子和电子束控制的集成金属板和共烧结电极。本发明还涉及磁矩阵显示器（MMD）和电子束源，及其制造方法。

9. 发明授权

US06231707B1 Method of forming a multilayer ceramic substrate with max-punched vias 失效
标题翻译：形成具有最大冲孔的多孔陶瓷基板的方法
公开(公告)号：US06231707B1
公开(公告)日：2001-05-15
申请号：US09158615
申请日：1998-09-22
申请人： Dinesh Gupta , L. Wynn Herron , John U. Knickerbocker , David C. Long , Jawahar P. Nayak , Robert A. Rita
发明人： Dinesh Gupta , L. Wynn Herron , John U. Knickerbocker , David C. Long , Jawahar P. Nayak , Robert A. Rita
IPC分类号： B32B3126
CPC分类号： H05K3/4061 , H01L21/486 , H01L23/49827 , H01L2924/0002 , H05K1/0306 , H05K3/4611 , H05K3/4629 , H05K2201/09063 , H05K2201/096 , H05K2201/09609 , H05K2203/308 , Y10T156/1056 , H01L2924/00
摘要： In the formation of multilayer ceramic substrates, greensheets are utilized which have the same pattern and number of vias punched in each greensheet. Then, selected vias may be filled with metallic paste to form the internal connections of the multilayer ceramic substrate. The remaining vias may be filled with a fugitive material or left totally unfilled. Also disclosed is the multilayer ceramic substrate produced by this method.
摘要翻译：在多层陶瓷基板的形成中，使用具有与每个毛坯中冲孔相同的图案和数量的通孔的刮板。然后，可以用金属浆料填充所选择的通孔，以形成多层陶瓷基板的内部连接。其余的通孔可能充满了一种逃逸材料，或者完全没有填充。还公开了通过该方法制造的多层陶瓷基板。

10. 发明授权

US06461493B1 Decoupling capacitor method and structure using metal based carrier 有权
标题翻译：使用金属载体去耦电容器的方法和结构
公开(公告)号：US06461493B1
公开(公告)日：2002-10-08
申请号：US09472136
申请日：1999-12-23
申请人： Mukta S. Farooq , Shaji Farooq , John U. Knickerbocker , Robert A. Rita , Srinivasa N. Reddy
发明人： Mukta S. Farooq , Shaji Farooq , John U. Knickerbocker , Robert A. Rita , Srinivasa N. Reddy
IPC分类号： C25D502
CPC分类号： H05K3/445 , H01G4/10 , H05K1/053 , H05K1/162 , H05K3/4069 , H05K2201/09554 , H05K2203/0315 , H05K2203/1142
摘要： A process for fabricating a structure using a metal carrier and forming a double capacitor structure. The process comprises forming a first via hole through the metal carrier, forming a dielectric layer around the metal carrier and inside the first via hole, forming a second via hole through the dielectric layer and the metal carrier, and filling at least one of the via holes with conductive material. In one preferred embodiment, the process further comprises forming a third via hole through the metal carrier before the forming of a dielectric layer, wherein the dielectric layer is formed around the metal carrier, inside the first via hole, and inside the third via hole. The first via hole, the second via hole, and the third via hole are all filled with a conductive material. In one preferred embodiment, the dielectric layer comprises a top surface opposed to a bottom surface, and electrodes are formed on at least one of the top surface and the bottom surface of the dielectric layer.
摘要翻译：一种使用金属载体制造结构并形成双电容器结构的方法。该工艺包括形成通过金属载体的第一通孔，在金属载体周围形成电介质层，并在第一通孔内部形成介电层，形成穿过电介质层和金属载体的第二通孔，并填充至少一个通孔孔与导电材料。在一个优选实施例中，该方法还包括在形成电介质层之前通过金属载体形成第三通孔，其中介电层围绕金属载体形成在第一通孔的内部，以及在第三通孔的内部。第一通孔，第二通孔和第三通孔均填充有导电材料。在一个优选实施例中，电介质层包括与底表面相对的顶表面，并且在介电层的顶表面和底表面中的至少一个上形成电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式