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1. 发明申请

US20120141013A1 REGION BASED VIRTUAL FOURIER FILTER 有权
标题翻译：基于区域的虚拟FOURIER过滤器
公开(公告)号：US20120141013A1
公开(公告)日：2012-06-07
申请号：US13381696
申请日：2011-08-01
申请人： Lisheng Gao , Kenong Wu , Allen Park , Ellis Chang , Khurram Zafar , Junqing Huang , Ping Gu , Christopher Maher , Grace H. Chen , Songnian Rong , Liu-Ming Wu
发明人： Lisheng Gao , Kenong Wu , Allen Park , Ellis Chang , Khurram Zafar , Junqing Huang , Ping Gu , Christopher Maher , Grace H. Chen , Songnian Rong , Liu-Ming Wu
IPC分类号： G06K9/62
CPC分类号： G06T7/001 , G06T2207/10061 , G06T2207/20021 , G06T2207/20056 , G06T2207/30148
摘要： The present invention includes searching imagery data in order to identify one or more patterned regions on a semiconductor wafer, generating one or more virtual Fourier filter (VFF) working areas, acquiring an initial set of imagery data from the VFF working areas, defining VFF training blocks within the identified patterned regions of the VFF working areas utilizing the initial set of imagery data, wherein each VFF training block is defined to encompass a portion of the identified patterned region displaying a selected repeating pattern, calculating an initial spectrum for each VFF training block utilizing the initial set of imagery data from the VFF training blocks, and generating a VFF for each training block by identifying frequencies of the initial spectrum having maxima in the frequency domain, wherein the VFF is configured to null the magnitude of the initial spectrum at the frequencies identified to display spectral maxima.
摘要翻译：本发明包括搜索图像数据以便识别半导体晶片上的一个或多个图案化区域，生成一个或多个虚拟傅立叶滤波器（VFF）工作区域，从VFF工作区域获取初始图像数据集，定义VFF训练利用初始的图像数据集，在VFF工作区域的所识别的图案化区域内的块，其中每个VFF训练块被定义为包含所识别的图案化区域的一部分，显示所选择的重复模式，计算每个VFF训练块的初始频谱利用来自VFF训练块的初始图像数据组，以及通过识别在频域中具有最大值的初始频谱的频率，为每个训练块生成VFF，其中VFF被配置为在识别出显示频谱最大值的频率。

2. 发明授权

US08989479B2 Region based virtual fourier filter 有权
标题翻译：基于区域的虚拟傅里叶滤波器
公开(公告)号：US08989479B2
公开(公告)日：2015-03-24
申请号：US13381696
申请日：2011-08-01
申请人： Lisheng Gao , Kenong Wu , Allen Park , Ellis Chang , Khurram Zafar , Junqing Huang , Ping Gu , Christopher Maher , Grace H. Chen , Songnian Rong , Liu-Ming Wu
发明人： Lisheng Gao , Kenong Wu , Allen Park , Ellis Chang , Khurram Zafar , Junqing Huang , Ping Gu , Christopher Maher , Grace H. Chen , Songnian Rong , Liu-Ming Wu
IPC分类号： G06K9/00 , G06T7/00
CPC分类号： G06T7/001 , G06T2207/10061 , G06T2207/20021 , G06T2207/20056 , G06T2207/30148
摘要： The present invention includes searching imagery data in order to identify one or more patterned regions on a semiconductor wafer, generating one or more virtual Fourier filter (VFF) working areas, acquiring an initial set of imagery data from the VFF working areas, defining VFF training blocks within the identified patterned regions of the VFF working areas utilizing the initial set of imagery data, wherein each VFF training block is defined to encompass a portion of the identified patterned region displaying a selected repeating pattern, calculating an initial spectrum for each VFF training block utilizing the initial set of imagery data from the VFF training blocks, and generating a VFF for each training block by identifying frequencies of the initial spectrum having maxima in the frequency domain, wherein the VFF is configured to null the magnitude of the initial spectrum at the frequencies identified to display spectral maxima.
摘要翻译：本发明包括搜索图像数据以便识别半导体晶片上的一个或多个图案化区域，生成一个或多个虚拟傅立叶滤波器（VFF）工作区域，从VFF工作区域获取初始图像数据集，定义VFF训练利用初始的图像数据集，在VFF工作区域的所识别的图案化区域内的块，其中每个VFF训练块被定义为包含所识别的图案化区域的一部分，显示所选择的重复模式，计算每个VFF训练块的初始频谱利用来自VFF训练块的初始图像数据组，以及通过识别在频域中具有最大值的初始频谱的频率，为每个训练块生成VFF，其中VFF被配置为在识别出显示频谱最大值的频率。

3. 发明授权

US09087367B2 Determining design coordinates for wafer defects 有权
标题翻译：确定晶圆缺陷的设计坐标
公开(公告)号：US09087367B2
公开(公告)日：2015-07-21
申请号：US13601891
申请日：2012-08-31
申请人： Ellis Chang , Michael J. Van Riet , Allen Park , Khurram Zafar , Santosh Bhattacharyya
发明人： Ellis Chang , Michael J. Van Riet , Allen Park , Khurram Zafar , Santosh Bhattacharyya
IPC分类号： G06K9/62 , G06T7/00
CPC分类号： G06T7/001 , G06T7/74 , G06T2207/30148
摘要： Methods and systems for determining design coordinates for defects detected on a wafer are provided. One method includes aligning a design for a wafer to defect review tool images for defects detected in multiple swaths on the wafer by an inspection tool, determining a position of each of the defects in design coordinates based on results of the aligning, separately determining a defect position offset for each of the multiple swaths based on the swath in which each of the defects was detected (swath correction factor), the design coordinates for each of the defects, and a position for each of the defects determined by the inspection tool, and determining design coordinates for the other defects detected in the multiple swaths by the inspection tool by applying the appropriate swath correction factor to those defects.
摘要翻译：提供了用于确定在晶片上检测到的缺陷的设计坐标的方法和系统。一种方法包括对准晶片的设计以通过检查工具对晶片上的多个条带中检测到的缺陷来检查工具图像，基于对准的结果确定每个缺陷在设计坐标中的位置，分别确定缺陷基于检测到每个缺陷的条带（条纹校正因子），每个缺陷的设计坐标以及由检查工具确定的每个缺陷的位置，针对每个多个条带的位置偏移，以及通过对这些缺陷应用适当的条纹校正因子来确定检测工具在多个条中检测到的其他缺陷的设计坐标。

4. 发明申请

US20070288219A1 METHODS AND SYSTEMS FOR UTILIZING DESIGN DATA IN COMBINATION WITH INSPECTION DATA 有权
标题翻译：与检验数据组合使用设计数据的方法和系统
公开(公告)号：US20070288219A1
公开(公告)日：2007-12-13
申请号：US11561659
申请日：2006-11-20
申请人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
发明人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
IPC分类号： G06F17/50
CPC分类号： G06T7/0006 , G03F1/84 , G06F17/5081 , G06T7/0008 , G06T2207/20076 , G06T2207/30148
摘要： Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.
摘要翻译：提供了与检测数据结合使用设计数据的各种方法和系统。用于对在晶片上检测到的缺陷进行合并的计算机实现的方法包括将设计数据的部分靠近设计数据空间中的缺陷的位置进行比较。该方法还包括基于比较步骤的结果确定部分中的设计数据是否至少相似。此外，该方法包括将组中的缺陷合并成使得设计数据中靠近每个组中的缺陷的位置的部分至少相似。该方法还包括将合并步骤的结果存储在存储介质中。

5. 发明申请

US20130064442A1 Determining Design Coordinates for Wafer Defects 有权
标题翻译：确定晶圆缺陷的设计坐标
公开(公告)号：US20130064442A1
公开(公告)日：2013-03-14
申请号：US13601891
申请日：2012-08-31
申请人： Ellis Chang , Michael J. Van Riet , Allen Park , Khurram Zafar , Santosh Bhattacharyya
发明人： Ellis Chang , Michael J. Van Riet , Allen Park , Khurram Zafar , Santosh Bhattacharyya
IPC分类号： G06K9/62
CPC分类号： G06T7/001 , G06T7/74 , G06T2207/30148
摘要： Methods and systems for determining design coordinates for defects detected on a wafer are provided. One method includes aligning a design for a wafer to defect review tool images for defects detected in multiple swaths on the wafer by an inspection tool, determining a position of each of the defects in design coordinates based on results of the aligning, separately determining a defect position offset for each of the multiple swaths based on the swath in which each of the defects was detected (swath correction factor), the design coordinates for each of the defects, and a position for each of the defects determined by the inspection tool, and determining design coordinates for the other defects detected in the multiple swaths by the inspection tool by applying the appropriate swath correction factor to those defects.
摘要翻译：提供了用于确定在晶片上检测到的缺陷的设计坐标的方法和系统。一种方法包括对准晶片的设计以通过检查工具对晶片上的多个条带中检测到的缺陷来检查工具图像，基于对准的结果确定每个缺陷在设计坐标中的位置，分别确定缺陷基于检测到每个缺陷的条带（条纹校正因子），每个缺陷的设计坐标以及由检查工具确定的每个缺陷的位置，针对每个多个条带的位置偏移，以及通过对这些缺陷应用适当的条纹校正因子来确定检测工具在多个条中检测到的其他缺陷的设计坐标。

6. 发明授权

US08923600B2 Methods and systems for utilizing design data in combination with inspection data 有权
标题翻译：利用设计数据结合检验数据的方法和系统
公开(公告)号：US08923600B2
公开(公告)日：2014-12-30
申请号：US12534547
申请日：2009-08-03
申请人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
发明人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
IPC分类号： G06K9/00 , G06F17/50 , G03F1/84
CPC分类号： G06T7/0006 , G03F1/84 , G06F17/5081 , G06T7/0008 , G06T2207/20076 , G06T2207/30148
摘要： Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.
摘要翻译：提供了与检测数据结合使用设计数据的各种方法和系统。用于对在晶片上检测到的缺陷进行合并的计算机实现的方法包括将设计数据的部分靠近设计数据空间中的缺陷的位置进行比较。该方法还包括基于比较步骤的结果确定部分中的设计数据是否至少相似。此外，该方法包括将组中的缺陷合并成使得设计数据中靠近每个组中的缺陷的位置的部分至少相似。该方法还包括将合并步骤的结果存储在存储介质中。

7. 发明申请

US20090297019A1 METHODS AND SYSTEMS FOR UTILIZING DESIGN DATA IN COMBINATION WITH INSPECTION DATA 有权
标题翻译：与检验数据组合使用设计数据的方法和系统
公开(公告)号：US20090297019A1
公开(公告)日：2009-12-03
申请号：US12534547
申请日：2009-08-03
申请人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
发明人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
IPC分类号： G06K9/00
CPC分类号： G06T7/0006 , G03F1/84 , G06F17/5081 , G06T7/0008 , G06T2207/20076 , G06T2207/30148
摘要： Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.
摘要翻译：提供了与检测数据结合使用设计数据的各种方法和系统。用于对在晶片上检测到的缺陷进行合并的计算机实现的方法包括将设计数据的部分靠近设计数据空间中的缺陷的位置进行比较。该方法还包括基于比较步骤的结果确定部分中的设计数据是否至少相似。此外，该方法包括将组中的缺陷合并成使得设计数据中靠近每个组中的缺陷的位置的部分至少相似。该方法还包括将合并步骤的结果存储在存储介质中。

8. 发明授权

US07570796B2 Methods and systems for utilizing design data in combination with inspection data 有权
标题翻译：利用设计数据结合检验数据的方法和系统
公开(公告)号：US07570796B2
公开(公告)日：2009-08-04
申请号：US11561659
申请日：2006-11-20
申请人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
发明人： Khurram Zafar , Sagar Kekare , Ellis Chang , Allen Park , Peter Rose
IPC分类号： G06K9/00
CPC分类号： G06T7/0006 , G03F1/84 , G06F17/5081 , G06T7/0008 , G06T2207/20076 , G06T2207/30148
摘要： Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.
摘要翻译：提供了与检测数据结合使用设计数据的各种方法和系统。用于对在晶片上检测到的缺陷进行合并的计算机实现的方法包括将设计数据的部分靠近设计数据空间中的缺陷的位置进行比较。该方法还包括基于比较步骤的结果确定部分中的设计数据是否至少相似。此外，该方法包括将组中的缺陷合并成使得设计数据中靠近每个组中的缺陷的位置的部分至少相似。该方法还包括将合并步骤的结果存储在存储介质中。

9. 发明授权

US08559001B2 Inspection guided overlay metrology 有权
公开(公告)号：US08559001B2
公开(公告)日：2013-10-15
申请号：US12984679
申请日：2011-01-05
申请人： Ellis Chang , Amir Widmann , Allen Park
发明人： Ellis Chang , Amir Widmann , Allen Park
IPC分类号： G01N21/00 , G01R31/26
CPC分类号： G01N21/9501 , G01N21/95607 , G01N2021/8822 , G03F7/70633 , G03F7/7065 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： Inspection guided overlay metrology may include performing a pattern search in order to identify a predetermined pattern on a semiconductor wafer, generating a care area for all instances of the predetermined pattern on the semiconductor wafer, identifying defects within generated care areas by performing an inspection scan of each of the generated care areas, wherein the inspection scan includes a low-threshold or a high sensitivity inspection scan, identifying overlay sites of the predetermined pattern of the semiconductor wafer having a measured overlay error larger than a selected overlay specification utilizing a defect inspection technique, comparing location data of the identified defects of a generated care area to location data of the identified overlay sites within the generated care area in order to identify one or more locations wherein the defects are proximate to the identified overlay sites, and generating a metrology sampling plan based on the identified locations.

10. 发明申请

US20110172804A1 Scanner Performance Comparison And Matching Using Design And Defect Data 有权
标题翻译：使用设计和缺陷数据扫描仪性能比较和匹配
公开(公告)号：US20110172804A1
公开(公告)日：2011-07-14
申请号：US12919757
申请日：2010-07-12
申请人： Allen Park , Ellis Chang , Masami Aoki , Chris Chih-Chien Young , Martin Plihal , Michael John Van Riet
发明人： Allen Park , Ellis Chang , Masami Aoki , Chris Chih-Chien Young , Martin Plihal , Michael John Van Riet
IPC分类号： G06F19/00
CPC分类号： H01L22/12 , G03F7/70516 , G03F7/70625 , G03F7/70641 , G03F7/7065
摘要： A system and method of matching multiple scanners using design and defect data are described. A golden wafer is processed using a golden tool. A second wafer is processed using a second tool. Both tools provide focus/exposure modulation. Wafer-level spatial signatures of critical structures for both wafers can be compared to evaluate the behavior of the scanners. Critical structures can be identified by binning defects on the golden wafer having similar patterns. In one embodiment, the signatures must match within a certain percentage or the second tool is characterized as a “no match”. Reticles can be compared in a similar manner, wherein the golden and second wafers are processed using a golden reticle and a second reticle, respectively.
摘要翻译：描述使用设计和缺陷数据匹配多个扫描仪的系统和方法。使用金色工具处理金色晶圆。使用第二工具处理第二晶片。两种工具都提供对焦/曝光调制。可以比较两个晶片的关键结构的晶片级空间特征，以评估扫描仪的行为。关键结构可以通过在具有相似图案的金色晶片上合并缺陷来识别。在一个实施例中，签名必须在一定百分比内匹配，或者第二工具被表征为“不匹配”。可以以类似的方式比较网状物，其中分别使用金色掩模版和第二掩模版来处理金色和第二晶片。

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