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    • 1. 发明授权
    • Semiconductor element and method for fabricating the same
    • 半导体元件及其制造方法
    • US07176098B2
    • 2007-02-13
    • US11062851
    • 2005-02-23
    • Keisuke KojimaToshiharu TanboKeiichi Murayama
    • Keisuke KojimaToshiharu TanboKeiichi Murayama
    • H01L21/331H01L21/8222
    • H01L29/7371H01L29/0817H01L29/66318
    • A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first semiconductor layer covering the entire top surface of the base layer and a second semiconductor layer formed on a predetermined part of the first semiconductor layer. An inactivated region is formed, by ion implantation, in a region of the collector layer located below the base layer except for a part thereof corresponding to the second semiconductor layer. The edge of the inactivated region is located away from the edge of the second semiconductor layer, and a region of the first semiconductor layer between the edge of the inactivated region and the edge of the second semiconductor layer is depleted.
    • 异质结双极晶体管包括集电极层,形成在集电极层上的基极层和形成在基极层上的发射极层。 发射极层包括覆盖基底层的整个顶表面的第一半导体层和形成在第一半导体层的预定部分上的第二半导体层。 通过离子注入在位于基底层下方的除了与第二半导体层相对应的部分之外的集电极层的区域中形成钝化区域。 钝化区域的边缘位于远离第二半导体层的边缘的位置,并且在非活化区域的边缘和第二半导体层的边缘之间的第一半导体层的区域被耗尽。
    • 4. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20050145884A1
    • 2005-07-07
    • US10902120
    • 2004-07-30
    • Masanobu NogomeAkiyoshi TamuraKeiichi Murayama
    • Masanobu NogomeAkiyoshi TamuraKeiichi Murayama
    • H01L21/331H01L29/737H01L29/739
    • H01L29/7371H01L29/0821
    • It is the object of the present invention to provide a semiconductor device having an improved breakdown voltage on high power output, the semiconductor device comprising a n-type GaAs subcollector layer 101, a n-type GaAs intermediate collector layer 102 formed between a collector layer 103 and the subcollector layer 101, the n-type GaAs collector layer 103, a p-type GaAs base layer 104, a n-type InGaP second emitter layer 105, a n-type GaAs first emitter layer 106, and a n-type InGaAs emitter contact layer 107, and a concentration of impurities in the intermediate collector layer 102 is higher than a concentration of impurities in the collector layer 103 and is lower than a concentration of impurities in the subcollector layer 101.
    • 本发明的目的是提供一种在高功率输出上具有改进的击穿电压的半导体器件,该半导体器件包括n型GaAs子集电极层101,n型GaAs中间集电极层102,其形成在集电极层 103和子集电极层101,n型GaAs集电极层103,p型GaAs基极层104,n型InGaP第二发射极层105,n型GaAs第一发射极层106和n型 InGaAs发射极接触层107,并且中间集电极层102中的杂质浓度高于集电极层103中的杂质浓度,并且低于子集电极层101中的杂质浓度。
    • 6. 发明授权
    • Heterojunction bipolar transistor and manufacturing method thereof
    • 异质结双极晶体管及其制造方法
    • US07728357B2
    • 2010-06-01
    • US11614113
    • 2006-12-21
    • Keiichi MurayamaAkiyoshi TamuraHirotaka MiyamotoKenichi Miyajima
    • Keiichi MurayamaAkiyoshi TamuraHirotaka MiyamotoKenichi Miyajima
    • H01L29/739
    • H01L29/7371H01L29/0821H01L29/66318
    • The object of the present invention is to provide a heterojunction bipolar transistor with high breakdown tolerance which can be manufactured at a high reproducibility and a high yield, the heterojunction bipolar transistor includes: a sub-collector layer; a collector layer formed on the sub-collector layer; a base layer formed on the collector layer; and an emitter layer, which is formed on the base layer and is made of a semiconductor that has a larger bandgap than a semiconductor of the base layer, in which the collector layer includes: a first collector layer formed on the sub-collector layer; a second collector layer formed on the first collector layer; and a third collector layer formed between the second collector layer and the base layer, a semiconductor of the first collector layer differs from semiconductors of the third collector layer and the second collector layer, and an impurity concentration of the second collector layer is lower than an impurity concentration of the sub-collector layer and higher than an impurity concentration of the third collector layer.
    • 本发明的目的是提供一种能够以高再现性和高产率制造的具有高击穿耐受性的异质结双极晶体管,该异质结双极晶体管包括:亚集电极层; 形成在所述副集电极层上的集电体层; 形成在集电体层上的基层; 以及发射极层,其形成在所述基底层上并且由具有比所述基底层的半导体更大的带隙的半导体形成,所述集电极层包括:形成在所述副集电极层上的第一集电体层; 形成在所述第一集电体层上的第二集电体层; 以及形成在所述第二集电体层和所述基极层之间的第三集电体层,所述第一集电体层的半导体与所述第三集电体层和所述第二集电体层的半导体不同,所述第二集电体层的杂质浓度低于 副集电极层的杂质浓度高于第三集电体层的杂质浓度。