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1. 发明授权

US06428894B1 Tunable and removable plasma deposited antireflective coatings 失效
标题翻译：可调谐和可移除等离子体沉积的抗反射涂层
公开(公告)号：US06428894B1
公开(公告)日：2002-08-06
申请号：US08868772
申请日：1997-06-04
申请人： Katherina E. Babich , Alessandro Cesare Callegari , Julien Fontaine , Alfred Grill , Christopher V. Jahnes , Vishnubhai Vitthalbhai Patel
发明人： Katherina E. Babich , Alessandro Cesare Callegari , Julien Fontaine , Alfred Grill , Christopher V. Jahnes , Vishnubhai Vitthalbhai Patel
IPC分类号： B32B900
CPC分类号： H01L21/02274 , C23C16/26 , C23C16/30 , G03F7/091 , H01L21/02115 , H01L21/02271 , H01L21/0276 , H01L21/31144 , H01L21/312 , H01L21/3127 , Y10T428/24942 , Y10T428/24975 , Y10T428/265 , Y10T428/30
摘要： Disclosed is vapor deposited BARC and method of preparing tunable and removable antireflective coatings based on amorphous carbon films. These films can be hydrogenated, fluorinated, nitrogenated carbon films. Such films have an index of refraction and an extinction coefficient tunable from about 1.4 to about 2.1 and from about 0.1 to about 0.6, respectively, at UV and DUV wavelengths, in particular 365, 248 and 193 nm. Moreover, the films produced by the present invention can be deposited over device topography with high conformality, and they are etchable by oxygen and/or a fluoride ion etch process. Because of their unique properties, these films can be used to form a tunable and removable antireflective coating at UV and DUV wavelengths to produce near zero reflectance at the resist/BARC coating interface. This BARC greatly improves performance of semiconductor chips.
摘要翻译：公开了蒸汽沉积的BARC和基于无定形碳膜制备可调谐和可去除的抗反射涂层的方法。这些膜可以是氢化，氟化，氮化的碳膜。这些膜的折射率和消光系数分别在UV和DUV波长，特别是365,248和193nm处可调，分别为约1.4至约2.1和约0.1至约0.6。此外，由本发明生产的膜可以以高共形性沉积在器件形貌上，并且它们可通过氧和/或氟离子蚀刻工艺进行蚀刻。由于其独特的性质，这些膜可用于在UV和DUV波长处形成可调谐和可去除的抗反射涂层，以在抗蚀剂/ BARC涂层界面处产生接近零的反射率。该BARC大大提高了半导体芯片的性能。

2. 发明授权

US06577011B1 Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same 有权
标题翻译：具有低介电常数绝缘体的芯片互连布线结构及其制造方法
公开(公告)号：US06577011B1
公开(公告)日：2003-06-10
申请号：US09715559
申请日：2000-11-17
申请人： Leena P. Buchwalter , Alessandro Cesare Callegari , Stephan Alan Cohen , Teresita Ordonez Graham , John P. Hummel , Christopher V. Jahnes , Sampath Purushothaman , Katherine Lynn Saenger , Jane Margaret Shaw
发明人： Leena P. Buchwalter , Alessandro Cesare Callegari , Stephan Alan Cohen , Teresita Ordonez Graham , John P. Hummel , Christopher V. Jahnes , Sampath Purushothaman , Katherine Lynn Saenger , Jane Margaret Shaw
IPC分类号： H01L2348
CPC分类号： H01L21/7682 , H01L23/5222 , H01L23/53223 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： The present invention includes a multilevel air-gap-containing interconnect wiring structure including: a collection of interspersed line levels and via levels, the via levels and line levels containing conductive via and line features embedded in a dielectric having an air-gap and solid dielectric. The air-gap and solid dielectric includes (i) one or more solid dielectrics only in the shadows of the conductive features in overlying levels and (ii) a gaseous dielectric elsewhere in the structure. The collection of line levels and via levels are topped by a laminated thin, taut insulating cover layer having openings to selected conductive features in the topmost underlying line or via layer, and the openings are filled with conductive material connecting to terminal pad contacts on the insulating cover layer.
摘要翻译：本发明包括一个多级含气隙的互连配线结构，其包括：散布的线路层级和通孔层的集合，通孔层和线路层包含嵌入在具有空隙和固体电介质的电介质中的导电通孔和线特征。气隙和固体电介质包括（i）仅在覆盖层中的导电特征的阴影中的一个或多个固体电介质，以及（ii）结构中其它地方的气体介电。线路层和通孔层的集合由层叠的薄的，紧密的绝缘覆盖层覆盖，其具有在最上面的下面的线或通孔层中选择的导电特征的开口，并且开口填充有连接到绝缘体上的端子焊盘触点的导电材料覆盖层。

3. 发明授权

US06184121B2 Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same 失效
标题翻译：具有低介电常数绝缘体的芯片互连布线结构及其制造方法
公开(公告)号：US06184121B2
公开(公告)日：2001-02-06
申请号：US09112919
申请日：1998-07-09
申请人： Leena P. Buchwalter , Alessandro Cesare Callegari , Stephan Alan Cohen , Teresita Ordonez Graham , John P. Hummel , Christopher V. Jahnes , Sampath Purushothaman , Katherine Lynn Saenger , Jane Margaret Shaw
发明人： Leena P. Buchwalter , Alessandro Cesare Callegari , Stephan Alan Cohen , Teresita Ordonez Graham , John P. Hummel , Christopher V. Jahnes , Sampath Purushothaman , Katherine Lynn Saenger , Jane Margaret Shaw
IPC分类号： H01L214763
CPC分类号： H01L23/53228 , H01L21/7682 , H01L23/5222 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A method to achieve a very low effective dielectric constant in high performance back end of the line chip interconnect wiring and the resulting multilayer structure are disclosed. The process involves fabricating the multilayer interconnect wiring structure by methods and materials currently known in the state of the art of semiconductor processing; removing the intralevel dielectric between the adjacent metal features by a suitable etching process; applying a thin passivation coating over the exposed etched structure; annealing the etched structure to remove plasma damage; laminating an insulating cover layer to the top surface of the passivated metal features; optionally depositing an insulating environmental barrier layer on top of the cover layer; etching vias in the environmental barrier layer, cover layer and the thin passivation layer for terminal pad contacts; and completing the device by fabricating terminal input/output pads. The method obviates issues such as processability and thermal stability associated with low dielectric constant materials by avoiding their use. Since air, which has the lowest dielectric constant, is used as the intralevel dielectric the structure created by this method would possess a very low capacitance and hence fast propagation speeds. Such structure is ideally suitable for high density interconnects required in high performance microelectronic device chips.
摘要翻译：公开了一种在线芯片互连布线和所得多层结构的高性能后端中实现非常低的有效介电常数的方法。该方法涉及通过目前在半导体处理领域中已知的方法和材料制造多层互连布线结构; 通过合适的蚀刻工艺去除相邻金属特征之间的层间电介质; 在暴露的蚀刻结构上施加薄的钝化涂层; 退火蚀刻结构以去除等离子体损伤; 将绝缘覆盖层层压到钝化金属特征的顶表面; 可选地在覆盖层的顶部上沉积绝缘环境阻挡层; 在环境阻挡层，覆盖层和用于端子焊盘触点的薄钝化层中蚀刻通孔; 并通过制造端子输入/输出焊盘来完成该器件。该方法通过避免其使用而消除了与低介电常数材料相关的加工性和热稳定性等问题。由于具有最低介电常数的空气被用作体内电介质，所以通过该方法产生的结构将具有非常低的电容并因此具有快速的传播速度。这种结构理想地适用于高性能微电子器件芯片所需的高密度互连。

4. 发明授权

US06395650B1 Methods for forming metal oxide layers with enhanced purity 失效
标题翻译：形成纯度提高的金属氧化物层的方法
公开(公告)号：US06395650B1
公开(公告)日：2002-05-28
申请号：US09694173
申请日：2000-10-23
申请人： Alessandro Cesare Callegari , Fuad Elias Doany , Evgeni Petrovich Gousev , Theodore Harold Zabel
发明人： Alessandro Cesare Callegari , Fuad Elias Doany , Evgeni Petrovich Gousev , Theodore Harold Zabel
IPC分类号： H01L2131
CPC分类号： H01L21/02178 , C23C16/40 , C23C16/4402 , C23C16/482 , C23C16/56 , H01L21/02271 , H01L21/02337 , H01L21/02348 , H01L21/02354 , H01L21/3105 , H01L21/31604 , H01L21/3162 , H01L21/31662 , H01L21/31683 , H01L21/31691
摘要： Within: (1) a method for purifying a metal oxide layer; and (2) a method for forming with enhanced purity a metal oxide layer, there is employed an irradiation of either: (1) a metal oxide layer; or (2) a substrate in the presence of at least one of an oxidant and a metal source material, such as to either: (1) reduce a concentration of a contaminant material within a metal oxide base material from which is formed a metal oxide layer; or (2) inhibit in a first instance formation of a contaminant material within a metal oxide layer. The metal oxide layer having incorporated therein the reduced concentration of contaminant material is particularly useful as a capacitive dielectric layer within a capacitive device within a microelectronic fabrication.
摘要翻译：（1）金属氧化物层的净化方法; （2）金属氧化物层的高纯度形成方法，使用以下的照射：（1）金属氧化物层; 或（2）在氧化剂和金属源材料中的至少一种存在下的基材，例如：（1）降低形成金属氧化物的金属氧化物基材中的污染物质的浓度层; 或（2）首先在金属氧化物层内抑制污染物质的形成。其中结合有降低浓度的污染物质的金属氧化物层特别可用作微电子制造中的电容性装置内的电容介电层。

5. 发明授权

US6061114A Alignment of liquid crystal layers 失效
标题翻译：液晶层对准
公开(公告)号：US6061114A
公开(公告)日：2000-05-09
申请号：US27997
申请日：1998-02-23
申请人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , James Andrew Lacey , Shui-Chin Alan Lien , Sampath Purushothaman , Mahesh Govind Samant , James L. Speidell , Joachim Stohr
发明人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , James Andrew Lacey , Shui-Chin Alan Lien , Sampath Purushothaman , Mahesh Govind Samant , James L. Speidell , Joachim Stohr
IPC分类号： G02F1/1337 , G02F1/133 , G02F1/141
CPC分类号： G02F1/13378
摘要： Bombardment of the surface of a substrate with a film layer is used to create alignment layers for liquid crystal displays. By using bombardment of the surface at an angle, both direct creation of the alignment layer or indirect deposition of the alignment layer material onto a glass plate can be achieved.
摘要翻译：使用具有膜层的基板的表面轰击以产生用于液晶显示器的取向层。通过以一定的角度轰击表面，可以实现直接产生取向层或将取向层材料间接沉积到玻璃板上。

6. 发明授权

US06632483B1 Ion gun deposition and alignment for liquid-crystal applications 有权
标题翻译：用于液晶应用的离子枪沉积和对准
公开(公告)号：US06632483B1
公开(公告)日：2003-10-14
申请号：US09608798
申请日：2000-06-30
申请人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , Eileen Ann Galligan , Yoshimine Kato , James Andrew Lacey , Shui-Chih Alan Lien , Minhua Lu , Hiroki Nakano , Shuichi Odahara
发明人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , Eileen Ann Galligan , Yoshimine Kato , James Andrew Lacey , Shui-Chih Alan Lien , Minhua Lu , Hiroki Nakano , Shuichi Odahara
IPC分类号： C23C1448
CPC分类号： C23C14/3442 , C23C14/0605 , C23C14/221 , C23C14/225 , C23C14/5833 , G02F1/133734 , G02F1/13378 , Y10T428/30
摘要： The present invention includes a method of forming an aligned film on a substrate. The film is deposited and aligned in a single step by a method comprising the step of bombarding a substrate with an ion beam at a designated incident angle to simultaneously (a) deposit the film onto the substrate and (b) arrange an atomic structure of the film in at least one predetermined aligned direction.
摘要翻译：本发明包括在基板上形成取向膜的方法。通过包括以指定的入射角用离子束轰击衬底以同时（a）将膜沉积到衬底上的步骤的方法在一个步骤中沉积和对准膜，以及（b）布置所述膜的原子结构至少一个预定的排列方向的胶片

7. 发明授权

US06413386B1 Reactive sputtering method for forming metal-silicon layer 有权
标题翻译：用于形成金属硅层的反应溅射方法
公开(公告)号：US06413386B1
公开(公告)日：2002-07-02
申请号：US09619512
申请日：2000-07-19
申请人： Alessandro Cesare Callegari , Eduard Albert Cartier , Michael Abramovich Gribelyuk , Harald Franz Okorn-Schmidt , Theodore Harold Zabel
发明人： Alessandro Cesare Callegari , Eduard Albert Cartier , Michael Abramovich Gribelyuk , Harald Franz Okorn-Schmidt , Theodore Harold Zabel
IPC分类号： C23C1434
CPC分类号： C23C14/08 , C23C14/0057
摘要： Within a method for forming a metal-silicon layer there is first provided a reactor chamber. There is then positioned within the reactor chamber a substrate spaced from a metal source target. There is also provided within the reactor chamber a minimum of a sputter material and a reactive silicon material. There is then sputtered the metal source target positioned within the reactor chamber with the sputter material provided within the reactor chamber in the presence of the reactive silicon material provided within the reactor chamber to form a metal-silicon layer over the substrate. The method is particularly useful for forming metal silicate layers, metal silicon nitride layers and metal silicon oxynitride layers within microelectronic fabrications. An alternative method employs: (1) a silicon source target rather than a metal source target; and (2) a reactive metal material rather than a reactive silicon material.
摘要翻译：在形成金属硅层的方法中，首先提供反应室。然后在反应器室内定位与金属源靶间隔开的衬底。在反应器室内还设置有最少的溅射材料和反应性硅材料。然后在设置在反应器室内的反应性硅材料的存在下，将设置在反应器室内的溅射材料溅射到位于反应器室内的金属源靶，以在衬底上形成金属硅层。该方法对于在微电子制造中形成金属硅酸盐层，金属氮化硅层和金属氮氧化硅层是特别有用的。替代方法采用：（1）硅源靶而不是金属源靶; 和（2）反应性金属材料而不是反应性硅材料。

8. 发明申请

US20090316096A1 MULTI-DOMAIN AND IPS LIQUID-CRYSTAL DISPLAY USING DRY ALIGNMENT 审中-公开
标题翻译：多域和IPS液晶显示使用干燥对齐
公开(公告)号：US20090316096A1
公开(公告)日：2009-12-24
申请号：US12548929
申请日：2009-08-27
申请人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , Eileen Galligan , James Andrew Lacey , Shui-Chih Alan Lien
发明人： Alessandro Cesare Callegari , Praveen Chaudhari , James Patrick Doyle , Eileen Galligan , James Andrew Lacey , Shui-Chih Alan Lien
IPC分类号： G02F1/1337 , C23C14/04 , G02F1/13
CPC分类号： G02F1/133753 , G02F1/13378 , G02F1/133788
摘要： The present invention includes a method of preparing a dry deposited liquid-crystal alignment layer using one of a mechanical mask, photo-resist, UV treatment, and ridge and fringe field methods. The present invention further provides a multi-domain, wide viewing angle liquid-crystal display, comprising: a bottom substrate; a first transparent conductive layer; a top substrate; a color filter layer; a second transparent conductive layer; a first dry deposited liquid-crystal alignment layer; a second dry deposited liquid-crystal alignment layer, the second dry deposited liquid-crystal alignment layer being spaced adjacent to and facing the first dry deposited liquid-crystal alignment layer; spacers; and a liquid-crystal material. Each of the first alignment layer and the second alignment layer is divided into a plurality of pixels each having a boundary and at least two domains and the domains of each of the multi-domain, dry deposited liquid-crystal alignment layers is obtained by a method selected from the group consisting of: a mechanical mask, photo-resist, UV treatment, and ridge and fringe field. The multi-domain, wide viewing angle liquid-crystal display of the present invention can be operated in the in-plane switching mode, which results in reduced image sticking.
摘要翻译：本发明包括使用机械掩模，光致抗蚀剂，UV处理，脊和边缘场方法之一制备干沉积液晶取向层的方法。本发明还提供一种多域宽视角液晶显示器，包括：底部基板; 第一透明导电层; 顶层基材; 滤色器层; 第二透明导电层; 第一干沉积液晶取向层; 第二干沉积液晶取向层，第二干沉积液晶取向层与第一干沉积液晶取向层相邻并面对; 间隔物和液晶材料。第一取向层和第二取向膜中的每一个被分成多个具有边界和至少两个畴的像素，并且通过方法获得每个多畴的干沉积液晶取向层的畴选自由机械掩模，光致抗蚀剂，UV处理，以及脊和边缘区组成的组。本发明的多视域宽视角液晶显示器可以在面内切换模式下操作，这导致图像残留减少。

9. 发明授权

US06207472B1 Low temperature thin film transistor fabrication 有权
标题翻译：低温薄膜晶体管制造
公开(公告)号：US06207472B1
公开(公告)日：2001-03-27
申请号：US09265161
申请日：1999-03-09
申请人： Alessandro Cesare Callegari , Christos Dimitrios Dimitrakopoulos , Sampath Purushothaman
发明人： Alessandro Cesare Callegari , Christos Dimitrios Dimitrakopoulos , Sampath Purushothaman
IPC分类号： H01L5140
CPC分类号： H01L51/0545 , H01L21/31691 , H01L51/0052
摘要： The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C. A TFT of the invention has a pentacene semiconductor layer in contact with a barium zirconate titanate gate oxide layer formed on a polycarbonate transparent substrate employing at least one of the techniques of sputtering, evaporation and laser ablation.
摘要翻译：本发明通过在器件结构中提供与无机混合氧化物栅极绝缘体接触的有机半导体层来扩展可用于薄膜晶体管（TFT）器件的材料和工艺的范围，所述有机半导体层涉及在高达150度的室温处理本发明的CA TFT具有与使用溅射，蒸发和激光烧蚀技术中的至少一种技术形成在聚碳酸酯透明基板上的锆酸锆酸盐栅极氧化物层接触的并五苯半导体层。

10. 发明授权

US5830332A Sputter deposition of hydrogenated amorphous carbon film and applications thereof 失效
标题翻译：氢化无定形碳膜的溅射沉积及其应用
公开(公告)号：US5830332A
公开(公告)日：1998-11-03
申请号：US781080
申请日：1997-01-09
申请人： Edward D. Babich , Alessandro Cesare Callegari , Fuad Elias Doany , Sampath Purushothaman
发明人： Edward D. Babich , Alessandro Cesare Callegari , Fuad Elias Doany , Sampath Purushothaman
IPC分类号： C23C14/06 , C23C14/34 , G02B1/10 , G03F1/00 , G03F1/26 , G03F1/32 , G03F1/34 , H01L21/205
CPC分类号： G03F1/32 , C23C14/0605 , G03F1/26 , G03F1/34
摘要： The present invention relates to a method of reactive sputtering for depositing an amorphous hydrogenated carbon film (a-C:H) from an argon/hydrocarbon/hydrogen/oxygen plasma, preferably an Ar/acetylene-helium/hydrogen/oxygen plasma. Such films are optically transparent in the visible range and partially absorbing at ultraviolet (UV) and deep UV (DUV) wavelengths, in particular, 365, and 248, 193 nm. Moreover, the films produced by the present invention are amorphous, hard, scratch resistant, and etchable by excimer laser ablation or by oxygen reactive ion etch process. Because of these unique properties, these films can be used to form a patterned absorber for UV and DUV single layer attenuated phase shift masks. Film absorption can also be increased such that these films can be used to fabricate conventional photolithographic shadow masks.
摘要翻译：本发明涉及一种用于从氩/烃/氢/氧等离子体，优选Ar /乙炔 - 氦/氢/氧等离子体沉积无定形氢化碳膜（a-C：H）的反应溅射方法。这种膜在可见光范围内是光学透明的，并且在紫外（UV）和深紫外（DUV）波长，特别是365和248,193nm处部分吸收。此外，本发明生产的薄膜是非晶的，硬的，耐划伤的，并且可以通过准分子激光烧蚀或通过氧反应离子蚀刻工艺进行蚀刻。由于这些独特的性质，这些膜可用于形成用于UV和DUV单层衰减相移掩模的图案化吸收体。也可以增加膜吸收，使得这些膜可用于制造常规光刻阴影掩模。

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