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    • 2. 发明授权
    • Method of etching dielectric layers using a removable hardmask
    • 使用可拆卸硬掩模蚀刻介电层的方法
    • US06458516B1
    • 2002-10-01
    • US09551255
    • 2000-04-18
    • Yan YePavel IonovAllen ZhaoPeter HsiehDiana MaChun YanJie Yuan
    • Yan YePavel IonovAllen ZhaoPeter HsiehDiana MaChun YanJie Yuan
    • G03C556
    • H01L21/31138H01L21/02115H01L21/02118H01L21/0212H01L21/02274H01L21/0274H01L21/31116H01L21/31144H01L21/3127H01L21/3146H01L21/31612H01L21/32136H01L21/32139
    • A method of patterning a layer of dielectric material having a thickness greater than 1,000 Å, and typically a thickness greater than 5,000 Å. The method is particularly useful for forming a high aspect ratio via or a high aspect ratio contact including self-aligned contact structures, where the aspect ratio is typically greater than 3 and the feature size of the contact is about 0.25 &mgr;m or less. In particular, an organic, polymeric-based masking material is used in a plasma etch process for transferring a desired pattern through an underlying layer of dielectric material. The combination of masking material and plasma source gas must provide the necessary high selectivity toward etching of the underlying layer of dielectric material. The selectivity is preferably greater than 3:1, where the etch rate of the dielectric material is at least 3 times greater than the etch rate of the organic, polymeric-based masking material. The dielectric material may be inorganic, for example, silicon oxide; doped silicon oxide; carbon-containing silicon oxide; SOG; BPSG; and similar materials. The dielectric material may be also be organic, where a high temperature organic-based masking material is used for transferring a desired pattern, and the underlying dielectric material is of a chemical and structural composition which is sufficiently different from the masking material that the required selectivity is provided. In any case, the organic, polymeric-based masking material is easily removed from the substrate etch process after completion of etch without damage to underlying device structures.
    • 图案化厚度大于1000,通常大于5,000的厚度的电介质材料层的方法。 该方法对于形成包括自对准接触结构的高纵横比通孔或高纵横比接触特别有用,其中纵横比通常大于3,接触的特征尺寸为约0.25μm或更小。 特别地,在等离子体蚀刻工艺中使用有机的基于聚合物的掩模材料,用于将期望的图案转移通过介电材料的下层。 掩模材料和等离子体源气体的组合必须为蚀刻介电材料的下层提供必要的高选择性。 选择性优选大于3:1,其中介电材料的蚀刻速率比有机聚合物基掩模材料的蚀刻速率高至少3倍。 介电材料可以是无机的,例如氧化硅; 掺杂氧化硅; 含碳氧化硅; SOG; BPSG; 和类似的材料。 介电材料也可以是有机的,其中使用高温有机基掩蔽材料来转移所需的图案,并且下面的介电材料具有与掩蔽材料充分不同的化学和结构组成,所需的选择性 被提供。 在任何情况下,有机的基于聚合物的掩蔽材料在蚀刻完成之后容易地从基底蚀刻工艺中去除而不损坏下面的器件结构
    • 3. 发明授权
    • Method of cleaning a semiconductor device processing chamber after a copper etch process
    • 在铜蚀刻工艺之后清洁半导体器件处理室的方法
    • US06352081B1
    • 2002-03-05
    • US09350802
    • 1999-07-09
    • Danny Chien LuAllen ZhaoPeter HsiehHong ShihLi XuYan Ye
    • Danny Chien LuAllen ZhaoPeter HsiehHong ShihLi XuYan Ye
    • B08B900
    • H01L21/67028Y10S438/905
    • The present invention is a method for removing deposited etch byproducts from surfaces of a semiconductor processing chamber after a copper etch process. The method of the invention comprises the following general steps: (a) an oxidation step, in which interior surfaces of the processing chamber are contacted with an oxidizing plasma; (b) a first non-plasma cleaning step, in which interior surfaces of the processing chamber are contacted with an H+hfac-comprising gas; and (c) a second cleaning step, in which interior surfaces of the processing chamber are contacted with a plasma containing reactive fluorine species, whereby at least a portion of the copper etch byproducts remaining after step (b) are volatilized into gaseous species, which are removed from the processing chamber. The method of the invention is preferably performed at a chamber wall temperature of at least 150° C. in order to achieve optimum cleaning of the chamber at the chamber operating pressures typically used during the cleaning process. The dry cleaning method of the invention can be performed between wafer processing runs without opening the processing chamber, thereby minimizing potential contamination to the chamber as well as chamber downtime.
    • 本发明是在铜蚀刻工艺之后从半导体处理室的表面去除沉积的蚀刻副产物的方法。 本发明的方法包括以下一般步骤:(a)氧化步骤,其中处理室的内表面与氧化等离子体接触; (b)第一非等离子体清洗步骤,其中处理室的内表面与含H + hfac的气体接触; 和(c)第二清洁步骤,其中处理室的内表面与含有反应性氟物质的等离子体接触,由此在步骤(b)之后残留的铜蚀刻副产物的至少一部分挥发成气态物质,其中 从处理室中取出。 本发明的方法优选在至少150℃的室壁温度下进行,以便在清洁过程中通常使用的室的操作压力下实现室的最佳清洁。 本发明的干式清洗方法可以在晶片处理运行之间进行,而不会打开处理室,从而最小化对室的潜在污染以及室停机时间。
    • 4. 发明授权
    • Passivating, stripping and corrosion inhibition of semiconductor
substrates
    • 半导体衬底的钝化,剥离和腐蚀抑制
    • US5545289A
    • 1996-08-13
    • US268377
    • 1994-06-29
    • Jian ChenJames S. PapanuSteve S. Y. MakCarmel Ish-ShalomPeter HsiehWesley G. LauCharles S. RhoadesBrian ShiehIan S. LatchfordKaren A. WilliamsVictoria Yu-Wang
    • Jian ChenJames S. PapanuSteve S. Y. MakCarmel Ish-ShalomPeter HsiehWesley G. LauCharles S. RhoadesBrian ShiehIan S. LatchfordKaren A. WilliamsVictoria Yu-Wang
    • H01L21/02H01L21/311H01L21/3213H01L21/00
    • H01L21/02071H01L21/31138Y10S438/958
    • A process for passivating, and optionally stripping and inhibiting corrosion of an etched substrate (20), is described. In the process, a substrate (20) having etchant byproducts (24) thereon, is placed into a vacuum chamber (52), and passivated in a multicycle passivation process comprising at least two passivating steps. In each passivating step, passivating gas is introduced into the vacuum chamber (52) and a plasma is generated from the passivating gas. When the substrate also has remnant resist (26) thereon, the resist (26) is stripped in a multicycle passivation and stripping process, each cycle including a passivating step and a stripping step. The stripping step is performed by introducing a stripping gas into the vacuum chamber (52) and generating a plasma from the stripping gas. In the multicycle process, the passivating and optional stripping steps, are repeated at least once in the same order that the steps were done. Alternatively, the substrate (20) can also be passivated in a single cycle process using a passivating gas comprising water vapor, oxygen, and nitrogen. Optionally, corrosion of the substrate is further inhibited by introducing an amine vapor into the vacuum chamber (52) so that amine adsorps onto the substrate (20), forming a corrosion inhibition amine layer on the surface of the substrate (20).
    • 描述了钝化和任选地剥离和抑制腐蚀的衬底(20)的腐蚀的方法。 在该方法中,将具有蚀刻剂副产物(24)的衬底(20)放置在真空室(52)中,并且在包括至少两个钝化步骤的多圈钝化工艺中钝化。 在每个钝化步骤中,将钝化气体引入真空室(52)中,并从钝化气体产生等离子体。 当衬底上还具有残余抗蚀剂(26)时,抗蚀剂(26)在多周期钝化和剥离过程中被剥离,每个循环包括钝化步骤和剥离步骤。 通过将汽提气体引入真空室(52)并从汽提气体产生等离子体来进行汽提步骤。 在多周期过程中,钝化和可选的剥离步骤以与步骤相同的顺序重复至少一次。 或者,也可以使用包括水蒸气,氧气和氮气的钝化气体在单周期过程中钝化基板(20)。 任选地,通过将​​胺蒸气引入真空室(52)进一步抑制基板的腐蚀,使得胺吸附到基板(20)上,在基板(20)的表面上形成腐蚀抑制胺层。