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    • 6. 发明申请
    • IMAGE SENSOR CIRCUITS INCLUDING SHARED FLOATING DIFFUSION REGIONS
    • 图像传感器电路,包括共享浮动扩展区域
    • US20080308852A1
    • 2008-12-18
    • US12139022
    • 2008-06-13
    • Seok-Ha LeeChang-Rok MoonKang-Bok Lee
    • Seok-Ha LeeChang-Rok MoonKang-Bok Lee
    • H01L31/113
    • H01L27/14643H01L27/14641H04N5/3575H04N5/3741H04N5/37457H04N5/378
    • An image sensor can include a plurality of photoelectric conversion elements arranged in a matrix. A plurality of floating diffusion regions can be shared by respective corresponding pairs of adjacent photoelectric conversion elements. A plurality of charge-transmission transistors can respectively correspond to the photoelectric conversion elements, where each of the charge-transmission transistors are connected between a corresponding one of the plurality of photoelectric conversion elements and a corresponding one of the plurality of floating diffusion regions. A plurality of charge-transmission lines can be commonly connected to gates of respective corresponding pairs of adjacent rows of charge-transmission transistors, where each of the respective corresponding pairs of adjacent rows of charge-transmission transistors can be connected to respective ones of the plurality of photoelectric conversion elements in different adjacent rows of floating diffusion regions.
    • 图像传感器可以包括以矩阵形式布置的多个光电转换元件。 多个浮动扩散区域可由相应的相应光电转换元件对共享。 多个电荷传输晶体管可以分别对应于光电转换元件,其中每个电荷传输晶体管连接在多个光电转换元件中的相应一个光电转换元件和多个浮动扩散区域中相应的一个之间。 多个电荷传输线可以共同地连接到相应的相应的一对电荷传输晶体管的栅极,其中各个相应的电荷传输晶体管对中的每一对可以连接到多个电荷传输晶体管中的相应行 的不同相邻行的浮动扩散区域中的光电转换元件。
    • 7. 发明授权
    • Transistor having coupling-preventing electrode layer, fabricating method thereof, and image sensor having the same
    • 具有耦合防止电极层的晶体管,其制造方法和具有该电极层的图像传感器
    • US07671419B2
    • 2010-03-02
    • US11962401
    • 2007-12-21
    • Kang-Bok LeeJong-Cheol Shin
    • Kang-Bok LeeJong-Cheol Shin
    • H01L29/78
    • H01L27/14689H01L27/14609H01L27/14643H01L29/78
    • A transistor having an electrode layer that can reduce or prevent a coupling effect, a fabricating method thereof, and an image sensor having the same are provided. The transistor includes a semiconductor substrate and a well of a first conductivity type formed on the semiconductor substrate. A heavily-doped first impurity region of a first conductivity type surrounds an active region defined in the well. Heavily-doped second and third impurity regions of a second conductivity type are spaced apart from each other in the active region an define a channel region interposed therebetween. A gate is formed over the channel region to cross the active region. The gate overlaps at least a portion of the first impurity region and receives a first voltage. An electrode layer is formed between the semiconductor substrate and the gate, such that the electrode layer overlaps a portion of the first impurity region contacting the channel region and receives a second voltage. An insulation layer is formed between the semiconductor substrate and the electrode layer, the semiconductor substrate and the gate, and the electrode layer and the gate. The insulation layer surrounds the electrode layer.
    • 提供具有可以减少或防止耦合效应的电极层的晶体管,其制造方法和具有该电极层的图像传感器。 晶体管包括形成在半导体衬底上的半导体衬底和第一导电类型的阱。 第一导电类型的重掺杂的第一杂质区围绕阱中限定的有源区。 第二导电类型的重掺杂的第二和第三杂质区域在有源区域中彼此间隔开,限定插入其间的沟道区域。 栅极形成在沟道区域上以穿过有源区。 栅极与第一杂质区域的至少一部分重叠并接收第一电压。 在半导体衬底和栅极之间形成电极层,使得电极层与接触沟道区的第一杂质区的一部分重叠并接收第二电压。 在半导体衬底和电极层,半导体衬底和栅极以及电极层和栅极之间形成绝缘层。 绝缘层包围电极层。
    • 8. 发明申请
    • Transistor Having Coupling-Preventing Electrode Layer, Fabricating Method Thereof, and Image Sensor Having the Same
    • 具有耦合防止电极层的晶体管,其制造方法和具有相同的图像传感器
    • US20080191250A1
    • 2008-08-14
    • US11962401
    • 2007-12-21
    • Kang-Bok LeeJong-Cheol Shin
    • Kang-Bok LeeJong-Cheol Shin
    • H01L27/146H01L29/78H01L21/336
    • H01L27/14689H01L27/14609H01L27/14643H01L29/78
    • A transistor having an electrode layer that can reduce or prevent a coupling effect, a fabricating method thereof, and an image sensor having the same are provided. The transistor includes a semiconductor substrate and a well of a first conductivity type formed on the semiconductor substrate. A heavily-doped first impurity region of a first conductivity type surrounds an active region defined in the well. Heavily-doped second and third impurity regions of a second conductivity type are spaced apart from each other in the active region an define a channel region interposed therebetween. A gate is formed over the channel region to cross the active region. The gate overlaps at least a portion of the first impurity region and receives a first voltage. An electrode layer is formed between the semiconductor substrate and the gate, such that the electrode layer overlaps a portion of the first impurity region contacting the channel region and receives a second voltage. An insulation layer is formed between the semiconductor substrate and the electrode layer, the semiconductor substrate and the gate, and the electrode layer and the gate. The insulation layer surrounds the electrode layer.
    • 提供具有可以减少或防止耦合效应的电极层的晶体管,其制造方法和具有该电极层的图像传感器。 晶体管包括形成在半导体衬底上的半导体衬底和第一导电类型的阱。 第一导电类型的重掺杂的第一杂质区围绕阱中限定的有源区。 第二导电类型的重掺杂的第二和第三杂质区域在有源区域中彼此间隔开,限定插入其间的沟道区域。 栅极形成在沟道区域上以穿过有源区。 栅极与第一杂质区域的至少一部分重叠并接收第一电压。 在半导体衬底和栅极之间形成电极层,使得电极层与接触沟道区的第一杂质区的一部分重叠并接收第二电压。 在半导体衬底和电极层,半导体衬底和栅极以及电极层和栅极之间形成绝缘层。 绝缘层包围电极层。
    • 9. 发明授权
    • Image sensor circuits including shared floating diffusion regions
    • 图像传感器电路包括共享浮动扩散区域
    • US07910965B2
    • 2011-03-22
    • US12139022
    • 2008-06-13
    • Seok-Ha LeeChang-Rok MoonKang-Bok Lee
    • Seok-Ha LeeChang-Rok MoonKang-Bok Lee
    • H01L31/113
    • H01L27/14643H01L27/14641H04N5/3575H04N5/3741H04N5/37457H04N5/378
    • An image sensor can include a plurality of photoelectric conversion elements arranged in a matrix. A plurality of floating diffusion regions can be shared by respective corresponding pairs of adjacent photoelectric conversion elements. A plurality of charge-transmission transistors can respectively correspond to the photoelectric conversion elements, where each of the charge-transmission transistors are connected between a corresponding one of the plurality of photoelectric conversion elements and a corresponding one of the plurality of floating diffusion regions. A plurality of charge-transmission lines can be commonly connected to gates of respective corresponding pairs of adjacent rows of charge-transmission transistors, where each of the respective corresponding pairs of adjacent rows of charge-transmission transistors can be connected to respective ones of the plurality of photoelectric conversion elements in different adjacent rows of floating diffusion regions.
    • 图像传感器可以包括以矩阵形式布置的多个光电转换元件。 多个浮动扩散区域可由相应的相应光电转换元件对共享。 多个电荷传输晶体管可以分别对应于光电转换元件,其中每个电荷传输晶体管连接在多个光电转换元件中的相应一个光电转换元件和多个浮动扩散区域中相应的一个之间。 多个电荷传输线可以共同地连接到相应的相应的一对电荷传输晶体管的栅极,其中各个相应的电荷传输晶体管对中的每一对可以连接到多个电荷传输晶体管中的相应行 的不同相邻行的浮动扩散区域中的光电转换元件。
    • 10. 发明授权
    • Reset signal generation circuit
    • 复位信号发生电路
    • US06252444B1
    • 2001-06-26
    • US09391373
    • 1999-09-08
    • Kang-Bok Lee
    • Kang-Bok Lee
    • H04L700
    • H03L7/07G06F1/24H03L7/095
    • A reset signal generation circuit of the present invention includes a phase locked loop (PLL) selector, a plurality of PLLs, a locking detector, a clock selector, a counter, and a reset synchronizer. The PLL selector is activated when an external reset signal is high and provides a signal for selecting one of the plurality of PLLs according to a power down control signal and a PLL selection signal. The plurality of PLLs have different input frequency signals and different output frequency signals. They are activated in response to an external clock signal and inactivated in response to the power down control signal. The locking detector detects locking/unlocking of the PLLs based upon the output frequency signals of the PLLs and generates a locking signal. The clock selector selectively provides one of the output signals of the PLLs and the external clock signal. The counter is coupled to the clock selector and generates an overflow signal after completing count of a predetermined number. In response to the overflow signal of the counter, the reset synchronizer generates an internal reset signal synchronizing with the locking signal. The present invention controls the stable reset mode release time regardless of the settling time of the oscillation signal by controlling the reset signal using the locking signal of the PLL. A current state is maintained even though the locking state of the PLL is released, so the operation of the chip is not influenced by the reset of the PLL.
    • 本发明的复位信号生成电路包括锁相环(PLL)选择器,多个PLL,锁定检测器,时钟选择器,计数器和复位同步器。 当外部复位信号为高电平时,PLL选择器被激活,并根据掉电控制信号和PLL选择信号提供用于选择多个PLL之一的信号。 多个PLL具有不同的输入频率信号和不同的输出频率信号。 它们被响应于外部时钟信号而被激活,并且响应于掉电控制信号被去激活。 锁定检测器基于PLL的输出频率信号检测PLL的锁定/解锁,并产生锁定信号。 时钟选择器选择性地提供PLL的输出信号和外部时钟信号之一。 计数器耦合到时钟选择器,并在完成预定数目的计数之后产生溢出信号。 响应于计数器的溢出信号,复位同步器产生与锁定信号同步的内部复位信号。 本发明通过使用PLL的锁定信号控制复位信号来控制振荡信号的稳定时间的稳定的复位模式释放时间。 即使PLL的锁定状态被解除,也保持当前状态,因此芯片的操作不受PLL复位的影响。