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1. 发明申请

WO2006109221A2 LATERAL BIPOLAR TRANSISTOR 审中-公开
标题翻译：横向双极晶体管
公开(公告)号：WO2006109221A2
公开(公告)日：2006-10-19
申请号：PCT/IB2006051045
申请日：2006-04-05
申请人： KONINKL PHILIPS ELECTRONICS NV , MEUNIER-BEILLARD PHILIPPE , HUETING RAYMOND J E , DONKERS JOHANNES J T M , HIJZEN ERWIN
发明人： MEUNIER-BEILLARD PHILIPPE , HUETING RAYMOND J E , DONKERS JOHANNES J T M , HIJZEN ERWIN
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623 , H01L29/7378
摘要： The invention provides a CMOS-based lateral bipolar transistor and a method of fabricating the same. A CMOS device forms the basis of the CMOS-based lateral bipolar transistor. The CMOS device is provided on a silicon, SOI or SSOI substrate and comprises a source and drain region, CMOS spacers (9, 10) and a removed gate electrode. An emitter region (41) and a collector region (45) are disposed in the source and drain regions, and a base region (43), comprising SiGe or p-type silicon, is provided adjacent to the emitter region (41) and the collector region (45). The base region (43) has a relatively large exposed area, because it is not covered by the, formerly removed, gate electrode. The base resistance may be reduced by providing a metal layer (29) and an electrical contact (33) on the exposed area of the base region (43).
摘要翻译：本发明提供一种基于CMOS的横向双极晶体管及其制造方法。 CMOS器件形成了基于CMOS的横向双极晶体管的基础。 CMOS器件设置在硅，SOI或SSOI衬底上，并且包括源极和漏极区域，CMOS间隔物（9,10）和去除的栅电极。发射极区域（41）和集电极区域（45）设置在源极和漏极区域中，并且邻近发射极区域（41）设置包括SiGe或p型硅的基极区域（43），并且集电极区域（45）。基区（43）具有相对较大的暴露面积，因为其未被先前去除的栅电极覆盖。可以通过在基部区域（43）的暴露区域上设置金属层（29）和电触点（33）来减小基极电阻。

2. 发明申请

WO2006109208A3 METHOD OF FABRICATING A HETEROJUNCTION BIPOLAR TRANSISTOR 审中-公开
标题翻译：制备异相双极晶体管的方法
公开(公告)号：WO2006109208A3
公开(公告)日：2007-02-15
申请号：PCT/IB2006051005
申请日：2006-04-03
申请人： KONINKL PHILIPS ELECTRONICS NV , MEUNIER-BEILLARD PHILIPPE , DONKERS JOHANNES J T M , HIJZEN ERWIN , MELAI JOOST
发明人： MEUNIER-BEILLARD PHILIPPE , DONKERS JOHANNES J T M , HIJZEN ERWIN , MELAI JOOST
IPC分类号： H01L21/331 , H01L29/16 , H01L29/423
CPC分类号： H01L29/66242 , H01L29/16 , H01L29/7378
摘要： The invention provides a method for fabricating a heterojunction bipolar transistor with a base connecting region (23), which is formed self-aligned to a base region (7) without applying photolithographic techniques. Further, a collector connecting region (31) and an emitter region (29) are formed simultaneously and self-aligned to the base connecting region (23) without applying photolithographic techniques.
摘要翻译：本发明提供了一种用于制造具有基极连接区域（23）的异质结双极晶体管的方法，该基极连接区域（23）在不施加光刻技术的情况下与基极区域（7）自对准地形成。此外，在不使用光刻技术的情况下，集电极连接区域（31）和发射极区域（29）同时形成并且与基底连接区域（23）自对准。

3. 发明申请

WO2009144619A3 MEMS DEVICES 审中-公开
标题翻译： MEMS器件
公开(公告)号：WO2009144619A3
公开(公告)日：2010-09-16
申请号：PCT/IB2009052086
申请日：2009-05-19
申请人： NXP BV , VERHEIJDEN GREJA J A M , MEUNIER-BEILLARD PHILIPPE , DONKERS JOHANNES J T M
发明人： VERHEIJDEN GREJA J A M , MEUNIER-BEILLARD PHILIPPE , DONKERS JOHANNES J T M
IPC分类号： B81C1/00
CPC分类号： B81C1/00293 , B81C2203/0145
摘要： A method of manufacturing a MEMS device comprises forming a MEMS device element (14). A sacrificial layer (20) is provided over the device element and a package cover layer (22) is provided over the sacrificial layer. The sacrificial layer is removed using at least one opening (22) in the cover layer and the at least one opening (24) is sealed by an anneal process.
摘要翻译：制造MEMS器件的方法包括形成MEMS器件元件（14）。牺牲层（20）设置在器件元件上方，并且封装覆盖层（22）设置在牺牲层上。使用覆盖层中的至少一个开口（22）去除牺牲层，并且通过退火工艺密封至少一个开口（24）。

4. 发明申请

WO2004057654A2 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：WO2004057654A2
公开(公告)日：2004-07-08
申请号：PCT/IB0306017
申请日：2003-12-16
申请人： KONINKL PHILIPS ELECTRONICS NV , IMEC INTER UNI MICRO ELECTR , MAGNEE PETRUS H C , DONKERS JOHANNES J T M , SHI XIAOPING
发明人： MAGNEE PETRUS H C , DONKERS JOHANNES J T M , SHI XIAOPING
IPC分类号： H01L21/20
CPC分类号： H01L21/02529 , H01L21/02532 , H01L21/02639 , H01L21/02642
摘要： Method of manufacturing a semiconductor device, in which on a region of silicon oxide (5) situated next to a region of monocrystalline silicon (4) at the surface (3) of a semiconductor body (1), a non-monocrystalline auxiliary layer (8) is formed. The auxiliary layer is formed in two steps. In the first step, the silicon body is heated in an atmosphere comprising a gaseous arsenic compound; in the second step it is heated in an atmosphere comprising a gaseous silicon compound instead of said arsenic compound. Thus, the regions of silicon oxide are provided with an amorphous or polycrystalline silicon seed layer in a self-aligned manner.
摘要翻译：制造半导体器件的方法，其中在位于半导体本体（1）的表面（3）的单晶硅（4）的旁边的氧化硅（5）的区域上，形成非单晶辅助层（ 8）。辅助层分两步形成。在第一步骤中，硅体在包含气态砷化合物的气氛中加热; 在第二步中，在包含气态硅化合物的气氛中代替所述砷化合物进行加热。因此，氧化硅区域以自对准的方式设置有非晶或多晶硅籽晶层。

5. 发明申请

WO2006114753A3 METHOD OF FABRICATING A BIPOLAR TRANSISTOR 审中-公开
标题翻译：制造双极晶体管的方法
公开(公告)号：WO2006114753A3
公开(公告)日：2008-04-03
申请号：PCT/IB2006051261
申请日：2006-04-24
申请人： NXP BV , DONKERS JOHANNES J T M , HIJZEN ERWIN , VAN NOORT WIBO D
发明人： DONKERS JOHANNES J T M , HIJZEN ERWIN , VAN NOORT WIBO D
IPC分类号： H01L21/331 , H01L21/762 , H01L27/06 , H01L29/732 , H01L29/735
CPC分类号： H01L29/66272 , H01L21/76224 , H01L27/0641 , H01L27/0647 , H01L29/6625 , H01L29/66265 , H01L29/732 , H01L29/735
摘要： The invention provides a method for fabricating a bipolar transistor applying a standard shallow trench isolation fabrication method to simultaneously form a vertical bipolar transistor (29) or a lateral bipolar transistor (49) in a first trench (5, 50) and a shallow trench isolation region (27, 270) in a second trench (7, 70). Further, the fabrication method may simultaneously form a vertical bipolar transistor (27) in the first trench (5, 50), a lateral bipolar transistor (49) in a third trench and a shallow trench isolation region (27, 270) in the second trench (7, 70).
摘要翻译：本发明提供了一种制造双极晶体管的方法，其应用标准浅沟槽隔离制造方法，以在第一沟槽（5,50）和浅沟槽隔离中同时形成垂直双极晶体管（29）或横向双极晶体管（49）区域（27,270）在第二沟槽（7,70）中。此外，制造方法可以同时在第一沟槽（5,50）中形成垂直双极晶体管（27），在第三沟槽中形成横向双极晶体管（49），在第二沟槽中形成浅沟槽隔离区域（27,270）沟槽（7,70）。

6. 发明申请

WO2007015194A3 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2007015194A3
公开(公告)日：2007-07-19
申请号：PCT/IB2006052559
申请日：2006-07-26
申请人： NXP BV , DONKERS JOHANNES J T M , VAN NOORT WIBO D , NEUILLY FRANCOIS
发明人： DONKERS JOHANNES J T M , VAN NOORT WIBO D , NEUILLY FRANCOIS
IPC分类号： H01L21/331 , H01L29/10 , H01L29/732 , H01L29/737
CPC分类号： H01L29/7378 , H01L21/26506 , H01L29/0649 , H01L29/1004 , H01L29/66242 , H01L29/66272 , H01L29/732
摘要： The invention relates to a semiconductor device (10) with a substrate (12) and a semiconductor body (11) of silicon comprising a bipolar transistor with an emitter region, a base region and a collector region (1,2,3) of a first conductivity type, a second conductivity type opposite to said first conductivity type and the first conductivity type, respectively, with a first semiconductor region (3) comprising the collector region or the emitter region being formed in the semiconductor body (11), on top of which a second semiconductor region (2) comprising the base region is present, on top of which a third semiconductor region (1) comprising the other of said collector region and said emitter region is present, said semiconductor body (11) being provided with a constriction at the location of the transition between the first and the second semiconductor region (3, 2) , which constriction has been formed by means of an electrically insulating region (26, 27) buried in the semiconductor body (11). According to the invention a part of the semiconductor body that is formed above the buried electrically insulating region (26,27) is monocrystalline. This enables a strong lateral miniaturization of the device and results in excellent high frequency properties of the transistor. Such a device (10) is possible thanks to its manufacture with a method of manufacturing according to the invention.
摘要翻译：本发明涉及一种具有衬底（12）和硅的半导体本体（11）的半导体器件（10），其包括具有发射极区域，基极区域和集电极区域（1,2,3）的双极晶体管第一导电类型，与所述第一导电类型和第一导电类型相反的第二导电类型，其中包括在半导体本体（11）中形成的集电极区域或发射极区域的第一半导体区域（3），顶部其中存在包括基极区域的第二半导体区域（2），其上存在包括所述集电极区域和所述发射极区域中的另一个的第三半导体区域（1），所述半导体本体（11）设置有在第一和第二半导体区域（3,2）之间的过渡位置处的收缩部，该收缩部通过埋在半导体器件中的电绝缘区域（26,27）形成 dy（11）。根据本发明，形成在掩埋电绝缘区域（26,27）上方的半导体本体的一部分是单晶的。这使得器件的强大的侧向小型化并且导致晶体管的优异的高频特性。由于通过根据本发明的制造方法的制造，这种装置（10）是可能的。

7. 发明专利

AU2003303274A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 未知
公开(公告)号：AU2003303274A1
公开(公告)日：2004-07-14
申请号：AU2003303274
申请日：2003-12-16
申请人： KONINKL PHILIPS ELECTRONICS NV
发明人： SHI XIAOPING , MAGNEE PETRUS H C , DONKERS JOHANNES J T M
IPC分类号： H01L21/20
摘要： Method of manufacturing a semiconductor device, in which on a region of silicon oxide (5) situated next to a region of monocrystalline silicon (4) at the surface (3) of a semiconductor body (1), a non-monocrystalline auxiliary layer (8) is formed. The auxiliary layer is formed in two steps. In the first step, the silicon body is heated in an atmosphere comprising a gaseous arsenic compound; in the second step it is heated in an atmosphere comprising a gaseous silicon compound instead of said arsenic compound. Thus, the regions of silicon oxide are provided with an amorphous or polycrystalline silicon seed layer in a self-aligned manner.

8. 发明专利

AU2003232968A1 METHOD OF FABRICATION SIGE HETEROJUNCTION BIPOLAR TRANSISTOR 未知
公开(公告)号：AU2003232968A1
公开(公告)日：2003-12-12
申请号：AU2003232968
申请日：2003-05-27
申请人： KONINKL PHILIPS ELECTRONICS NV
发明人： MAGNEE PETRUS H C , DONKERS JOHANNES J T M
IPC分类号： H01L21/331 , H01L29/732 , H01L29/737
摘要： The present invention provides for a method of fabricating a semiconductor device comprising a non-selectively grown SiGe(C) heterojunction bipolar transistor including the steps of forming an insulating layer ( 12, 40 ) on a substrate and providing a layer structure including a conductive layer ( 14, 42 ) on the insulating layer ( 12, 40 ), etching a transistor area opening ( 12, 44 ) through the conductive layer ( 14, 42 ), depositing a SiGe base layer ( 24, 46 ) on the inner wall of the transistor area opening ( 22, 44 ) and forming an insulator ( 32, 52 ) on an upper surface so as to fill the transistor area opening wherein prior to the filling step, a nitride layer ( 30, 50 ) is formed as an inner layer of the transistor area opening ( 22, 44 ).

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