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1. 发明授权

US06251802B1 Methods of forming carbon-containing layers 有权
标题翻译：形成含碳层的方法
公开(公告)号：US06251802B1
公开(公告)日：2001-06-26
申请号：US09175051
申请日：1998-10-19
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L2131
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

2. 发明授权

US06391710B1 Methods of forming capacitors 有权
标题翻译：形成电容器的方法
公开(公告)号：US06391710B1
公开(公告)日：2002-05-21
申请号：US09602832
申请日：2000-06-23
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c.) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

3. 发明授权

US07115926B1 Capacitor constructions, DRAM constructions, and semiconductive material assemblies 有权
标题翻译：电容器结构，DRAM结构和半导体材料组件
公开(公告)号：US07115926B1
公开(公告)日：2006-10-03
申请号：US09603147
申请日：2000-06-23
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L27/108
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

4. 发明授权

US06884725B2 Methods of forming materials within openings, and methods of forming isolation regions 有权
标题翻译：在开口内形成材料的方法，以及形成隔离区域的方法
公开(公告)号：US06884725B2
公开(公告)日：2005-04-26
申请号：US10145562
申请日：2002-05-14
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21/3105 , H01L21/76 , H01L21/762 , H01L21/461
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，以及包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

5. 发明授权

US07358587B2 Semiconductor structures 有权
标题翻译：半导体结构
公开(公告)号：US07358587B2
公开(公告)日：2008-04-15
申请号：US11115833
申请日：2005-04-25
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21/76
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

6. 发明授权

US06420268B2 Methods of forming materials within openings, and methods of forming isolation regions 有权
公开(公告)号：US06420268B2
公开(公告)日：2002-07-16
申请号：US09910340
申请日：2001-07-20
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21302
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.

7. 发明授权

US06274498B1 Methods of forming materials within openings, and method of forming isolation regions 有权
标题翻译：在开口内形成材料的方法，以及形成隔离区域的方法
公开(公告)号：US06274498B1
公开(公告)日：2001-08-14
申请号：US09146730
申请日：1998-09-03
申请人： John T. Moore , Guy T. Blalock
发明人： John T. Moore , Guy T. Blalock
IPC分类号： H01L21461
CPC分类号： H01L21/76235 , H01L21/31053
摘要： In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending therethrough to expose a portion of the underlying substrate and comprising an upper corner at a periphery of the opening, the upper corner having a corner angle with a first degree of sharpness; b) reducing the sharpness of the corner angle to a second degree; c) after reducing the sharpness, forming a layer of material within the opening and over the etch-stop layer; and d) planarizing the material with a method selective for the material relative to the etch-stop layer to remove the material from over the etch-stop layer while leaving the material within the opening.
摘要翻译：在一个方面，本发明包括在开口内形成材料的方法，包括：a）在衬底上形成蚀刻停止层，所述蚀刻停止层具有穿过其中的开口以暴露下面的衬底的一部分，包括在所述开口的周边的上角，所述上角具有第一锐度锐角的角角; b）将角角的锐度降低到第二程度; c）在降低锐度之后，在开口内和蚀刻停止层上方形成材料层; 以及d）使用材料相对于蚀刻停止层选择性的方法对材料进行平面化，以将材料从蚀刻停止层上方移除，同时将材料留在开口内。

8. 发明授权

US07141850B2 Gated semiconductor assemblies and methods of forming gated semiconductor assemblies 有权
标题翻译：门控半导体组件和形成门控半导体组件的方法
公开(公告)号：US07141850B2
公开(公告)日：2006-11-28
申请号：US10769573
申请日：2004-01-30
申请人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
发明人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
IPC分类号： H01L29/792
CPC分类号： H01L29/7881 , H01L21/28273 , H01L29/511
摘要： In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control gate over the silicon nitride layer. In another aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a floating gate layer over a substrate; b) forming a silicon nitride layer over the floating gate layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion; and c) forming a control gate over the silicon nitride layer. In yet another aspect, the invention includes a gated semiconductor assembly comprising: a) a substrate; b) a floating gate over the substrate; c) a control gate over the floating gate; and d) an electron barrier layer between the floating gate and the control gate, the electron barrier layer comprising a silicon nitride layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion.
摘要翻译：一方面，本发明包括一种形成门控半导体组件的方法，包括：a）在浮动栅极上形成氮化硅层; 以及b）在所述氮化硅层上形成控制栅极。另一方面，本发明包括形成门控半导体组件的方法，包括：a）在衬底上形成浮栅; b）在所述浮栅上形成氮化硅层，所述氮化硅层包括从所述第一部分向前倾斜的第一部分和第二部分，所述第一部分具有比所述第二部分更大的化学计量的硅量; 以及c）在所述氮化硅层上形成控制栅极。在另一方面，本发明包括门控半导体组件，其包括：a）衬底; b）衬底上的浮栅; c）浮动门上的控制门; 以及d）在所述浮动栅极和所述控制栅极之间的电子势垒层，所述电子势垒层包括氮化硅层，所述氮化硅层包括第一部分和从所述第一部分向上偏移的第二部分，所述第一部分具有比第二部分更大的化学计量的硅。

9. 发明授权

US07057263B2 Semiconductor wafer assemblies comprising photoresist over silicon nitride materials 失效
公开(公告)号：US07057263B2
公开(公告)日：2006-06-06
申请号：US10734419
申请日：2003-12-11
申请人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
发明人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
IPC分类号： H01L23/58
CPC分类号： H01L21/0217 , G03F7/091 , H01L21/022 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/0274 , H01L21/0332 , H01L21/31144 , H01L21/312 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

10. 发明授权

US06440860B1 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride 有权
公开(公告)号：US06440860B1
公开(公告)日：2002-08-27
申请号：US09488947
申请日：2000-01-18
申请人： Scott Jeffrey DeBoer , John T. Moore
发明人： Scott Jeffrey DeBoer , John T. Moore
IPC分类号： H01L21311
CPC分类号： H01L21/0332 , H01L21/28123 , H01L21/31144 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L21/32139 , Y10S438/942 , Y10S438/944
摘要： The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.

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