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1. 发明授权

US08537883B1 Detector for low frequency offset distortion 失效
标题翻译：低频偏移失真检测器
公开(公告)号：US08537883B1
公开(公告)日：2013-09-17
申请号：US13365712
申请日：2012-02-03
申请人： Jingfeng Liu , Hongwei Song , Jin Xie
发明人： Jingfeng Liu , Hongwei Song , Jin Xie
IPC分类号： H03H7/30
CPC分类号： G11B20/10351 , G11B20/10046 , G11B20/10296 , G11B2220/2537 , H04L1/0054 , H04L25/03038 , H04L27/0014 , H04L2027/003 , H04L2027/0038
摘要： A system for removing low frequency offset distortion from a digital signal, the system comprising an analog-to-digital converter to convert an analog frequency signal associated with an optical storage medium to a digital frequency signal; an equalizer to equalize the digital frequency signal; an estimator to estimate a low frequency offset distortion of the digital frequency signal; a compensator to substantially cancel the low frequency offset distortion of the digital frequency signal from the equalized digital frequency signal using the estimate; and a decoder to decode the equalized digital frequency signal having the low frequency offset distortion substantially cancelled therefrom.
摘要翻译：一种用于从数字信号中去除低频偏移失真的系统，该系统包括用于将与光学存储介质相关联的模拟频率信号转换为数字频率信号的模拟 - 数字转换器; 均衡器以均衡数字频率信号; 用于估计数字频率信号的低频偏移失真的估计器; 补偿器，用于使用所述估计从所述均衡数字频率信号基本上消除所述数字频率信号的低频偏移失真; 以及解码器，用于解码具有基本上从其中抵消的低频偏移失真的均衡数字频率信号。

2. 发明申请

US20130050005A1 Read Channel With Oversampled Analog To Digital Conversion And Parallel Data Detectors 审中-公开
标题翻译：读取通道与过采样模数转换和并行数据检测器
公开(公告)号：US20130050005A1
公开(公告)日：2013-02-28
申请号：US13215815
申请日：2011-08-23
申请人： Jingfeng Liu , Nayak Ratnakar Aravind , Hongwei Song , Haotian Zhang
发明人： Jingfeng Liu , Nayak Ratnakar Aravind , Hongwei Song , Haotian Zhang
IPC分类号： H03M1/12
CPC分类号： H04L25/067 , G11B20/10037 , H03H17/04 , H03H17/06 , H03H21/0012 , H03H2017/0247 , H03H2017/0297
摘要： Methods and apparatus are provided for processing a signal in a read channel using a selective oversampled analog to digital conversion. The disclosed selective oversampled analog to digital conversion simplifies the analog design by transferring at least a portion of the equalization and/or filtering processes to the digital domain. An oversampled analog to digital conversion is applied to an analog input signal to generate a plurality of digital samples for a given bit interval. The plurality of digital samples for a given bit interval are applied to a corresponding plurality of data detectors to obtain a detected output. The plurality of digital samples for a given bit interval may have a phase offset relative to one another. The detected output may be obtained, for example, by summing the outputs of the plurality of data detectors or by aggregating weighted outputs of the plurality of data detectors.
摘要翻译：提供了用于使用选择性过采样模数转换处理读通道中的信号的方法和装置。所公开的选择性过采样模数转换通过将均衡和/或滤波处理的至少一部分转移到数字域来简化了模拟设计。将过采样的模数转换应用于模拟输入信号，以产生给定位间隔的多个数字采样。将给定位间隔的多个数字样本应用于相应的多个数据检测器以获得检测到的输出。给定比特间隔的多个数字样本可以具有相对于彼此的相位偏移。检测的输出可以例如通过对多个数据检测器的输出求和或者通过聚合多个数据检测器的加权输出来获得。

3. 发明授权

US08295001B2 Systems and methods for low latency noise cancellation 有权
标题翻译：用于低延迟噪声消除的系统和方法
公开(公告)号：US08295001B2
公开(公告)日：2012-10-23
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： G11B5/09 , G11B27/36
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

4. 发明授权

US08266505B2 Systems and methods for retimed virtual data processing 有权
标题翻译：重新定义虚拟数据处理的系统和方法
公开(公告)号：US08266505B2
公开(公告)日：2012-09-11
申请号：US12540283
申请日：2009-08-12
申请人： Jingfeng Liu , Hongwei Song
发明人： Jingfeng Liu , Hongwei Song
IPC分类号： H03M13/00
CPC分类号： G06F3/05 , H03M13/1102 , H03M13/15 , H03M13/1515 , H03M13/27 , H03M13/3905 , H03M13/41 , H03M13/47 , H03M13/63 , H03M13/6331
摘要： Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples. The offline timing loop interpolates a derivative of the first series of data samples to yield a second series of data samples that mimics a series of data samples corresponding to the analog input that were sampled using a free running clock. The second series of data samples is interpolated to adjust each bit in accordance with an average frequency offset exhibited across the second series of data samples.
摘要翻译：本发明的各种实施例提供了用于数据处理系统的系统和方法。作为一个示例，描述了包括模数转换器，在线定时循环和离线定时循环的数据处理电路。模数转换器接收模拟输入并提供第一系列数据样本第一系列数据采样的每一位对应于在更新的采样时钟控制的时间的模拟输入。在线定时循环至少部分地基于第一系列数据样本的处理版本来修改更新的采样时钟。离线时序循环内插第一系列数据样本的导数，以产生模拟与使用自由运行时钟采样的模拟输入相对应的一系列数据样本的第二系列数据采样。根据在第二系列数据样本中显示的平均频率偏移，内插第二系列数据样本以调整每个位。

5. 发明申请

US20120068752A1 Systems and Methods for Low Latency Noise Cancellation 有权
标题翻译：低延迟噪声消除系统和方法
公开(公告)号：US20120068752A1
公开(公告)日：2012-03-22
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： H03H11/26 , H03K5/01
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

6. 发明申请

US20110298543A1 Systems and Methods for Hybrid Algorithm Gain Adaptation 有权
标题翻译：混合算法的系统和方法增益适应
公开(公告)号：US20110298543A1
公开(公告)日：2011-12-08
申请号：US12792555
申请日：2010-06-02
申请人： Jingfeng Liu , Hongwei Song
发明人： Jingfeng Liu , Hongwei Song
IPC分类号： H03G3/20
CPC分类号： G11B20/10009 , G11B20/10027 , G11B20/10462 , G11B2020/1287 , G11B2220/2516 , H03G1/0088
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include a variable gain amplifier, a gain circuit, and hybrid gain feedback combination circuit. The variable gain amplifier is operable to apply a gain to a data input corresponding to a gain feedback value and providing an amplified output. The gain circuit is operable to calculate a first algorithm error component and a second algorithm error component based at least in part on the amplified output. The hybrid gain feedback combination circuit is operable combine the first algorithm error component and the second algorithm error component to yield the gain feedback value when the data input includes a synchronization pattern.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，本发明的一些实施例提供包括可变增益放大器，增益电路和混合增益反馈组合电路的数据处理电路。可变增益放大器可操作以将增益应用于对应于增益反馈值的数据输入并提供放大的输出。增益电路可操作以至少部分地基于放大的输出来计算第一算法误差分量和第二算法误差分量。当数据输入包括同步模式时，混合增益反馈组合电路可操作地组合第一算法误差分量和第二算法误差分量以产生增益反馈值。

7. 发明申请

US20100083075A1 Methods and Apparatus for Selective Data Retention Decoding in a Hard Disk Drive 有权
标题翻译：用于硬盘驱动器中选择性数据保留解码的方法和装置
公开(公告)号：US20100083075A1
公开(公告)日：2010-04-01
申请号：US12241919
申请日：2008-09-30
申请人： Jingfeng Liu , Shaohua Yang , Hongwei Song , Yuan Xing Lee
发明人： Jingfeng Liu , Shaohua Yang , Hongwei Song , Yuan Xing Lee
IPC分类号： H03M13/05 , G06F11/14
CPC分类号： G11B20/18 , G11B2020/183 , G11B2220/2516 , H03M13/1105 , H03M13/2948 , H03M13/2957 , H03M13/6343
摘要： Methods and apparatus are provided for improved physical re-read operations in a hard disk drive. The disclosed methods and apparatus selectively retain data in a hard disk drive. A signal is read in an iterative read channel by assigning a reliability metric to each of a plurality of segments in a read signal; repeating the assigning step for a plurality of read operations; and selectively retaining the segments based on the assigned reliability metric. The read signal can be obtained by positioning a transducer over a storage media. The reliability metric may be based on soft bit decisions; log likelihood ratios or a noise estimation of a given segment.
摘要翻译：提供了用于改进硬盘驱动器中物理重读操作的方法和装置。所公开的方法和设备选择性地将数据保留在硬盘驱动器中。通过将读取信号中的多个段中的每一个分配可靠度度量，在迭代读取通道中读取信号; 重复多个读取操作的分配步骤; 并且基于所分配的可靠性度量选择性地保留段。可以通过将传感器定位在存储介质上来获得读取信号。可靠性度量可以基于软比特决策; 对数似然比或给定段的噪声估计。

8. 发明授权

US08441751B1 Dibit pulse extraction methods and systems 有权
标题翻译： Dibit脉冲提取方法和系统
公开(公告)号：US08441751B1
公开(公告)日：2013-05-14
申请号：US11840682
申请日：2007-08-17
申请人： Hongwei Song , Zining Wu , Jingfeng Liu , Toai Doan
发明人： Hongwei Song , Zining Wu , Jingfeng Liu , Toai Doan
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10222 , G11B2220/2516
摘要： A receiving device may be configured to derive an oversampled dibit pulse response estimate using symbols sampled at substantially the read channel symbol rate of the receiving device. The receiving device may include a data acquisition circuit configured to digitize data derived from a memory medium, a symbol timing loop and read circuit, as well as a dibit pulse estimation circuit configured to estimate the oversampled dibit pulse response using symbols sampled at the read channel rate of the receiving device without disturbing the symbol timing loop and read circuit.
摘要翻译：接收设备可以被配置为使用在接收设备的基本读取的信道符号率处采样的符号来导出过采样的双位脉冲响应估计。接收设备可以包括数据获取电路，其被配置为数字化从存储介质导出的数据，符号定时循环和读取电路，以及配置为使用在读取通道上采样的符号来估计过采样双位脉冲响应的双位脉冲估计电路接收设备的速率，而不会干扰符号定时循环和读取电路。

9. 发明授权

US08312359B2 Branch-metric calibration using varying bandwidth values 有权
标题翻译：使用不同带宽值的分支校准校准
公开(公告)号：US08312359B2
公开(公告)日：2012-11-13
申请号：US12562200
申请日：2009-09-18
申请人： Jingfeng Liu , Hongwei Song , Lingyan Sun
发明人： Jingfeng Liu , Hongwei Song , Lingyan Sun
IPC分类号： H03M13/03 , G06F11/00
CPC分类号： H03M13/1102 , H03M13/296 , H03M13/3961 , H03M13/41 , H03M13/6343
摘要： In one embodiment, a signal processing receiver has a branch-metric calibration (BMC) unit that receives (i) sets of four hard-decision bits from a channel detector and (ii) a noise estimate. The BMC unit has two or more update blocks (e.g., tap-weight update and/or bias-compensation blocks) that generate updated parameters used by a branch-metric unit of the channel detector to improve channel detection. The two or more update blocks generate the updated parameters based on (i) the sets of four hard-decision bits, (ii) the noise estimate, and (iii) bandwidth values. The bandwidth values for at least two of the two or more update blocks are selected such that they are different from one another. Selecting different bandwidth values may reduce the bit-error rate for the receiver over the bit-error rate that may be achieved by selecting the bandwidth values to be the same as one another.
摘要翻译：在一个实施例中，信号处理接收机具有分支量测校准（BMC）单元，其接收（i）来自信道检测器的四个硬判决位的集合，以及（ii）噪声估计。 BMC单元具有两个或多个更新块（例如抽头重量更新和/或偏置补偿块），其生成由信道检测器的分支度量单元使用的更新参数以改善信道检测。两个或多个更新块基于（i）四个硬判决位的集合，（ii）噪声估计和（iii）带宽值）来生成更新的参数。选择两个或多个更新块中的至少两个的带宽值使得它们彼此不同。选择不同的带宽值可以通过选择彼此相同的带宽值来实现的比特错误率降低接收机的比特误码率。

10. 发明授权

US08225183B2 Methods and apparatus for selective data retention decoding in a hard disk drive 有权
标题翻译：用于在硬盘驱动器中进行选择性数据保存解码的方法和装置
公开(公告)号：US08225183B2
公开(公告)日：2012-07-17
申请号：US12241919
申请日：2008-09-30
申请人： Jingfeng Liu , Shaohua Yang , Hongwei Song , Yuan Xing Lee
发明人： Jingfeng Liu , Shaohua Yang , Hongwei Song , Yuan Xing Lee
IPC分类号： H03M13/00
CPC分类号： G11B20/18 , G11B2020/183 , G11B2220/2516 , H03M13/1105 , H03M13/2948 , H03M13/2957 , H03M13/6343
摘要： Methods and apparatus are provided for improved physical re-read operations in a hard disk drive. The disclosed methods and apparatus selectively retain data in a hard disk drive. A signal is read in an iterative read channel by assigning a reliability metric to each of a plurality of segments in a read signal; repeating the assigning step for a plurality of read operations; and selectively retaining the segments based on the assigned reliability metric. The read signal can be obtained by positioning a transducer over a storage media. The reliability metric may be based on soft bit decisions; log likelihood ratios or a noise estimation of a given segment.
摘要翻译：提供了用于改进硬盘驱动器中物理重读操作的方法和装置。所公开的方法和设备选择性地将数据保留在硬盘驱动器中。通过将读取信号中的多个段中的每一个分配可靠度度量，在迭代读取通道中读取信号; 重复多个读取操作的分配步骤; 并且基于所分配的可靠性度量选择性地保留段。可以通过将传感器定位在存储介质上来获得读取信号。可靠性度量可以基于软比特决策; 对数似然比或给定段的噪声估计。

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