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1. 发明授权

US08295001B2 Systems and methods for low latency noise cancellation 有权
标题翻译：用于低延迟噪声消除的系统和方法
公开(公告)号：US08295001B2
公开(公告)日：2012-10-23
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： G11B5/09 , G11B27/36
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

2. 发明申请

US20120068752A1 Systems and Methods for Low Latency Noise Cancellation 有权
标题翻译：低延迟噪声消除系统和方法
公开(公告)号：US20120068752A1
公开(公告)日：2012-03-22
申请号：US12887369
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , George Mathew
IPC分类号： H03H11/26 , H03K5/01
CPC分类号： G11B20/10046 , G11B20/10509
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括数据检测器电路，检测器模拟电路和误差计算电路的数据处理电路。数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理，以产生检测到的输出。数据模拟电路可操作以处理从数据输入得到的第二信号以产生模拟输出。误差计算电路可用于计算第二信号和从模拟输出得到的第三信号之间的差以产生反馈信号。反馈信号可操作以在随后的时段内修改数据输入。

3. 发明授权

US08422609B2 Automatic filter-reset mechanism 失效
标题翻译：自动过滤器复位机构
公开(公告)号：US08422609B2
公开(公告)日：2013-04-16
申请号：US12570326
申请日：2009-09-30
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song , Lingyan Sun
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song , Lingyan Sun
IPC分类号： H04B1/10
CPC分类号： G11B20/10009 , G11B20/10046 , G11B20/10055 , G11B20/10481 , H03H17/0294
摘要： In one embodiment, a (hard-drive) read channel has a (DFIR equalization) filter, whose tap coefficients are adaptively updated. A reset controller monitors an (LLR) signal generated downstream of the filter to automatically determine when to reset the filter, e.g., by reloading an initial set of user-specified tap coefficients. For LLR values, the reset controller determines to reset the filter when the reset controller detects that too many recent LLR values have confidence values that are too low. When implemented in a hard-drive read channel, the reset controller can reset the filter one or more times during read operations within a sector of the hard drive.
摘要翻译：在一个实施例中，（硬盘驱动器）读通道具有（DFIR均衡）滤波器，其抽头系数被自适应地更新。复位控制器监视在滤波器下游产生的（LLR）信号，以自动确定何时复位滤波器，例如通过重新加载用户指定的抽头系数的初始集合。对于LLR值，当复位控制器检测到过多的近期LLR值具有太低的置信度值时，复位控制器确定复位滤波器。当在硬盘驱动器读取通道中实现时，复位控制器可以在硬盘驱动器的扇区内的读取操作期间复位一次或多次过滤器。

4. 发明授权

US09219469B2 Systems and methods for filter constraint estimation 有权
标题翻译：滤波器约束估计的系统和方法
公开(公告)号：US09219469B2
公开(公告)日：2015-12-22
申请号：US12887330
申请日：2010-09-21
申请人： Haotian Zhang , Hongwei Song , Jingfeng Liu , Yu Liao
发明人： Haotian Zhang , Hongwei Song , Jingfeng Liu , Yu Liao
IPC分类号： H03H7/30 , H04N11/02 , H03H17/02
CPC分类号： H03H17/0289 , H03H17/0294
摘要： Various embodiments of the present invention provide systems and methods for calibrating a data processing circuit. For example, a method for calibrating a data processing circuit is discussed that includes providing a digital filter, providing a detector circuit, and providing an analog filter. Operation of the digital filter is at least in part governed by filter taps that correspond to a filter tap constraint value. Operation of the detector circuit is at least in part governed by a target parameter. Operation of the analog filter is at least in part governed by an analog parameter that is one of a plurality of analog parameters. The methods further include selecting a target parameter, and calculating the filter tap constraint value based on the target parameter. Combinations of the target parameter, the calculated filter tap constraint value, and each of the plurality of analog parameters are applied to identify the analog parameter.
摘要翻译：本发明的各种实施例提供了用于校准数据处理电路的系统和方法。例如，讨论了一种用于校准数据处理电路的方法，其包括提供数字滤波器，提供检测器电路和提供模拟滤波器。数字滤波器的操作至少部分地由对应于滤波器抽头约束值的滤波器抽头来控制。检测器电路的操作至少部分地由目标参数控制。模拟滤波器的操作至少部分地由作为多个模拟参数之一的模拟参数来控制。所述方法还包括选择目标参数，以及基于所述目标参数来计算所述滤波器抽头约束值。应用目标参数，计算滤波器抽头约束值和多个模拟参数中的每一个的组合以识别模拟参数。

5. 发明授权

US08996597B2 Nyquist constrained digital finite impulse response filter 有权
标题翻译：奈奎斯特约束数字有限脉冲响应滤波器
公开(公告)号：US08996597B2
公开(公告)日：2015-03-31
申请号：US13272209
申请日：2011-10-12
申请人： Yu Liao , Hongwei Song , Jingfeng Liu , Haotian Zhang
发明人： Yu Liao , Hongwei Song , Jingfeng Liu , Haotian Zhang
IPC分类号： G06F17/10 , G06F17/15 , H03H17/06 , H03H17/02
CPC分类号： G06F17/15 , H03H17/06 , H03H2017/0222
摘要： Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range.
摘要翻译：本发明的各种实施例提供了用奈奎斯特约束数字有限脉冲响应滤波器对数字信号进行滤波的装置和方法。例如，公开了一种用于对数字数据进行滤波的装置，其包括具有多个抽头的数字有限脉冲响应滤波器。该装置还包括连接到数字有限脉冲响应滤波器的抽头加权控制器，可操作以调整抽头子集中的每一个的抽头权重，使得数字有限脉冲响应滤波器的奈奎斯特响应的幅度保持在约束范围。

6. 发明授权

US08237597B2 Systems and methods for semi-independent loop processing 有权
标题翻译：半独立循环处理的系统和方法
公开(公告)号：US08237597B2
公开(公告)日：2012-08-07
申请号：US12887327
申请日：2010-09-21
申请人： Jingfeng Liu , Haotian Zhang , Hongwei Song
发明人： Jingfeng Liu , Haotian Zhang , Hongwei Song
IPC分类号： H03M1/12
CPC分类号： H03M1/06 , H03M1/12
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit, a digital filter circuit, a data detector circuit, a mimic filter circuit, and a sample clock generation circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples. The digital filter circuit is operable to receive the digital samples and to provide a filtered output. The data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output. The mimic filter circuit is operable to receive the digital samples and to provide a mimicked output. The sample clock generation circuit is operable to provide a sample clock based at least in part on the detected output and the mimicked output.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括模数转换器电路，数字滤波器电路，数据检测器电路，模拟滤波器电路和采样时钟产生电路的数据处理电路。模数转换器电路可操作以接收数据输入并提供对应的数字采样。数字滤波器电路可操作以接收数字样本并提供滤波输出。数据检测器电路可操作以对滤波的输出执行数据检测处理，以产生检测的输出。模拟滤波器电路可操作以接收数字样本并提供模拟输出。采样时钟产生电路可操作以至少部分地基于所检测的输出和模拟输出来提供采样时钟。

7. 发明申请

US20130050005A1 Read Channel With Oversampled Analog To Digital Conversion And Parallel Data Detectors 审中-公开
标题翻译：读取通道与过采样模数转换和并行数据检测器
公开(公告)号：US20130050005A1
公开(公告)日：2013-02-28
申请号：US13215815
申请日：2011-08-23
申请人： Jingfeng Liu , Nayak Ratnakar Aravind , Hongwei Song , Haotian Zhang
发明人： Jingfeng Liu , Nayak Ratnakar Aravind , Hongwei Song , Haotian Zhang
IPC分类号： H03M1/12
CPC分类号： H04L25/067 , G11B20/10037 , H03H17/04 , H03H17/06 , H03H21/0012 , H03H2017/0247 , H03H2017/0297
摘要： Methods and apparatus are provided for processing a signal in a read channel using a selective oversampled analog to digital conversion. The disclosed selective oversampled analog to digital conversion simplifies the analog design by transferring at least a portion of the equalization and/or filtering processes to the digital domain. An oversampled analog to digital conversion is applied to an analog input signal to generate a plurality of digital samples for a given bit interval. The plurality of digital samples for a given bit interval are applied to a corresponding plurality of data detectors to obtain a detected output. The plurality of digital samples for a given bit interval may have a phase offset relative to one another. The detected output may be obtained, for example, by summing the outputs of the plurality of data detectors or by aggregating weighted outputs of the plurality of data detectors.
摘要翻译：提供了用于使用选择性过采样模数转换处理读通道中的信号的方法和装置。所公开的选择性过采样模数转换通过将均衡和/或滤波处理的至少一部分转移到数字域来简化了模拟设计。将过采样的模数转换应用于模拟输入信号，以产生给定位间隔的多个数字采样。将给定位间隔的多个数字样本应用于相应的多个数据检测器以获得检测到的输出。给定比特间隔的多个数字样本可以具有相对于彼此的相位偏移。检测的输出可以例如通过对多个数据检测器的输出求和或者通过聚合多个数据检测器的加权输出来获得。

8. 发明申请

US20130097213A1 Nyquist Constrained Digital Finite Impulse Response Filter 有权
标题翻译：奈奎斯特约束数字有限脉冲响应滤波器
公开(公告)号：US20130097213A1
公开(公告)日：2013-04-18
申请号：US13272209
申请日：2011-10-12
申请人： Yu Liao , Hongwei Song , Jingfeng Liu , Haotian Zhang
发明人： Yu Liao , Hongwei Song , Jingfeng Liu , Haotian Zhang
IPC分类号： G06F17/10
CPC分类号： G06F17/15 , H03H17/06 , H03H2017/0222
摘要： Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range.
摘要翻译：本发明的各种实施例提供了用奈奎斯特约束数字有限脉冲响应滤波器对数字信号进行滤波的装置和方法。例如，公开了一种用于对数字数据进行滤波的装置，其包括具有多个抽头的数字有限脉冲响应滤波器。该装置还包括连接到数字有限脉冲响应滤波器的抽头加权控制器，可操作以调整抽头子集中的每一个的抽头权重，使得数字有限脉冲响应滤波器的奈奎斯特响应的幅度保持在约束范围。

9. 发明申请

US20120124454A1 Systems and Methods for ADC Sample Based Timing Recovery 审中-公开
标题翻译：基于ADC样本的定时恢复的系统和方法
公开(公告)号：US20120124454A1
公开(公告)日：2012-05-17
申请号：US12947962
申请日：2010-11-17
申请人： Jingfeng Liu , Hongwei Song , Haotian Zhang
发明人： Jingfeng Liu , Hongwei Song , Haotian Zhang
IPC分类号： G06F11/07
CPC分类号： H04L7/0334 , G11B20/10055 , G11B20/10231 , G11B20/10277 , G11B20/10296 , G11B2220/2516 , H04L7/0025
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit operable to receive a data input and to provide corresponding digital samples, and a digital filter circuit operable to receive the digital samples and to provide a filtered output. A data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output, and a phase detector circuit operable to calculate an error feedback value based at least in part on the detected output and the digital samples.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了一种数据处理电路，其包括可操作以接收数据输入并提供对应的数字样本的模数转换器电路，以及可操作以接收数字样本并提供滤波输出的数字滤波器电路。数据检测器电路可操作以对滤波的输出执行数据检测处理以产生检测的输出;以及相位检测器电路，可用于至少部分地基于检测的输出和数字样本来计算误差反馈值。

10. 发明申请

US20120069891A1 Systems and Methods for Filter Constraint Estimation 有权
标题翻译：滤波约束估计系统与方法
公开(公告)号：US20120069891A1
公开(公告)日：2012-03-22
申请号：US12887330
申请日：2010-09-21
申请人： Haotian Zhang , Hongwei Song , Jingfeng Liu , Yu Liao
发明人： Haotian Zhang , Hongwei Song , Jingfeng Liu , Yu Liao
IPC分类号： H03K5/159
CPC分类号： H03H17/0289 , H03H17/0294
摘要： Various embodiments of the present invention provide systems and methods for calibrating a data processing circuit. For example, a method for calibrating a data processing circuit is discussed that includes providing a digital filter, providing a detector circuit, and providing an analog filter. Operation of the digital filter is at least in part governed by filter taps that correspond to a filter tap constraint value. Operation of the detector circuit is at least in part governed by a target parameter. Operation of the analog filter is at least in part governed by an analog parameter that is one of a plurality of analog parameters. The methods further include selecting a target parameter, and calculating the filter tap constraint value based on the target parameter. Combinations of the target parameter, the calculated filter tap constraint value, and each of the plurality of analog parameters are applied to identify the analog parameter.
摘要翻译：本发明的各种实施例提供了用于校准数据处理电路的系统和方法。例如，讨论了一种用于校准数据处理电路的方法，其包括提供数字滤波器，提供检测器电路和提供模拟滤波器。数字滤波器的操作至少部分地由对应于滤波器抽头约束值的滤波器抽头来控制。检测器电路的操作至少部分地由目标参数控制。模拟滤波器的操作至少部分地由作为多个模拟参数之一的模拟参数来控制。所述方法还包括选择目标参数，以及基于所述目标参数来计算所述滤波器抽头约束值。应用目标参数，计算滤波器抽头约束值和多个模拟参数中的每一个的组合以识别模拟参数。

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