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1. 发明申请

US20070165035A1 DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR HAVING ADVANCED FEATURES 有权
标题翻译：具有先进功能的缩减图形管道处理器
公开(公告)号：US20070165035A1
公开(公告)日：2007-07-19
申请号：US11613093
申请日：2006-12-19
申请人： Jerome Duluk , Richard Hessel , Vaughn Arnold , Jack Benkual , Joseph Bratt , George Cuan , Stephen Dodgen , Emerson Fang , Zhaoyu Gong , Thomas Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew Papakipos , Jason Redgrave , Sushma Trivedi , Nathan Tuck , Shun Go , Lindy Fung , Tuan Nguyen , Joseph Grass , Bo Hung , Abraham Mammen , Abbas Rashid , Albert Tsay
发明人： Jerome Duluk , Richard Hessel , Vaughn Arnold , Jack Benkual , Joseph Bratt , George Cuan , Stephen Dodgen , Emerson Fang , Zhaoyu Gong , Thomas Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew Papakipos , Jason Redgrave , Sushma Trivedi , Nathan Tuck , Shun Go , Lindy Fung , Tuan Nguyen , Joseph Grass , Bo Hung , Abraham Mammen , Abbas Rashid , Albert Tsay
IPC分类号： G06T1/20
CPC分类号： G06T15/20 , G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/30 , G06T15/40 , G06T15/50 , G06T15/80 , G06T15/83 , G06T15/87
摘要： A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
摘要翻译：提供了包括许多子结构的延迟着色图形流水线处理器和方法。处理器和方法的实施例可以包括延迟着色，平铺帧缓冲器和多级隐藏表面去除处理中的一个或多个。在延迟阴影图形管道中，在完成像素着色之前完成隐藏表面移除。流水线处理器包括命令提取和解码单元，几何单元，模式提取单元，分类单元，设置单元，剔除单元，模式注入单元，片段单元，纹理单元，Phong照明单元，像素单元和后端单元。

2. 发明授权

US07808503B2 Deferred shading graphics pipeline processor having advanced features 有权
标题翻译：具有高级功能的延迟着色图形流水线处理器
公开(公告)号：US07808503B2
公开(公告)日：2010-10-05
申请号：US11613093
申请日：2006-12-19
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Yo , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Yo , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
IPC分类号： G06T1/20 , G06T15/00 , G06T15/10
CPC分类号： G06T15/20 , G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/30 , G06T15/40 , G06T15/50 , G06T15/80 , G06T15/83 , G06T15/87
摘要： A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
摘要翻译：提供了包括许多子结构的延迟着色图形流水线处理器和方法。处理器和方法的实施例可以包括延迟着色，平铺帧缓冲器和多级隐藏表面去除处理中的一个或多个。在延迟阴影图形管道中，在完成像素着色之前完成隐藏表面移除。流水线处理器包括命令提取和解码单元，几何单元，模式提取单元，分类单元，设置单元，剔除单元，模式注入单元，片段单元，纹理单元，Phong照明单元，像素单元和后端单元。

3. 发明授权

US06717576B1 Deferred shading graphics pipeline processor having advanced features 有权
标题翻译：具有高级功能的延迟着色图形流水线处理器
公开(公告)号：US06717576B1
公开(公告)日：2004-04-06
申请号：US09377503
申请日：1999-08-20
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
IPC分类号： G06T1500
CPC分类号： G06T15/30 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/20 , G06T15/405 , G06T15/50 , G06T15/83
摘要： A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple-stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
摘要翻译：提供了包括许多子结构的延迟着色图形流水线处理器和方法。处理器和方法的实施例可以包括延迟着色，平铺帧缓冲器和多级隐藏表面去除处理中的一个或多个。在延迟阴影图形管道中，在完成像素着色之前完成隐藏表面移除。流水线处理器包括命令提取和解码单元，几何单元，模式提取单元，分类单元，设置单元，剔除单元，模式注入单元，片段单元，纹理单元，Phong照明单元，像素单元和后端单元。

4. 发明授权

US07167181B2 Deferred shading graphics pipeline processor having advanced features 有权
标题翻译：具有高级功能的延迟着色图形流水线处理器
公开(公告)号：US07167181B2
公开(公告)日：2007-01-23
申请号：US10458493
申请日：2003-06-09
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Ho , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
IPC分类号： G06T1/20 , G06T15/40 , G09G5/00
CPC分类号： G06T15/30 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/20 , G06T15/405 , G06T15/50 , G06T15/83
摘要： A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
摘要翻译：提供了包括许多子结构的延迟着色图形流水线处理器和方法。处理器和方法的实施例可以包括延迟着色，平铺的帧缓冲器和多个阶段隐藏表面去除处理中的一个或多个。在延迟阴影图形管道中，在完成像素着色之前完成隐藏表面移除。流水线处理器包括命令提取和解码单元，几何单元，模式提取单元，分类单元，设置单元，剔除单元，模式注入单元，片段单元，纹理单元，Phong照明单元，像素单元和后端单元。

5. 发明授权

US06288730B1 Method and apparatus for generating texture 有权
标题翻译：用于产生纹理的方法和装置
公开(公告)号：US06288730B1
公开(公告)日：2001-09-11
申请号：US09378408
申请日：1999-08-20
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Joseph P. Grass , Abbas Rashid , Bo Hong , Abraham Mammen
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Joseph P. Grass , Abbas Rashid , Bo Hong , Abraham Mammen
IPC分类号： G06T1140
CPC分类号： G06T15/20 , G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/30 , G06T15/40 , G06T15/50 , G06T15/80 , G06T15/83 , G06T15/87
摘要： A deferred graphics pipeline processor comprising a texture unit and a texture memory associated with the texture unit. The texture unit applies texture maps stored in the texture memory, to pixel fragments. The textures are MIP-mapped and comprise a series of texture maps at different levels of detail, each map representing the appearance of the texture at a given distance from an eye point. The texture unit performs tri-linear interpolation from the texture maps to produce a texture value for a given pixel fragment that approximates the correct level of detail. The texture memory has texture data stored and accessed in a manner which reduces memory access conflicts and thus improves throughput of said texture unit.
摘要翻译：一种延迟图形流水线处理器，包括与纹理单元相关联的纹理单元和纹理存储器。纹理单元将存储在纹理存储器中的纹理映射应用于像素片段。纹理是MIP映射的，并且包括不同细节级别的一系列纹理贴图，每个贴图表示在距离眼点的给定距离处的纹理的外观。纹理单元从纹理图执行三线性插值，以产生近似正确的细节水平的给定像素片段的纹理值。纹理存储器以减少存储器访问冲突的方式存储和访问纹理数据，从而提高所述纹理单元的吞吐量。

6. 发明授权

US07164426B1 Method and apparatus for generating texture 有权
标题翻译：用于产生纹理的方法和装置
公开(公告)号：US07164426B1
公开(公告)日：2007-01-16
申请号：US09724663
申请日：2000-11-28
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Joseph P. Grass , Abbas Rashid , Bo Hong , Abraham Mammen
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Joseph P. Grass , Abbas Rashid , Bo Hong , Abraham Mammen
IPC分类号： G06F12/00 , G06F12/02 , G06T11/40
CPC分类号： G06T15/20 , G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/30 , G06T15/40 , G06T15/50 , G06T15/80 , G06T15/83 , G06T15/87
摘要： A deferred graphics pipeline processor comprising a texture unit and a texture memory associated with the texture unit. The texture unit applies texture maps stored in the texture memory, to pixel fragments. The textures are MIP-mapped and comprise a series of texture maps at different levels of detail, each map representing the appearance of the texture at a given distance from an eye point. The texture unit performs tri-linear interpolation from the texture maps to produce a texture value for a given pixel fragment that approximates the correct level of detail. The texture memory has texture data stored and accessed in a manner which reduces memory access conflicts and thus improves throughput of said texture unit.
摘要翻译：一种延迟图形流水线处理器，包括与纹理单元相关联的纹理单元和纹理存储器。纹理单元将存储在纹理存储器中的纹理映射应用于像素片段。纹理是MIP映射的，并且包括不同细节级别的一系列纹理贴图，每个贴图表示在距离眼点的给定距离处的纹理的外观。纹理单元从纹理图执行三线性插值，以产生近似正确的细节水平的给定像素片段的纹理值。纹理存储器以减少存储器访问冲突的方式存储和访问纹理数据，从而提高所述纹理单元的吞吐量。

7. 发明授权

US4864517A Graphics display system using frame buffers 失效
标题翻译：图形显示系统使用帧缓冲区
公开(公告)号：US4864517A
公开(公告)日：1989-09-05
申请号：US169070
申请日：1988-03-15
申请人： Stephen Maine , Duncan Harrower , Abraham Mammen
发明人： Stephen Maine , Duncan Harrower , Abraham Mammen
IPC分类号： G09G5/399 , G09G5/42
CPC分类号： G09G5/42 , G09G5/399
摘要： A method and apparatus creates a display of a scene having a plurality of object elements. One or more frame buffers are utilized in creating the display.
摘要翻译：方法和装置创建具有多个对象元素的场景的显示。一个或多个帧缓冲器用于创建显示器。

8. 发明授权

US5611074A Efficient polling technique using cache coherent protocol 失效
标题翻译：高效轮询技术使用高速缓存一致性协议
公开(公告)号：US5611074A
公开(公告)日：1997-03-11
申请号：US355879
申请日：1994-12-14
申请人： Joseph C. Kantz , Abraham Mammen , Susan D. Wright
发明人： Joseph C. Kantz , Abraham Mammen , Susan D. Wright
IPC分类号： G06F12/08 , G06F13/16
CPC分类号： G06F12/0815
摘要： An efficient polling technique to attain improved system performance preserves the concept of polling, but instead of polling across system buses to the device, a poll is made within the processor's cache structure, which is typically internal to the processor complex or attached on a local isolated bus. The polling status location is mapped in the cachable address space of the processor. Hence, the polling occurs to a normal cachable location. When the device completes its task, it signals to the polling loop by invalidating the cache line corresponding to the poll location. The next time software tries to read the status value, the processor misses in its cache and automatically reloads the updated status value from the device. This causes the polling loop to exit and normal processing continues. The only bus traffic that results is that which is issued by the device to signal cache line invalidation and a subsequent processor initiated cache line reload. Hence, the bus is totally available for all agents while the processor is within the polling loop.
摘要翻译：实现改进的系统性能的有效轮询技术保留轮询的概念，而不是跨系统总线轮询到设备，在处理器的高速缓存结构内进行轮询，这通常是处理器内部的复杂或附加在本地隔离的总线。轮询状态位置映射到处理器的可高速缓存地址空间中。因此，轮询发生在正常的可追踪位置。当设备完成任务时，它通过使对应于轮询位置的高速缓存行无效来向轮询循环发送信号。下一次软件尝试读取状态值时，处理器在其缓存中丢失，并自动从设备重新加载更新的状态值。这导致轮询循环退出并继续正常处理。结果是由设备发出信号缓存行无效的唯一总线流量和随后的处理器发起的高速缓存行重新加载。因此，当处理器在轮询循环内时，总线对于所有代理完全可用。

9. 发明授权

US4760390A Graphics display system and method with enhanced instruction data and processing 失效
标题翻译：图形显示系统和方法具有增强的指令数据和处理能力
公开(公告)号：US4760390A
公开(公告)日：1988-07-26
申请号：US705367
申请日：1985-02-25
申请人： Stephen Maine , Duncan Harrower , Abraham Mammen
发明人： Stephen Maine , Duncan Harrower , Abraham Mammen
IPC分类号： G09G5/399 , G09G5/42 , G09G1/16
CPC分类号： G09G5/399 , G09G5/42
摘要： A system for the storage, retrieval and manipulation of significantly large amounts of data to produce highly complex and visually pleasing graphics within the time constraint of a full motion video raster scanning system by storing memory data corresponding to each of the individual object elements to be displayed over a period of time, storing lists of identification and display instruction data with respect to those object elements, selecting desired identification and display instruction data for selected display elements appropriate to a particular instant of time and placing such selected data into an appropriate memory, and then creating, from those selected instructions and from the stored data relating to the selected object elements, display data which, in real time, produces the desired display. The initially stored identification and display instructions are preferably in the form of a linked list with the items in each list arranged in order of desired visible priority. The display instructions can be effective to select for display from a given object element only predetermined sub-elements, and data can include animation instructions linked in order of time, preferably with linking both forward and backward in time. Data processing means can be effective to modify either or both types of stored memory data while a separte data processing means is engaged in producing the display data from the selected instructions and the object elements data stored in memory.
摘要翻译：一种用于在全动态视频光栅扫描系统的时间限制内存储，检索和操纵大量数据以产生高度复杂且视觉上令人满意的图形的系统，通过存储对应于要显示的每个单独对象元素的存储器数据在一段时间内，存储关于这些对象元素的识别和显示指令数据的列表，为适合于特定时刻的所选择的显示元素选择所需的识别和显示指令数据，并将这些所选择的数据放入适当的存储器中，以及然后从所选择的指令和与所选择的对象元素相关的所存储的数据中创建显示数据，该数据实时地产生期望的显示。最初存储的标识和显示指令优选地是链表的形式，其中每个列表中的项目按照期望的可见优先级的顺序排列。显示指令可以有效地从给定对象元素仅选择预定子元素进行显示，并且数据可以包括按时间顺序链接的动画指令，优选地在时间上向前和向后连接。数据处理装置可以有效地修改存储的存储器数据中的一种或两种类型，而分离数据处理装置从所选择的指令和存储在存储器中的对象元素数据产生显示数据。

10. 发明授权

US09342321B2 System and method for cross-platform applications on a wireless phone 有权
标题翻译：无线电话跨平台应用的系统和方法
公开(公告)号：US09342321B2
公开(公告)日：2016-05-17
申请号：US13034994
申请日：2011-02-25
申请人： Abraham Mammen
发明人： Abraham Mammen
IPC分类号： H04B1/38 , G06F9/44 , G06F9/445 , G06F3/048
CPC分类号： G06F9/4443 , G06F9/44542 , G06F9/451
摘要： A system and method for operation of cross-platform applications on a wireless phone is provided. The applications can be cross-platform applications in that the same application code can be run on different wireless phone platforms. The method and system can for a wireless phone which runs a cross-platform application that enables the processor of the wireless phone to run the cross-platform applications. The wireless phone processor can operate to determine platform parameters of the phone and then run the cross-platform application using the determined phone parameters.
摘要翻译：提供了一种用于在无线电话上跨平台应用的操作的系统和方法。应用程序可以是跨平台应用程序，因为相同的应用程序代码可以在不同的无线电话平台上运行。该方法和系统可以用于运行跨平台应用的无线电话，其使无线电话的处理器能够运行跨平台应用。无线电话处理器可以操作以确定电话的平台参数，然后使用确定的电话参数来运行跨平台应用。

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