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1. 发明申请

US20050086501A1 Method and system for the information protection of digital content 有权
标题翻译：数字内容信息保护方法与系统
公开(公告)号：US20050086501A1
公开(公告)日：2005-04-21
申请号：US10501254
申请日：2003-01-10
申请人： Je-Hak Woo , Hwan-Chul Lee , Sang-Young Cho , Seong-Ho Jeong , Young-Soo Ha , Seog-Kyoon Shin , Seong-II Kim
发明人： Je-Hak Woo , Hwan-Chul Lee , Sang-Young Cho , Seong-Ho Jeong , Young-Soo Ha , Seog-Kyoon Shin , Seong-II Kim
IPC分类号： G06F21/00 , G06F21/10 , G06F21/60 , G06F21/62 , G06Q30/06 , G06Q50/00 , G06Q50/10 , G09C1/00 , G10K15/02 , G10L19/00 , H04N7/16 , H04L9/32
CPC分类号： G06F21/10
摘要： The present invention relates to the information protection of digital content transferred by streaming and download service through wire or wireless Internet network. The information protection system in this invention suggests a drastic prevention method of copyrights infringement such as illegal copy and unauthorized distribution of digital content, by using of the encryption, decryption, distribution, and authentication technologies. This invention suggests the control technology of general viewer program, not the specific viewer program for information protection, using a network filter driver for streaming and file system filter driver for download service. The main function of network and file system filter driver is the filtering operation such as a hooking, changing, decrypting, and restoring of message and data packet, and transferring to the viewer program. The main idea and technology of this invention suggest higher secure and efficient digital information protection system for live/VOD/HTTP streaming and download service.
摘要翻译：本发明涉及通过有线或无线因特网网络流式传输和下载服务传输的数字内容的信息保护。本发明的信息保护系统通过使用加密，解密，分发和认证技术，提出了非法复制和非法分发数字内容等版权侵权的大力预防方法。本发明提出了一般观看者节目的控制技术，而不是用于信息保护的特定观看者节目，使用用于流媒体的网络过滤器驱动程序和用于下载服务的文件系统过滤驱动器。网络和文件系统过滤驱动的主要功能是消息和数据包的挂接，更改，解密和恢复等过滤操作，并传送给观众节目。本发明的主要思想和技术提出了用于实时/ VOD / HTTP流和下载服务的更安全高效的数字信息保护系统。

2. 发明申请

US20100133586A1 HETEROJUNCTION BIPOLAR TRANSISTOR AND METHOD OF FORMING THE SAME 审中-公开
标题翻译：异相双极晶体管及其形成方法
公开(公告)号：US20100133586A1
公开(公告)日：2010-06-03
申请号：US12463011
申请日：2009-05-08
申请人： Byoung-Gue MIN , Jong-Min Lee , Seong-II Kim , Kyung-Ho Lee , Hyung-Sup Yoon , Eun-Soo Nam
发明人： Byoung-Gue MIN , Jong-Min Lee , Seong-II Kim , Kyung-Ho Lee , Hyung-Sup Yoon , Eun-Soo Nam
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/42304 , H01L29/41708 , H01L29/66318 , H01L29/7371
摘要： Provided are a heterojunction bipolar transistor and a method of forming the same. The method includes forming an emitter electrode on an emitter capping pattern, a base electrode on a base pattern, and a collector electrode on a subcollector pattern, the subcollector pattern, the base pattern, an emitter pattern, and the emitter capping pattern being provided to a substrate; patterning a protection insulation layer and a first dummy pattern covering the emitter electrode, the base electrode, and the collector electrode, to expose the emitter electrode, the base electrode, and the collector electrode; forming a second dummy pattern to electrically separate the emitter electrode, the base electrode, and the collector electrode; forming, on the substrate provided with the second dummy pattern, an emitter electrode interconnection connected to the emitter electrode, a base electrode interconnection connected to the base electrode, and a collector electrode interconnection connected to the collector electrode; and removing the first and second dummy patterns.
摘要翻译：提供了一种异质结双极晶体管及其形成方法。该方法包括在发射极盖图案上形成发射电极，在基底图案上形成基极，在子集电极图案上形成集电极，将子集电极图案，基底图案，发射极图案和发射极封盖图案设置在底物; 图案化保护绝缘层和覆盖发射电极，基极和集电极的第一虚拟图案，以暴露发射极，基极和集电极; 形成第二虚设图形以电分离发射电极，基极和集电极; 在设置有第二虚设图案的基板上形成连接到发射极的发射极电极互连，与基极连接的基极互连和与集电极连接的集电极互连; 以及去除第一和第二虚拟图案。

3. 发明授权

US06667253B2 Alignment mark and exposure alignment system and method using the same 失效
公开(公告)号：US06667253B2
公开(公告)日：2003-12-23
申请号：US09906306
申请日：2001-07-16
申请人： Won Song , Seong-II Kim , Sang-II Han , Chang-Hoon Lee , Choung-Hee Kim
发明人： Won Song , Seong-II Kim , Sang-II Han , Chang-Hoon Lee , Choung-Hee Kim
IPC分类号： H01L2176
CPC分类号： H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： An alignment mark and an exposure alignment system and method using the alignment mark for aligning wafers are described. The alignment mark is formed of a plurality of mesa or trench type unit marks that are aligned in an inline pattern within an underlying layer under a layer to which a chemical mechanical polishing process is applied to form an alignment signal during an alignment process, thereby preventing a dishing phenomenon caused by the chemical mechanical process.

4. 发明申请

US20130146944A1 SEMICONDUCTOR DEVICE INCLUDING STEPPED GATE ELECTRODE AND FABRICATION METHOD THEREOF 有权
标题翻译：包括步进电极电极的半导体器件及其制造方法
公开(公告)号：US20130146944A1
公开(公告)日：2013-06-13
申请号：US13592589
申请日：2012-08-23
申请人： Hyung Sup YOON , Byoung-Gue Min , Jong Min Lee , Seong-II Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
发明人： Hyung Sup YOON , Byoung-Gue Min , Jong Min Lee , Seong-II Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L29/812 , H01L21/338
CPC分类号： H01L29/0649 , H01L21/28593 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要： Disclosed are a semiconductor device including a stepped gate electrode and a method of fabricating the semiconductor device. The semiconductor device according to an exemplary embodiment of the present disclosure includes: a semiconductor substrate having a structure including a plurality of epitaxial layers and including an under-cut region formed in a part of a Schottky layer in an upper most part thereof; a cap layer, a first nitride layer and a second nitride layer sequentially formed on the semiconductor substrate to form a stepped gate insulating layer pattern; and a stepped gate electrode formed by depositing a heat-resistant metal through the gate insulating layer pattern, wherein the under-cut region includes an air-cavity formed between the gate electrode and the Schottky layer.
摘要翻译：本发明公开了一种半导体器件，包括阶梯栅电极和制造该半导体器件的方法。根据本公开的示例性实施例的半导体器件包括：半导体衬底，其具有包括多个外延层的结构，并且包括形成在其最上部的肖特基层的一部分中的下切割区域; 顺序地形成在半导体衬底上的盖层，第一氮化物层和第二氮化物层，以形成台阶栅极绝缘层图案; 以及通过栅极绝缘层图案沉积耐热金属而形成的阶梯形栅电极，其中下切区域包括形成在栅电极和肖特基层之间的空腔。

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